TDA8702T [NXP]
8-bit video digital-to-analog converter; 8位的视频数字到模拟转换器
| 型号： | TDA8702T |
| 厂家： | 
NXP |
| 描述： | 8-bit video digital-to-analog converter |
| 文件： | 总19页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8702
8-bit video digital-to-analog
converter
1996 Aug 23
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
FEATURES
APPLICATIONS
• High-speed digital-to-analog conversion
• 8-bit resolution
• Conversion rate up to 30 MHz
• TTL input levels
• Digital TV including:
– field progressive scan
– line progressive scan
• Subscriber TV decoders
• Satellite TV decoders
• Digital VCRs.
• Internal reference voltage generator
• Two complementary analog voltage outputs
• No deglitching circuit required
• Internal input register
• Low power dissipation
GENERAL DESCRIPTION
• Internal 75 Ω output load (connected to the analog
supply)
The TDA8702 is an 8-bit Digital-to-Analog Converter
(DAC) for video and other applications. It converts the
digital input signal into an analog voltage output at a
maximum conversion rate of 30 MHz. No external
reference voltage is required and all digital inputs are TTL
compatible.
• Very few external components required.
QUICK REFERENCE DATA
SYMBOL
VCCA
PARAMETER
analog supply voltage
CONDITIONS
MIN.
4.5
TYP.
5.0
MAX.
5.5
UNIT
V
VCCD
ICCA
ICCD
digital supply voltage
analog supply current
digital supply current
4.5
−
5.0
26
23
5.5
32
30
V
note 1
mA
mA
note 1
−
VOUT − VOUT full-scale analog output voltage
note 2
(peak-to-peak value)
ZL = 10 kΩ
ZL = 75 kΩ
−1.45
−1.60
−0.80
−
−1.75
−0.88
±1/2
±1/2
30
V
−0.72
V
ILE
DLE
fCLK
B
DC integral linearity error
DC differential linearity error
maximum conversion rate
−3 dB analog bandwidth
total power dissipation
−
−
−
−
−
LSB
LSB
MHz
MHz
mW
−
−
fCLK = 30 MHz; note 3
150
250
−
Ptot
340
Note
1. D0 to D7 connected to VCCD and CLK connected to DGND.
2. The analog output voltages (VOUT and VOUT) are negative with respect to VCCA (see Table 1). The output resistance
between VCCA and each of these outputs is typically 75 Ω.
3. The −3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input
code transition (code 0 to 255).
1996 Aug 23
2
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
TDA8702
DIP16
SO16
plastic dual in-line package; 16 leads (300 mil); long body
plastic small outline package; 16 leads; body width 7.5 mm
SOT38-1
TDA8702T
SOT162-1
BLOCK DIAGRAM
1
REF
100 nF
CURRENT
BAND-GAP
REFERENCE
REFERENCE
LOOP
6
16
DGND
AGND
V
CURRENT
GENERATORS
CCA
2
75
75
Ω
Ω
15
14
V
V
5
OUT
OUT
CLOCK INPUT
INTERFACE
CURRENT
SWITCHES
CLK
TDA8702/
TDA8702T
REGISTERS
13
V
12
11
3
CCD
(LSB) D0
D1
D2
4
DATA
INPUT
INTERFACE
D3
10
9
D4
D5
8
D6
7
(MSB) D7
MSA659
Fig.1 Block diagram.
3
1996 Aug 23
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
PINNING
SYMBOL PIN
DESCRIPTION
REF
AGND
D2
1
2
3
4
5
6
7
8
9
voltage reference (decoupling)
analog ground
data input; bit 2
data input; bit 3
clock input
handbook, halfpage
V
1
2
3
4
5
6
7
8
16
15
14
13
REF
CCA
D3
V
AGND
D2
OUT
CLK
DGND
D7
V
OUT
digital ground
V
D3
CLK
data input; bit 7
data input; bit 6
data input; bit 5
CCD
TDA8702/
TDA8702T
D6
12 D0
11 D1
D5
DGND
D7
D4
10 data input; bit 4
11 data input; bit 1
12 data input; bit 0
D4
D5
10
9
D1
D6
D0
MSA658
VCCD
13 positive supply voltage for digital
circuits (+5 V)
VOUT
VOUT
VCCA
14 analog voltage output
15 complementary analog voltage output
16 positive supply voltage for analog
circuits (+5 V)
Fig.2 Pin configuration.
1996 Aug 23
4
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCCA
VCCD
CCA − VCCD
AGND − DGND ground voltage differential
VI input voltage (pins 3 to 5 and 7 to 12)
PARAMETER
MIN.
−0.3
MAX.
UNIT
analog supply voltage
digital supply voltage
+7.0
+7.0
+0.5
+0.1
VCCD
+26
V
V
V
V
V
−0.3
−0.5
−0.1
−0.3
−5
V
supply voltage differential
I
OUT/IOUT
total output current (pins 14 and 15)
storage temperature
mA
°C
°C
°C
Tstg
Tamb
Tj
−55
0
+150
+70
operating ambient temperature
junction temperature
−
+125
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
from junction to ambient in free air
SOT38-1
70
90
K/W
K/W
SOT162-1
1996 Aug 23
5
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
CHARACTERISTICS
VCCA = V16 − V2 = 4.5 V to 5.5 V; VCCD = V13 − V6 = 4.5 V to 5.5 V; VCCA − VCCD = −0.5 V to +0.5 V; VREF decoupled to
AGND by a 100 nF capacitor; Tamb = 0 °C to +70 °C; AGND and DGND shorted together; unless otherwise specified
(typical values measured at VCCA = VCCD = 5 V and Tamb = 25 °C).
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
VCCA
VCCD
ICCA
analog supply voltage
4.5
5.0
5.0
26
23
−
5.5
5.5
32
V
digital supply voltage
analog supply current
digital supply current
4.5
−
V
note 1
note 1
mA
mA
V
ICCD
−
30
AGND − DGND ground voltage differential
Inputs
−0.1
+0.1
DIGITAL INPUTS (D7 TO D0) AND CLOCK INPUT (CLK)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
maximum clock frequency
0
−
0.8
V
2.0
−
−
VCCD
−0.4
20
V
VI = 0.4 V
VI = 2.7 V
−0.3
0.01
−
mA
µA
MHz
IIH
−
fCLK
−
30
Outputs (note 2; referenced to VCCA
)
V
OUT − VOUT
full-scale analog output voltages
(peak-to-peak value)
ZL = 10 kΩ
ZL = 75 Ω
code = 0
−1.45 −1.60 −1.75
−0.72 −0.80 −0.88
V
V
VOS
analog offset output voltage
−
−
−3
−25
mV
µV/K
V
V
B
OUT/TC
full-scale analog output voltage
temperature coefficient
−
200
OS/TC
analog offset output voltage
temperature coefficient
−
−
20
µV/K
−3 dB analog bandwidth
differential gain
note 3; fCLK = 30 MHz
−
−
−
−
150
0.6
1
−
−
−
−
MHz
%
Gdiff
Φdiff
ZO
differential phase
output impedance
deg
Ω
75
Transfer function (fCLK = 30 MHz)
ILE
DC integral linearity error
DC differential linearity error
−
−
−
−
±1/2
±1/2
LSB
LSB
DLE
1996 Aug 23
6
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Switching characteristics (fCLK = 30 MHz); notes 4 and 5; see Figs 3, 4 and 5
tSU;DAT
tHD;DAT
tPD
data set-up time
data hold time
−0.3
2.0
−
−
−
ns
ns
ns
ns
−
−
propagation delay time
settling time
−
1.0
1.5
tS1
10% to 90% full-scale
−
1.1
change to ±1 LSB
tS2
td
settling time
10% to 90% full-scale
change to ±1 LSB
−
−
6.5
3.0
8.0
5.0
ns
ns
input to 50% output delay time
Output transients (glitches; (fCLK = 30 MHz); note 6; see Fig.6
Eg
glitch energy from code
transition 127 to 128
−
−
30
LSB.ns
Note
1. D0 to D7 are connected to VCCD, CLK is connected to DGND.
2. The analog output voltages (VOUT and VOUT are negative with respect to VCCA (see Table 1). The output resistance
between VCCA and each of these outputs is 75 Ω (typ.).
3. The −3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input
code transition (code 0 to 255).
4. The worst case characteristics are obtained at the transition from input code 0 to 255 and if an external load
impedance greater than 75 Ω is connected between VOUT or VOUT and VCCA. The specified values have been
measured with an active probe between VOUT and AGND. No further load impedance between VOUT and AGND has
been applied. All input data is latched at the rising edge of the clock. The output voltage remains stable (independent
of input data variations) during the HIGH level of the clock (CLK = HIGH). During a LOW-to-HIGH transition of the
clock (CLK = LOW), the DAC operates in the transparent mode (input data will be directly transferred to their
corresponding analog output voltages (see Fig.5).
5. The data set-up (tSU;DAT) is the minimum period preceding the rising edge of the clock that the input data must be
stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the rising
edge of the clock and still be recognized. The data hold time (tHD;DAT) is the minimum period following the rising edge
of the clock that the input data must be stable in order to be correctly registered. A negative hold time indicates that
the data may be released prior to the rising edge of the clock and still be recognized.
6. The definition of glitch energy and the measurement set-up are shown in Fig.6. The glitch energy is measured at the
input transition between code 127 to 128 and on the falling edge of the clock.
1996 Aug 23
7
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
Table 1 Input coding and output voltages (typical values; referenced to VCCA, regardless of the offset voltage)
DAC OUTPUT VOLTAGES
INPUT DATA
(D7 TO D0)
CODE
ZL = 10 KΩ
ZL = 75 Ω
VOUT
0
VOUT
−1.6
VOUT
0
VOUT
−0.8
0
1
000 00 00
000 000 01
........
−0.006
−1.594
−0.003
−0.797
.
128
.
100 000 00
........
−0.8
−0.8
−0.4
−0.4
254
255
111 111 10
111 111 11
−1.594
−1.6
−0.006
−0.797
−0.8
−0.003
0
0
t
t
SU; DAT
HD; DAT
3.0 V
input data
stable
1.3 V
0 V
3.0 V
1.3 V
0 V
CLK
MBC912
The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within 0.3 ns after the
first rising edge of the clock (tSU;DAT is negative; −0.3 ns). Data must be held at least 2 ns after the rising edge (tHD;DAT = +2 ns).
Fig.3 Data set-up and hold times.
1996 Aug 23
8
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
CLK
1.3 V
code 255
input data
1.3 V
code 0
(example of a
full-scale input
transition)
1 LSB
V
CCA
(code 0)
10 %
50 %
90 %
t
d
V
OUT
V
1.6 V
CCA
(code 255)
1 LSB
t
S1
MBC913
t
t
S2
PD
Fig.4 Switching characteristics.
transparent
mode
latched
mode
1.3 V
CLK
input
codes
V
OUT
analog
output
voltage
transparent
mode
latched mode
(stable output)
beginning of
transparent
mode
MBC914 - 1
During the transparent mode (CLK = LOW), any change of input data will be seen at the output. During the latched mode (CLK = HIGH), the analog
output remains stable regardless of any change at the input. A change of input data during the latched mode will be seen on the falling edge of the clock
(beginning of the transparent mode).
Fig.5 Latched and transparent mode.
1996 Aug 23
9
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
HP8082A
PULSE
GENERATOR
(SLAVE)
TEK P6201
TEK7104 and TEK7A26
f
f
CLK/10
(2)
D7 MSB
D6
V
OUT
DYNAMIC
PROBE
OSCILLO-
SCOPE
V
OUT
D5
PULSE
GENERATOR
(SLAVE)
R = 100 kΩ
C = 3 pF
bandwidth = 20 MHz
D4
CLK/10
(1)
HP8082A
TDA8702/
TDA8702T
D3
D2
D1
DIVIDER
clock
D0 (LSB)
(
10)
f
3
1
2
CLK
f
PULSE
GENERATOR
(MASTER)
CLK
(3)
MODEL EH107
code 127
1 LSB
timing diagram
code 128
MSA660
V
OUT
time
The value of the glitch energy is the sum of the shaded area measured in LSB.ns.
Fig.6 Glitch energy measurement.
1996 Aug 23
10
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
INTERNAL PIN CONFIGURATIONS
V
CCA
V
REF
output current
generators
regulation loop
REF
MBC911 - 1
AGND
Fig.7 Reference voltage generator decoupling.
handbook, halfpage
V
CCA
handbook, halfpage
DGND
AGND
D0 to D7,
CLK
substrate
MBC908
AGND
MBC910
Fig.8 AGND and DGND.
Fig.9 D7 to D0 and CLK.
1996 Aug 23
11
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
handbook, halfpage
V
CCA
75 Ω
75 Ω
V
OUT
handbook, halfpage
V
OUT
V
CCD
AGND
DGND
bit
n
bit
n
MBC907
switches and
current generators
MBC909 - 1
Fig.10 Digital supply.
Fig.11 Analog outputs.
handbook, halfpage
V
CCA
AGND
MBC906
Fig.12 Analog supply.
1996 Aug 23
12
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
APPLICATION INFORMATION
Additional application information will be supplied upon request (please quote number FTV/8901).
(1)
handbook, halfpage
100 nF
REF
V
V
CCA
OUT
V
AGND
O
V
OUT
TDA8702/
TDA8702T
MSA661
(1) This is a recommended value for decoupling pin 1.
Fig.13 Analog output voltage without external load (VO = −VOUT; see Table 1, ZL = 10 kΩ).
(1)
100 nF
REF
V
CCA
(
)
75
L
V
Z
/
Z
Z
AGND
O
L
L
V
OUT
TDA8702/
TDA8702T
MSA662
(1) This is a recommended value for decoupling pin 1.
Fig.14 Analog output voltage with external load (external load ZL = 75 Ω to ∞).
1996 Aug 23
13
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
(1)
handbook, halfpage
100 nF
V
CCA
REF
100 µF
V
AGND
OUT
V
75 Ω
O
2
TDA8702/
TDA8702
MSA663
AGND
(1) This is a recommended value for decoupling pin 1.
Fig.15 Analog output with AGND as reference.
TDA8702
10 µH
12 µH
V
OUT
100 µF
27 pF
12 pF
(pin 15)
or
390 Ω
V
OUT
390 Ω
56 pF
V
[390/(780+75)]
o
(pin 14)
39 pF
100 pF
MSA665
Fig.16 Example of anti-aliasing filter (analog output referenced to AGND).
14
1996 Aug 23
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
MSA657
0
handbook, halfpage
α
(dB)
20
40
60
80
100
0
10
20
30
40
f
(MHz)
i
Characteristics
Order 5; adapted CHEBYSHEV.
Ripple at ≤ 0.1 dB.
f(−3 dB) = 6.7 MHz.
f(NOTCH) = 9.7 MHz and 13.3 MHz.
Fig.17 Frequency response for filter shown in Fig.16.
(1)
100 nF
R2
REF
100 µF
100 µF
R1
R1
V
V
AGND
OUT
OUT
TDA8702/
TDA8702T
2 X V (R2/R1)
O
R2
MSA664
AGND
(1) This is a recommended value for decoupling pin 1.
Fig.18 Differential mode (improved supply voltage ripple rejection).
15
1996 Aug 23
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
w
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
1
1
E
max.
max.
min.
max.
1.40
1.14
0.53
0.38
0.32
0.23
21.8
21.4
6.48
6.20
3.9
3.4
8.25
7.80
9.5
8.3
4.7
0.51
3.7
2.54
0.10
7.62
0.30
0.254
0.01
2.2
0.021
0.015
0.013
0.009
0.86
0.84
0.32
0.31
0.055
0.045
0.26
0.24
0.15
0.13
0.37
0.33
inches
0.19
0.020
0.15
0.087
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-10-02
95-01-19
SOT38-1
050G09
MO-001AE
1996 Aug 23
16
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A
X
c
H
v
M
A
E
y
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
detail X
e
w
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
10.5
10.1
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
1.27
0.050
1.4
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.41
0.014 0.009 0.40
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT162-1
075E03
MS-013AA
1996 Aug 23
17
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
Several techniques exist for reflowing; for example,
SOLDERING
Introduction
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
DIP
SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1996 Aug 23
18
Philips Semiconductors
Product specification
8-bit video digital-to-analog converter
TDA8702
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Aug 23
19
相关型号：
TDA8702TD
IC PARALLEL, 8 BITS INPUT LOADING, 0.0065 us SETTLING TIME, 8-BIT DAC, PDSO16, Digital to Analog Converter
NXP
TDA8702TD-T
IC PARALLEL, 8 BITS INPUT LOADING, 0.0065 us SETTLING TIME, 8-BIT DAC, PDSO16, Digital to Analog Converter
NXP
TDA8703N
IC 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP24, 0.600 INCH, PLASTIC, SOT-101, DIP-24, Analog to Digital Converter
NXP
TDA8703P
ADC, Proprietary Method, 8-Bit, 1 Func, 1 Channel, Parallel, 8 Bits Access, Bipolar, PDIP24
YAGEO
TDA8703PN
IC 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP24, 0.600 INCH, PLASTIC, MO-015AD, SOT-101-1, DIP-24, Analog to Digital Converter
NXP
TDA8703PN
ADC, Proprietary Method, 8-Bit, 1 Func, 1 Channel, Parallel, 8 Bits Access, Bipolar, PDIP24
YAGEO
TDA8703T
ADC, Resistance Ladder, 8-Bit, 1 Func, 1 Channel, Parallel, 8 Bits Access, Bipolar, PDSO24
YAGEO
TDA8703T/C4
IC 1-CH 8-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO24, PLASTIC, SO-24, Analog to Digital Converter
NXP
©2020 ICPDF网 联系我们和版权申明