TDA8708T [NXP]
IC SPECIALTY CONSUMER CIRCUIT, PDSO28, PLASTIC, SOT-136A, SOL-28, Consumer IC:Other;
| 型号： | TDA8708T |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY CONSUMER CIRCUIT, PDSO28, PLASTIC, SOT-136A, SOL-28, Consumer IC:Other 消费电路 商用集成电路 光电二极管 |
| 文件： | 总24页 (文件大小：192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8708A
Video analog input interface
June 1994
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
Philips Semiconductors
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
FEATURES
APPLICATIONS
• 8-bit resolution
• Video signal decoding
• Sampling rate up to 32 MHz
• Scrambled TV (encoding and decoding)
• Digital picture processing
• Frame grabbing.
• Binary or two's complement 3-state TTL outputs
• TTL-compatible digital inputs and outputs
• Internal reference voltage regulator
• Power dissipation of 365 mW (typical)
• Input selector circuit (one out of three video inputs)
GENERAL DESCRIPTION
The TDA8708A is an analog input interface for video signal
processing. It includes a video amplifier with clamp and
gain control, an 8-bit analog-to-digital converter (ADC)
with a sampling rate of 32 MHz and an input selector.
• Clamp and Automatic Gain Control (AGC) functions for
CVBS and Y signals
• No sample-and-hold circuit required.
• The TDA8708A has white peak control in modes 1 and
2 whereas the TDA8708B has control in mode 1 only.
QUICK REFERENCE DATA
SYMBOL
VCCA
PARAMETER
analog supply voltage
MIN.
4.5
TYP.
5.0
MAX.
5.5
UNIT
V
V
V
VCCD
VCCO
ICCA
ICCD
ICCO
ILE
digital supply voltage
4.5
4.2
−
5.0
5.0
37
24
12
−
5.5
5.5
45
30
16
±1
±0.5
−
TTL output supply voltage
analog supply current
mA
digital supply current
−
mA
TTL output supply current
DC integral linearity error
DC differential linearity error
maximum clock frequency
maximum −3 dB bandwidth (AGC amplifier)
total power dissipation
−
mA
−
LSB
LSB
MHz
MHz
mW
DLE
fclk(max)
B
−
−
30
12
−
32
18
365
−
Ptot
500
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
PINS
PIN POSITION
DIP
MATERIAL
plastic
CODE
TDA8708A
28
28
SOT117-1
SOT136-1
TDA8708AT
SO28L
plastic
June 1994
2
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
BLOCK DIAGRAM
analog
voltage
output
video input video input
selection bit 0 selection bit 1
ADC
input
clock decoupling
input input
a
TTL outputs V
7
(+ 5 V)
CCO
14
15
19 20
5
21
VIDEO
AMPLIFIER
output format/
chip enable
(3-state input)
D7
16
17
18
9
video input 0
video input 1
video input 2
8 - bit
ADC
INPUT
SELECTOR
AMP.
1
2
3
D6
D5
D4
D3
D2
D1
D0
24
25
clamp capacitor
connection
TTL
OUTPUTS
4
10
11
12
13
AGC capacitor
connection
TDA8708A
PEAK LEVEL
DIGITAL COMPARATOR
AGC &
CLAMP
LOGIC
&
BLACK LEVEL
DIGITAL COMPARATOR
MODE
SELECTION
peak level current
resistor input
28
SYNC LEVEL
DIGITAL COMPARATOR
27
26
6
8
22
23
MBB965
sync level
sync pulse
black level
sync pulse
digital V
(+ 5 V)
digital
ground
analog V
(+ 5 V)
analog
ground
CCD
CCA
Fig.1 Block diagram.
June 1994
3
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
PINNING
SYMBOL PIN
DESCRIPTION
D7
1
2
3
4
5
6
7
8
9
data output; bit 7 (MSB)
data output; bit 6
D6
D5
data output; bit 5
D4
data output; bit 4
CLK
VCCD
VCCO
DGND
OF
clock input
D7
1
2
3
4
5
6
7
8
9
RPEAK
28
digital supply voltage (+5 V)
TTL outputs supply voltage (+5 V)
digital ground
27 GATE A
D6
D5
GATE B
AGC
26
25
output format/chip enable
(3-state input)
D4
CLK
24 CLAMP
23 AGND
D3
10 data output; bit 3
V
CCD
D2
11 data output; bit 2
V
CCO
22
V
CCA
D1
12 data output; bit 1
TDA8708A
D0
13 data output; bit 0 (LSB)
14 video input selection bit 0
15 video input selection bit 1
16 video input 0
21 DEC
DGND
OF
I0
20 ADCIN
19 ANOUT
I1
D3 10
D2 11
D1 12
VIN0
VIN1
VIN2
ANOUT
ADCIN
DEC
VCCA
AGND
CLAMP
AGC
GATE B
GATE A
RPEAK
VIN2
VIN1
VIN0
18
17
16
17 video input 1
18 video input 2
D0
I0
13
14
19 analog voltage output
20 analog-to-digital converter input
21 decoupling input
15 I1
MBB964
22 analog supply voltage (+5 V)
23 analog ground
24 clamp capacitor connection
25 AGC capacitor connection
26 black level synchronization pulse
27 sync level synchronization pulse
28 peak level current resistor input
Fig.2 Pin configuration.
June 1994
4
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that the sync pulse
of the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 0 at the converter output. As
the black level is at digital level 64, the sync pulse will have
a digital amplitude of 64 LSBs.
FUNCTIONAL DESCRIPTION
The TDA8708A provides a simple interface for decoding
video signals.
The TDA8708A operates in configuration mode 1 (see
Fig.4) when the video signals are weak (i.e. when the gain
of the AGC amplifier has not yet reached its optimum
value). This enables a fast recovery of the synchronization
pulses in the decoder circuit. When the pulses at the
GATE A and GATE B inputs become distinct (GATE A and
GATE B pulses are synchronization pulses occurring
during the sync period and rear porch respectively) the
TDA8708A automatically switches to configuration mode 2
(see Fig.5).
The peak-white control loop is always active. If the video
signal tends to exceed the digital code of 248, the gain will
be limited to avoid any over-range of the converter.
The use of nominal signals will prevent the output from
exceeding a digital code of 213 and the peak-white control
loop will be non-active.
The clamp level control is accomplished by using the same
techniques as used for the gain control. The black-level
digital comparator is active during a positive-going pulse at
the GATE B input. The clamp capacitor will be charged or
discharged to adjust the digital output to code 64.
When the TDA8708A is in configuration mode 1, the gain
of the AGC amplifier will be roughly adjusted (sync level to
a digital output level of 0 and the peak level to a digital
output level of 255).
In configuration mode 2 the digital output of the ADC is
compared to internal digital reference levels. The resultant
outputs control the charge or discharge current of a
capacitor connected to the AGC pin. The voltage across
this capacitor controls the gain of the video amplifier. This
is the gain control loop.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER
MIN.
−0.3
MAX.
+7.0
UNIT
VCCA
VCCD
VCCO
∆VCC
analog supply voltage
digital supply voltage
output supply voltage
V
V
V
V
V
V
V
−0.3
−0.3
−1.0
−1.0
−1.0
−0.3
0
+7.0
+7.0
+1.0
+1.0
+1.0
VCCA
+10
supply voltage difference between VCCA and VCCD
supply voltage difference between VCCO and VCCD
supply voltage difference between VCCA and VCCO
input voltage
VI
IO
output current
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
−55
0
+150
+70
operating ambient temperature
junction temperature
0
+125
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
SOT117-1
SOT136-1
55
70
K/W
K/W
June 1994
5
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
CHARACTERISTICS
VCCA = V22 to V23 = 4.5 to 5.5 V; VCCD = V6 to V8 = 4.5 to 5.5 V; VCCO = V7 to V8 = 4.2 to 5.5 V; AGND and DGND
shorted together; VCCA to VCCD = −0.5 to +0.5 V; VCCO to VCCD = −0.5 to +0.5 V; VCCA to VCCO = −0.5 to +0.5 V;
Tamb = 0 to +70 °C; typical readings taken at VCCA = VCCD = VCCO = 5 V and Tamb = 25 °C; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
VCCA
VCCD
VCCO
ICCA
analog supply voltage
4.5
5.0
5.0
5.0
37
5.5
V
digital supply voltage
TTL output supply voltage
analog supply current
digital supply current
4.5
4.2
−
5.5
5.5
45
30
16
V
V
mA
mA
mA
ICCD
−
24
ICCO
TTL output supply current
TTL load (see Fig.8)
−
12
Video amplifier inputs
VIN(0 TO 2) INPUTS
VI(p-p)
input voltage (peak-to-peak value)
AGC load with external
capacitor; note 1
0.6
−
1.5
V
|Zi|
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
10
20
1
−
−
kΩ
CI
−
pF
I0 AND I1 TTL INPUTS (SEE TABLE 1)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
µA
µA
IIH
20
GATE A AND GATE B TTL INPUTS (SEE FIGS 4 AND 5)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
pulse width
0
−
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
see Fig.5
µA
µA
µs
IIH
tW
20
−
2
RPEAK INPUT (PIN 28)
I28(min)
minimum peak level current
R28 = 0 Ω
−
80
150
µA
AGC INPUT (PIN 25)
V25(min)
V25(max)
AGC voltage for minimum gain
−
−
2.8
4.0
−
−
V
V
AGC voltage for maximum gain
AGC output current
see Table 2
CLAMP INPUT (PIN 24)
V24
I24
clamp voltage for code 128 output
clamp output current
−
3.5
−
V
see Table 3
June 1994
6
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Video amplifier outputs
ANOUT OUTPUT (PIN 19)
V19(p-p)
AC output voltage
(peak-to-peak value)
VVIN = 1.33 V (p-p);
V25 = 3.6 V
−
1.33
−
V
I19
internal current source
RL = ∞
2.0
2.5
−
mA
mA
IO(p-p)
output current driven by the load
VANOUT = 1.33 V (p-p);
note 2
−
−
1.0
V19
Z19
DC output voltage for black level
output impedance
note 3
−
−
V
CCA − 2.24
−
−
V
20
Ω
Video amplifier dynamic characteristics
αct
crosstalk between VIN inputs
differential gain
VCCA = 4.75 to 5.25 V
−
−
−50
−45
dB
%
Gdiff
VVIN = 1.33 V (p-p);
V25 = 3.6 V
2
−
ϕdiff
differential phase
VVIN = 1.33 V (p-p);
V25 = 3.6 V
−
0.8
−
deg
B
−3 dB bandwidth
12
60
−
−
−
MHz
dB
dB
dB
%
S/N
signal-to-noise ratio
supply voltage ripple rejection
gain range
note 4
−
−
SVRR1
∆G
note 5
45
−
−
see Fig.10
−4.5
−
+6.0
5
Gstab
gain stability as a function of supply see Fig.10
voltage and temperature
−
Analog-to-digital converter inputs
CLK INPUT (PIN 5)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
input impedance
0
−
0.8
VCCD
−
V
2.0
−400
−
−
V
Vclk = 0.4 V
Vclk = 2.7 V
fclk= 10 MHz
fclk = 10 MHz
−
µA
µA
kΩ
pF
IIH
|Zi|
CI
−
100
−
−
4
input capacitance
−
4.5
−
OF INPUT (3-STATE; SEE TABLE 4)
VIL
VIH
V9
IIL
LOW level input voltage
0
−
0.2
VCCD
−
V
HIGH level input voltage
input voltage in high impedance state
LOW level input current
2.6
−
−
V
1.15
−300
300
V
−370
−
−
µA
µA
IIH
HIGH level input current
450
June 1994
7
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
ADCIN INPUT (PIN 20; SEE TABLE 5)
V20
input voltage
input voltage
digital output = 00
digital output = 255
−
−
−
V
CCA − 2.42 −
CCA − 1.41 −
V
V
V
V20
V
V20(p-p)
input voltage amplitude
(peak-to-peak value)
1.0
−
I20
|Zi|
CI
input current
−
−
−
1.0
50
1
10
−
µA
MΩ
pF
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
−
Analog-to-digital converter outputs
DIGITAL OUTPUTS D0 TO D7
VOL
VOH
IOZ
LOW level output voltage
HIGH level output voltage
output current in 3-state mode
IOL = 2 mA
0
−
−
−
0.6
V
IOL = −0.4 mA
0.4 V < VO < VCCD
2.4
VCCD
+20
V
−20
µA
Switching characteristics
fclk(max) maximum clock input frequency
see Fig.6; note 6
30
32
2
−
−
MHz
%
Analog signal processing (fclk = 32 MHz; see Fig.8)
Gdiff
differential gain
V20 = 1.0 V (p-p);
see Fig.3; note 7
−
ϕdiff
f1
differential phase
see Fig.3; note 7
−
−
−
2
−
0
−
deg
dB
fundamental harmonics (full-scale)
fi = 4.43 MHz; note 7
fi = 4.43 MHz; note 7
−
fall
harmonics (full-scale);
all components
−55
dB
SVRR2
supply voltage ripple rejection
note 8
note 9
−
1
5
%/V
Transfer function (see Fig.8)
ILE
DLE
ILE
DC integral linearity error
−
−
−
−
−
−
±1
LSB
LSB
LSB
DC differential linearity error
AC integral linearity error
±0.5
±2
Timing (fclk = 32 MHz; see Figs 6, 7 and 8)
DIGITAL OUTPUTS (CL = 15 pF; IOL = 2 mA; RL = 2 kΩ)
tds
th
sampling delay time
−
6
−
−
−
2
−
ns
ns
ns
ns
ns
output hold time
8
−
td
output delay time
16
19
14
20
25
20
tdEZ
tdDZ
3-state delay time; output enable
3-state delay time; output disable
June 1994
8
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
Notes
1. 0 dB is obtained at the AGC amplifier when applying Vi(p-p) = 1.33 V.
2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to VCCA and
defined as:
a) AC impedance ≥1 kΩ and the DC impedance >2.7 kΩ.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by
the clamp is not disturbed.
3. Control mode 2 is selected.
4. Signal-to-noise ratio measured with 5 MHz bandwidth:
VANOUTC (p – p)
S
N
= 20 log
at B = 5 MHz.
------------------------------------------------
VANOUTY (RMS noise)
---
5. The voltage ratio is expressed as:
∆VCCA
G
SVRR1 = 20 log
×
for VI = 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.
----------------- --------
VCCA ∆ G
6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.
7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).
8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply
variation:
∆ (VI (00) – VI (FF) ) + (VI (00) – VI (FF)
)
SVRR2 =
-----------------------------------------------------------------------------------------------------
∆VCCA
9. Full-scale sine wave (fi = 4.4 MHz; fclk = 27 MHz).
June 1994
9
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
Table 1 Video input selection (CVBS).
Table 3 CLAMP output current.
I1
I0
SELECTED INPUT
DIGITAL
GATE A GATE B
OUTPUT
ICLAMP
MODE
0
0
1
1
0
1
0
1
VIN0
VIN1
VIN2
VIN2
1
1
output < 0
output > 0
X(1)
ICLAMPM
−2.5 µA
0 µA
1
1
2
2
2
X(1)
0
0
1
output < 64
64 < output
+50 µA
−50 µA
Table 2 AGC output current.
DIGITAL
OUTPUT
Note
1. X = don't care.
GATE A GATE B
IAGC
MODE(2)
1
0
1
1
X(1)
0
output < 255 −2.5 µA
output > 255 IAGCM
output < 248 0 µA
output > 248 IAGCM
1
1
2
2
2
2
Table 4 OF input coding.
OF
D0 TO D7
0
1
active, two's complement
high impedance
output < 0
+2.5 µA
0 < output < −2.5 µA
248
open circuit(1) active, binary
Note
1. Use C ≥ 10 pF to DGND.
output > 248 IAGCM
2
Note
1. X = don't care.
2. Mode 2 can only be initialized with successive pulses
on GATE A and GATE B (see Fig.5).
Table 5 Output coding and input voltage (typical values).
BINARY OUTPUTS
TWO'S COMPLEMENT
STEP
VADCIN
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Underflow
−
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
1
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
V
CCA − 2.41 V
1
−
.
.
−
−
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
254
−
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
255
V
CCA − 1.41 V
Overflow
−
June 1994
10
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
a
0.25 V
5 MHz sine wave
1.0 V
0.25 V
MBB959
64 µs
Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.
n
digital
MBB969
output
level
peak-level gain control
255
black-level
clamping
sync-level gain control
0
time
GATE A
GATE B
MODE 1
Fig.4 Control mode 1.
11
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
digital
MBB970
output
level
248
213
safety
margin
peak-level gain control
standard picture
level
black-level
clamping
64
sync-level control
0
t
W
time
GATE A
t
W
GATE B
MODE 2
Fig.5 Control mode 2.
clock input
reference level
(1.5 V)
CLK
input
t
ds
sample
sample
N
1
N
2
sample
N
sample
N
analog
input
1
(ADCIN)
t
h
2.4 V
data
data N
3
data N
2
data N
1
data N
data N 1
outputs
D0 to D7)
0.4 V
MBB958
t
d
Fig.6 Timing diagram for data output.
12
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
OF
open
input
2.4 V
0.4 V
data
outputs
(D0 to D7)
high impedance
binary
two's complement
t
t
MBB968
dDZ
dEZ
Fig.7 Output format timing diagram.
V
CCO
2 kΩ
handbook, halfpage
D0 to D7
15 pF
IN916
or
IN3064
MBD865
DGND
Fig.8 Load circuit for timing measurement; data outputs (OF = LOW or open-circuit).
13
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
V
CCO
handbook, halfpage
2 kΩ
S1
D0 to D7
C
5
kΩ
IN916
or
IN3064
S2
MBB955
DGND
Fig.9 Load circuit for timing measurement; 3-state outputs (OF: fi = 1 MHz; VOF = 3 V).
MSA676
12
G
(dB)
8
5 %
4
0
(1)
(2)
4
8
2.6
3
3.4
3.8
4.2
4.6
(V)
V
25
(1) Typical value (VCCA = VCCD = 5 V; Tamb = 25 °C).
(2) Minimum and maximum values (temperature and supply).
Fig.10 Gain control curve.
14
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
INTERNAL PIN CIRCUITRY
BM791
a n d b o o k , f u l l p a g e w
June 1994
15
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
APPLICATION INFORMATION
Additional information can be found in the laboratory report “FBL/AN9308”.
330 Ω
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
horizontal sync
horizontal clamp
2
data outputs
3
220 nF
4
33 pF
18 nF
100 Ω
clock
5 V
5
6
22 nF
22 nF
1 µ F
10 nF
1 µH
(1)
7
5 V
22 Ω
TDA8708A
8
5 V
1 µF
9
10 pF
LOW PASS
FILTER
(2)
10
11
12
13
14
4.7 µF
data outputs
4.7 µF
75 Ω
4.7 µF
75 Ω
75 Ω
MBB967 - 1
(1) It is recommended to decouple VCCO through a 22 Ω resistor especially when
the output data of TDA8708A interfaces with a capacitive CMOS load device.
(2) See Figs 13 and 15 for examples of the low-pass filters.
Fig.12 Application diagram.
16
June 1994
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
22 µH
22 µH
12 pF
12 pF
680 Ω
ANOUT
(pin 19)
ADCIN
(pin 20)
2.2 kΩ
27 pF
V
V
i
o
27 pF
68 pF
MBB966 - 1
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.13 Example of a low-pass filter for CVBS and Y signals.
Characteristics of Fig. 13
• Order 5; adapted CHEBYSHEV
MSA682
• Ripple ρ ≤ 0.4 dB
0
handbook, halfpage
• f = 6.5 MHz at −3 dB
α
(dB)
• fnotch = 9.75 MHz.
40
80
120
160
0
10
20
30
f (MHz)
Fig.14 Frequency response for filter shown in
Fig.13.
June 1994
17
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
82 µH
680 Ω
ADOUT
ADCIN
(pin 20)
h
(pin 19)
2.2 kΩ
15 pF
V
V
i
o
15 pF
MSA678
V
CCA
(pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.
Fig.15 Example of an economical low-pass filter for CVBS and Y signals.
Characteristics of Fig. 15
• Order 5; adapted CHEBYSHEV
MSA681
• Ripple ρ ≤ 0.4 dB
0
handbook, halfpage
• f = 6.5 MHz at −3 dB.
α
(dB)
10
20
30
40
0
10
20
30
f (MHz)
Fig.16 Frequency response for filter shown in Fig.15.
June 1994
18
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
PACKAGE OUTLINES
15.80
15.24
36.0
35.0
h
4.0
max
5.1
max
3.9
3.4
0.51
min
M
0.254
0.32 max
1.7
max
0.53
max
2.54
(13x)
15.24
17.15
1.7 max
15.90
MSA264
28
15
14.1
13.7
1
14
Dimensions in mm.
Fig.17 Plastic dual in-line package; 28 leads (600 mil) with internal heat spreader (SOT117-1).
June 1994
19
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
18.1
17.7
7.6
7.4
A
10.65
10.00
0.1 S
S
0.9
0.4
(4x)
28
15
1.1
1.0
2.45
2.25
2.65
0.3
0.1
0.32
2.35
0.23
pin 1
index
1.1
0.5
o
0 to 8
1
14
detail A
MBC236 - 1
0.49
0.36
0.25 M
(28x)
1.27
Dimensions in mm.
Fig.18 Plastic small outline package; 28 leads; large body (SOT136-1).
June 1994
20
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
SOLDERING
Plastic dual in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
BY SOLDER PASTE REFLOW
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.
REPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.
REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
Plastic small-outline packages
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)
BY WAVE
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
June 1994
21
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
June 1994
22
Philips Semiconductors
Product specification
Video analog input interface
TDA8708A
NOTES
June 1994
23
Philips Semiconductors – a worldwide company
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Norway: Box 1, Manglerud 0612, OSLO,
BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367
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Fax. (021)577035/5874546.
Tel. (01)60 101-1236, Fax. (01)60 101-1211
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Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474
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Apartado 300, 2795 LINDA-A-VELHA,
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Tel. (011)821-2327, Fax. (011)829-1849
Canada: INTEGRATED CIRCUITS:
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. (800)234-7381, Fax. (708)296-8556
DISCRETE SEMICONDUCTORS: 601 Milner Ave,
SCARBOROUGH, ONTARIO, M1B 1M8,
Tel. (0416)292 5161 ext. 2336, Fax. (0416)292 4477
Tel. (65)350 2000, Fax. (65)251 6500
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Fax. (571)217 4549
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. (032)88 2636, Fax. (031)57 1949
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Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382.
Tel. (9)0-50261, Fax. (9)0-520971
France: 4 Rue du Port-aux-Vins, BP317,
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Bangkok 10260, THAILAND,
Tel. (662)398-0141, Fax. (662)398-3319.
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P.O. Box 10 63 23, 20043 HAMBURG,
Tel. (040)3296-0, Fax. (040)3296 213.
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Tel. (0212)279 2770, Fax. (0212)269 3094
Tel. (01)4894 339/4894 911, Fax. (01)4814 240
United Kingdom: Philips Semiconductors Limited, P.O. Box 65,
Philips House, Torrington Place, LONDON, WC1E 7HD,
Tel. (071)436 41 44, Fax. (071)323 03 42
Hong Kong: PHILIPS HONG KONG Ltd., Components Div.,
6/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T.,
Tel. (852)424 5121, Fax. (852)428 6729
India: Philips INDIA Ltd, Components Dept,
Shivsagar Estate, A Block ,
Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. (022)4938 541, Fax. (022)4938 722
Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,
P.O. Box 4252, JAKARTA 12950,
United States:INTEGRATED CIRCUITS:
811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. (800)234-7381, Fax. (708)296-8556
DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd.,
P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404,
Tel. (800)447-3762 and (407)881-3200, Fax. (407)881-3300
Uruguay: Coronel Mora 433, MONTEVIDEO,
Tel. (021)5201 122, Fax. (021)5205 189
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. (02)70-4044, Fax. (02)92 0601
For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BAF-1,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-724825
Tel. (01)640 000, Fax. (01)640 200
Italy: PHILIPS COMPONENTS S.r.l.,
Viale F. Testi, 327, 20162 MILANO,
Tel. (02)6752.3302, Fax. (02)6752 3300.
Japan: Philips Bldg 13-37, Kohnan2-chome, Minato-ku, TOKYO 108,
SCD31
© Philips Electronics N.V. 1994
Tel. (03)3740 5028, Fax. (03)3740 0580
Korea: (Republic of) Philips House, 260-199 Itaewon-dong,
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
Yongsan-ku, SEOUL, Tel. (02)794-5011, Fax. (02)798-8022
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,
SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880
Mexico: Philips Components, 5900 Gateway East, Suite 200,
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556
Printed in The Netherlands
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB
Tel. (040)783749, Fax. (040)788399
533061/1500/05/pp24
Date of release: June 1994
9397 734 20011
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. (09)849-4160, Fax. (09)849-7811
Document order number:
Philips Semiconductors
相关型号：
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