TDA8758G [NXP]
YC 8-bit low-power analog-to-digital video interface; YC 8位低功耗模拟 - 数字视频接口
| 型号： | TDA8758G |
| 厂家： | 
NXP |
| 描述： | YC 8-bit low-power analog-to-digital video interface |
| 文件： | 总24页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8758
YC 8-bit low-power
analog-to-digital video interface
1996 Feb 01
Product specification
Supersedes data of 1995 Mar 22
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital
video interface
TDA8758
FEATURES
APPLICATIONS
• Two 8-bit ADCs:
• Video signal decoding
• Digital picture processing
• Frame grabbing
– one Luminance or CVBS channel
– one Chrominance channel
• Sampling rate up to 32 MHz
• Multimedia with the Philips Desktop Video chip set (and
especially SAA7196 multistandard decoder and scaler).
• Binary or two's complement 3-state TTL outputs for
each channel
GENERAL DESCRIPTION
• Internal reference voltage regulator
• TTL-compatible digital inputs and outputs
• Power dissipation of 530 mW (typical)
The TDA8758 is an 8-bit video high-speed low-power
analog-to-digital conversion (ADC) interface for YC and
CVBS signal processing. It converts 1-of-3 CVBS input
signals or 1-of-2 YC input signals into binary or two’s
complement words at a sampling rate of 32 MHz.
All analog signal inputs are digitally clamped and an ADC
interface is provided on the Y/CVBS channel. A fast
precharge on clamp and AGC is provided for start-up.
All digital inputs and outputs are TTL compatible.
• Input selector circuit (five selectable video inputs for
CVBS or YC processing)
• Peak white enable input
• Clamp and Automatic Gain Control (AGC) functions for
Y/CVBS channel (clamping on code 64 and Peak White
level control at code 255)
• Clamp function for C channel (code 128)
• No sample-and-hold circuit required.
QUICK REFERENCE DATA
SYMBOL
VCCA
PARAMETER
analog supply voltage
CONDITIONS
MIN.
4.75
TYP.
5.0
MAX.
5.25
UNIT
V
VCCD
VCCO
ICCA
ICCD
ICCO
ILE
digital supply voltage
4.75
5.0
5.0
59
5.25
5.25
70
V
output stages supply voltage
analog supply current
digital supply current
4.75
−
V
mA
mA
mA
LSB
LSB
bits
−
28
40
output supply current
CL = 15 pF
−
19
28
DC integral linearity error
DC differential linearity error
−
±0.75
±0.4
7.1
±1.5
±1.0
−
DLE
EB
−
effective bits
(from video input to digital outputs)
fclk = 32 MHz;
fi = 4.43 MHz
−
fclk(max)
B
maximum clock frequency
30
32
15
−
−
MHz
MHz
maximum −3 dB bandwidth
full-scale; 0 dB gain
−
(input preamplifier)
αct
crosstalk between Y and C channels
and each video input
−
−
−63
−55
dB
Ptot
total power dissipation
530
724
mW
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA8758G
LQFP48
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm
SOT313-2
1996 Feb 01
2
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
BLOCK DIAGRAM
V
CCA
REG1 REG2
DEC2
DEC1
V
V
SEL2
5
CCD
CCO2
SDN
8
DEC3
15
V
V
CCO1
CCA
ANOUTC
C
CLPC
10
21
41
32
48
45
44
17
1
46
2
4
CLAMP
LEVEL 128
C7 to C0
8
CHROM2
CHROM1
ADC
TTL
33
to
40
COMPARATOR
OFC
CLK
OFY
47
42
TDA8758
6
TIMING
INPUT
CVBS3
GENERATOR
SELECTOR
22
COMPARATORS
ADC
9
23
to
30
Y2/CVBS2
Y1/CVBS1
AGC &
CLAMP 64
11
TTL
Y7 to Y0
8
12
14
19 20
7
13
16
31
43
18
3
C
C
MGB469 - 1
CLPY
AGC
ANOUTY
SEL1
GATE A
PWE
OGND2
DGND
AGND
OGND1
GATE B
Fig.1 Block diagram.
1996 Feb 01
3
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
PINNING
SYMBOL
PIN
DESCRIPTION
DEC1
1
decoupling input 1
CHROM2
AGND
CHROM1
SEL2
CVBS3
CCLPY
SDN
2
chrominance analog voltage input 2
analog ground
3
4
chrominance analog voltage input 1
selection control input 2
5
6
luminance analog voltage input 3
Y channel clamping capacitor
stabilizer decoupling node
luminance analog voltage input 2
analog supply voltage (+5 V)
luminance analog voltage input 1
selection control input 1
7
8
Y2/CVBS2
VCCA
Y1/CVBS1
SEL1
CAGC
PWE
DEC3
ANOUTY
REG2
DGND
GATE A
GATE B
VCCD
OFY
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
AGC capacitor
peak white enable input (active LOW)
decoupling input 3
analog output for Y channel
decoupling input 2 (internal stabilization loop decoupling)
digital ground
AGC control input
clamp control input
digital supply voltage (+5 V)
Y channel output format/chip enable (3-state input)
Y channel data output; bit 7 (MSB)
Y channel data output; bit 6
Y channel data output; bit 5
Y channel data output; bit 4
Y channel data output; bit 3
Y channel data output; bit 2
Y channel data output; bit 1
Y channel data output; bit 0 (LSB)
output ground 2
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
OGND2
VCCO2
C7
output supply voltage 2 (+5 V)
C channel data output; bit 7 (MSB)
C channel data output; bit 6
C channel data output; bit 5
C channel data output; bit 4
C channel data output; bit 3
C channel data output; bit 2
C channel data output; bit 1
C channel data output; bit 0 (LSB)
C6
C5
C4
C3
C2
C1
C0
1996 Feb 01
4
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
SYMBOL
PIN
DESCRIPTION
VCCO1
CLK
41
42
43
44
45
46
47
48
output supply voltage 1 (+5 V)
clock input
OGND1
REG1
output ground 1
decoupling input 1 (internal stabilization loop decoupling)
analog output for C channel
ANOUTC
DEC2
OFC
decoupling input 2
C channel output format/chip enable (3-state input)
C channel clamping capacitor
CCLPC
pin 1
index
corner
1
2
36 C4
35 C5
DEC1
CHROM2
3
34
33
32
31
30
29
28
AGND
CHROM1
SEL2
C6
4
C7
V
5
CCO2
CVBS3
6
OGND2
Y0
TDA8758
C
7
CLPY
SDN
8
Y1
Y2/CVBS2
9
Y2
V
27 Y3
26
10
11
12
CCA
Y1/CVBS1
SEL1
Y4
25 Y5
MGB470
Fig.2 Pin configuration.
5
1996 Feb 01
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
FUNCTIONAL DESCRIPTION
Synchronization pulses
The TDA8758 provides a simple interface between CVBS
or Y/C analog signals and a digital colour decoder.
GATE A and GATE B pulses are synchronization pulses
occurring during the sync period and rear porch
respectively. They should be distinct.
Video inputs selection
On the Y channel, the digital output of the ADC is
compared to internal digital reference levels. The resultant
outputs control the charge or discharge current of a
capacitor connected to the CAGC pin. The voltage across
this capacitor controls the gain of the video amplifier.
This is the control loop.
The input selector allows a choice from different video
sources, and has one of the following configurations:
A: Two Y/C and one CVBS signals
B: One Y/C and two CVBS signals
C: Three CVBS signals (only the Y channel is used).
The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that sync pulse of
the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 1 at the converter Y output.
As the black level is digital level 64, the sync pulse will
have a digital amplitude of 64 LSBs.
The wiring of the five video inputs (pins 2, 4, 6, 9 and 11)
and the control of the two selection inputs (pins 5 and 12)
will depend on the available video sources.
• In configuration A, connect as follows:
– Y1 to pin 11
– C1 to pin 4
The Peak White control loop is active when the selection
pin PWE is LOW. Then, if the Y video signal exceeds the
digital code of 255, it will be limited to avoid any over-range
of the converter.
– Y2 to pin 9
– C2 to pin 2
– CVBS3 to pin 6.
The clamp level control is accomplished by using the same
techniques as used for the gain control. On both Y and C
channels, the black level digital comparators are active
during a positive-going pulse at the GATE B input. On the
Y channel, the clamping capacitor connected to the CCLPY
pin will be charged or discharged to adjust the digital
output to code 64. On the C channel, the clamping
capacitor connected to the CCLPC pin will be charged or
discharged to adjust the digital output to code 128.
Keep SEL2 (pin 5) LOW and select Y1/C1 or Y2/C2 by
switching SEL1 (pin 12).
CVBS3 is selected with SEL1 and SEL2 HIGH.
• In configuration B, replace Y1 (or Y2) by a CVBS input
(no more C1 or C2). The selection mode is the same.
• In configuration C, connect as follows:
– CVBS1 to pin 11
– CVBS2 to pin 9
– CVBS3 to pin 6.
Use both SEL1 and SEL2 to select inputs.
Remark: the video inputs selection is a static selection.
1996 Feb 01
6
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
analog supply voltage
CONDITIONS
MIN.
−0.3
MAX.
+7.0
UNIT
VCCA
VCCD
VCCO
∆VCC
V
V
V
V
V
V
V
V
digital supply voltage
−0.3
−0.3
−1.0
−1.0
−1.0
−
+7.0
+7.0
+1.0
+1.0
+1.0
5.0
output supply voltage
supply voltage difference between VCCA and VCCD
supply voltage difference between VCCO and VCCD
supply voltage difference between VCCA and VCCO
input voltage
VI
referenced to AGND
Vclk(p-p)
IO
AC input voltage for switching (peak-to-peak value) referenced to DGND
−
VCCO
+6
output current
−
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
operating ambient temperature
junction temperature
−55
0
+150
+70
−
+150
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
72
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
K/W
CHARACTERISTICS
VCCA = V10 to V3 = 4.75 to 5.25 V; VCCD = V21 to V18 = 4.75 to 5.25 V; VCCO1 = V41 to V43 = 4.75 to 5.25 V;
VCC02 = V32 to V31 = 4.75 to 5.25 V; AGND and DGND shorted together; VCCA to VCCD = −0.25 to +0.25 V;
VCCO to VCCD = −0.25 to +0.25 V; VCCA to VCCO = −0.25 to +0.25 V; Tamb = 0 to +70 °C; typical values measured
at VCCA = VCCD = VCCO = 5 V and Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VCCA
analog supply voltage
4.75
5.0
5.25
5.25
5.25
70
V
VCCD
VCCO
ICCA
digital supply voltage
4.75
4.75
−
5.0
5.0
59
28
19
V
output stages supply voltage
analog supply current
digital supply current
V
mA
mA
mA
ICCD
−
40
ICCOtot
total output supply current
CL = 15 pF
−
28
Video amplifier inputs
Y1/CVBS1, Y2/CVBS2, CVBS3, CHROM1 AND CHROM2 INPUTS
VI(p-p)
input voltage (peak-to-peak value)
AGC load with external
capacitor; note 1
Y channel
0.7
−
−
1.4
−
V
C channel
1.0
25
2
V
|Zi|
input impedance
input capacitance
fi = 6 MHz
fi = 6 MHz
−
−
kΩ
pF
CI
−
−
1996 Feb 01
7
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SEL1 AND SEL2 TTL INPUTS; see Table 1
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
V
2.0
−400
−
VCCD
−
V
VI = 0.4 V
µA
µA
IIH
VI = 2.7 V
20
GATE A AND GATE B TTL INPUTS; see Figs 5 and 6
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
0
−
−
−
−
0.8
VCCD
−
V
2.0
−400
−
V
VI = 0.4 V
VI = 2.7 V
µA
µA
IIH
20
AGC INPUT (PIN 13); see Fig.8
V13(min)
V13(max)
I12
AGC voltage for minimum gain at −3 dB
−
−
3.3
−
−
V
V
AGC voltage for maximum gain at +3 dB
AGC output current
3.75
see Table 2
C-CHANNEL CLAMP INPUT (PIN 48)
V48
I48
CLAMP voltage for code 128 output
CLAMP output current
−
−
−
3.45
−
V
see Table 3
Y-CHANNEL CLAMP INPUT (PIN 7)
V7
I7
CLAMP voltage for code 64 output
CLAMP output current
3.70
−
V
see Table 3
Video amplifier dynamic characteristics
αct
crosstalk between video inputs
(pins 2, 4, 6, 9 and 11)
VCCA = 4.75 to 5.25 V
−63
−55
dB
B
−3 dB bandwidth
−
15
−
MHz
dB
∆G
Gstab
gain range
−3
−
+3
gain stability as a function of:
supply voltage
fi = 4.43 MHz
−
−
−
−
0.5
6
%
%
supply voltage and temperature
Analog-to-digital converter inputs
CLK INPUT (PIN 42)
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
input capacitance
0
−
−
−
−
2
0.8
VCCD
−
V
2.0
−400
−
V
Vclk = 0.4 V
Vclk = 2.7 V
fclk = 32 MHz
µA
µA
pF
IIH
CI
20
−
−
1996 Feb 01
8
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
OFY AND OFC INPUTS; 3-STATE; see Table 4
VIL
VIH
VI
LOW level input voltage
0
−
−
0.2
V
HIGH level input voltage
input voltage in high impedance state
LOW level input current
2.6
−
VCCD
−
V
1.15
−300
500
V
IIL
−370
−
−
µA
µA
IIH
HIGH level input current
700
Analog-to-digital converter outputs
ANOUTY AND ANOUTC OUTPUTS (PINS 16 AND 45); see Table 5
VANOUT
VANOUT
output voltage
output voltage
digital output = 00
digital output = 255
−
−
−
2.6
3.6
1.0
−
−
−
V
V
V
VANOUT(p-p) output voltage amplitude
(peak-to-peak value)
DIGITAL OUTPUTS Y0 TO Y7, C0 TO C7
VOL
VOH
LOW level output voltage
HIGH level output voltage
IOL = 2 mA
0
−
−
0.6
V
V
IOL = −0.4 mA
2.4
VCCD
Switching characteristics; see Fig.9
fclk(max)
tCPH
CLK input maximum frequency
clock pulse width HIGH
clock pulse with LOW
note 2
30
12
12
32
−
−
−
−
MHz
ns
tCPL
−
ns
Analog signal processing from video input to digital output on both channels; 0 dB gain (fclk = 32 MHz)
INL
DC integral non-linearity
DC differential non-linearity
AC integral non linearity
AC differential non-linearity
total harmonic distortion
effective bits
−
−
−
−
−
−
−
±0.75 ±1.5
LSB
LSB
LSB
LSB
dB
DNL
AINL
ADNL
THD
EB
±0.4
±1.5
±0.5
−52
7.1
±1.0
−
fi = 4.43 MHz
fi = 4.43 MHz
note 3
−
−
fi = 4.43 MHz; note 4
−
bits
%
Gdiff
differential gain
V16,45 = 1.0 V (p-p);
see Fig.4; PAL
1.5
3.0
modulated ramp; note 5
ϕdiff
differential phase
see Fig.5; PAL
modulated ramp; note 5
−
−
0.6
1.5
5
deg
%/V
SVRR2
supply voltage ripple rejection
note 6
−
1996 Feb 01
9
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Timing (fclk = 32 MHz); see Fig.9
DIGITAL OUTPUTS (CL = 15 pF)
tds
th
sampling delay time
output hold time
−
2
−
ns
10
−
−
−
ns
ns
µs
td
output delay time
clamp pulse width
15
3
18
−
tW
see Figs 6 and 7
2
3-state output delay times; see Fig.10
tdZH
tdZL
tdHZ
tdLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
−
−
−
−
12
10
58
70
14
12
62
74
ns
ns
ns
ns
Notes
1. 0 dB is obtained at the AGC amplifier when applying VI(p-p) = 1.0 V on Y channel.
2. It is recommended that the rise and fall times of the clock are ≥1 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.
3. THD (total harmonic distortion) is obtained with the addition of the first five harmonics:
F
THD = 20 log---------------------------------------------------------------------------------------------------------------
2
2
2
2
2
(2nd) + (3rd) + (4th) + (5th) + (6th)
a) F being the fundamental harmonic referenced at 0 dB for a full-scale sine wave input.
4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.
5. Measurement carried out using video analyser VM700A, where video analog signal is reconstructed through a
digital-to-analog converter.
6. The supply voltage ripple rejection is the relative variation of the analog signal (full-scale signal at input) for 0.5 V of
supply variation:
∆ (VI (00) – VI (FF) ) × (VI (00) – VI (FF)
)
SVRR2 =
-----------------------------------------------------------------------------------------------------
∆VCCA
1996 Feb 01
10
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
SEL2
SEL2
5
5
2
2
4
CHROM2
CHROM2
C CHANNEL
Y CHANNEL
C CHANNEL
Y CHANNEL
4
6
CHROM1
CHROM1
CVBS3
6
CVBS3
9
9
Y2/CVBS2
Y1/CVBS1
Y2/CVBS2
Y1/CVBS1
11
11
12
12
SEL1
SEL1
(a)
(b)
SEL2
5
2
4
CHROM2
C CHANNEL
Y CHANNEL
CHROM1
CVBS3
6
9
Y2/CVBS2
Y1/CVBS1
11
12
SEL1
MGB471
(c)
Fig.3 Video inputs selector.
Table 1 Video input selection
SEL1
SEL2
X(1)
0
Y-CHANNEL
C-CHANNEL
CHROM1
CHROM2
CHROM2
FIGURE 3
0
1
1
Y1/CVBS1
Y2/CVBS2
CVBS3
(a)
(b)
(c)
1
Note
1. X = don't care.
1996 Feb 01
11
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
Table 2 AGC output current
Table 4 OFY and OFC input coding
DIGITAL
OUTPUT
OFY (or OFC)
Y0 to Y7 (or C0 TO C7)
active, twos complement
high impedance
PWE
GATE A
IAGC
0 µA
0
1
0
0
output < 255
output > 255
output < 0
+540 µA
+8 µA
−8 µA
+540 µA
0 µA
open circuit(1) active, binary
0
1
Note
1. Use C ≥ 10 pF to DGND.
0 < output < 255
output > 255
X(1)
1
1
0
1
output < 0
+8 µA
−8 µA
0 < output < 255
Note
1. X = don't care.
Table 3 CLAMP output current
DIGITAL
OUTPUT
CLAMP
GATE B
ICLAMP
C
1
output < 128
output > 128
X(1)
+54 µA
−54 µA
0 µA
X(1)
Y
0
1
output < 64
64 < output
+54 µA
−54 µA
Note
1. X = don't care.
Table 5 Output coding and ANOUTY (or ANOUTC) voltage (typical values)
BINARY OUTPUTS
TWOS COMPLIMENT
STEP
VI
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Underflow
−
2.6
−
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
1
1
1
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
1
.
.
−
−
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
254
−
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
255
3.6
−
Overflow
1996 Feb 01
12
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
MBE455
1.0
DIFFERENTIAL
GAIN
(%)
(2)
(1)
0.0
1.0
2.0
3.0
(4)
(5)
(3)
(6)
1st
2nd
3rd
4th
5th
6th
step number
(1) = 0.00; (2) = 0.09; (3) = −0.63; (4) = −0.45; (5) = −0.45; (6) = −1.23.
Differential gain = max. (2) − min. (6) = 1.32%.
Fig.4 Typical differential gain result on VM700A.
MBE456
2.0
1.0
0
DIFFERENTIAL
PHASE
(deg)
(1)
(2)
(5)
(6)
(4)
(3)
1.0
2.0
1st
2nd
3rd
4th
5th
6th
step number
(1) = 0.00; (2) = 0.03; (3) = −0.53; (4) = −0.32; (5) = 0.01; (6) = −0.08.
Differential phase = max. (2) − min. (3) = 0.56 deg.
Fig.5 Typical differential phase result on VM700A.
13
1996 Feb 01
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
digital
output
level
255
safety
margin
peak-level gain control
213
standard picture
level
black-level
clamping
64
0
sync-level control
t
time
W
GATE A
GATE B
MGB472
t
W
Fig.6 Control mode Y channel.
digital
output
level
255
black-level
clamping
128
0
time
t
W
GATE B
MGB473
Fig.7 Control mode C-channel.
14
1996 Feb 01
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
MBE463
8
AGC
GAIN
(dB)
6
4
2
0
2
4
6
8
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
voltage (V)
4.0
C
AGC
Dotted line: Typical curve (Tamb = 25 °C; VCC = 5 V).
Full line: Maximum envelope (Tamb = 0 to 70 °C; VCC = 4.75 to 5.25 V).
Fig.8 AGC behaviour as a function temperature and supply voltage for ANOUTY output; fi = 4.43 MHz, Vi = 0 dB.
t
CPL
t
CPH
1.4 V
CLK
sample N
sample N + 1
sample N + 2
V
l
t
t
ds
h
2.4 V
1.4 V
0.4 V
DATA
C0 to C7
Y0 to Y7
DATA
N - 2
DATA
N - 1
DATA
N
DATA
N + 1
t
d
MBE454
Fig.9 Timing diagram.
15
1996 Feb 01
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
V
CCD
OFC
OFY
50 %
dZH
1.15 V
t
t
dHZ
HIGH
90 %
output
data
50 %
HIGH Z
t
t
dZL
dLZ
HIGH Z
output
data
50 %
LOW
10 %
TEST
S1
V
CCD
t
t
t
t
V
CCD
dLZ
dZL
dHZ
dZH
3.3 kΩ
15 pF
V
CCD
GND
GND
S1
TDA8758
OFC
OFY
MBE453
fOFC = fOFY = 100 kHz.
Fig.10 Timing diagram and test conditions of 3-state output delay time.
1996 Feb 01
16
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
APPLICATION INFORMATION
V
AGND
CCA
V
(
CCO1
5 V)
(1)
OFC
ANOUTC
OGND1
3.3
C0
40
C1
39
C2
38
C3
37
CLK
42
1 nF
18
nF
nF
C
CLPC
DEC2
REG1
22 nF
48
47
46
45
44
43
41
DEC1
CHROM2
AGND
AGND
1
2
36
35
C4
C5
1 µF
75 Ω
3
4
34
33
32
31
30
29
28
27
26
25
C6
C7
4.7 µF
4.7 µF
CHROM1
SEL2
75 Ω
V
( 5 V)
5
CCO2
OGND2
Y0
CVBS3
6
75 Ω
TDA8758
18 nF
22 nF
C
CLPY
SDN
7
8
Y1
Y2
Y3
Y4
Y5
AGND
4.7 µF
Y2/CVBS2
75 Ω
9
V
CCA
10
11
12
75 Ω
4.7 µF
Y1/CVBS1
SEL1
13
14
15
16
17
18
19
20
21
22
23
Y7
24
Y6
DEC3
REG2
470
nF
V
C
CCD
5 V)
AGC
1 nF
3.3
nF
MGB476
GATE A
(
(1)
V
PWE
ANOUTY
DGND
GATE B
OFY
AGND
CCA
(1) It is recommended that pin 16 and pin 45 are not loaded in order to avoid any distortion.
Fig.11 Application diagram.
1996 Feb 01
17
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
9
1
61
n
60
U2
10
26
33 CHR7
CHR7
4.7 µF
C27
C26
C25
4
2
34 CHR6
35 CHR5
36 CHR4
37 CHR3
38 CHR2
39 CHR1
40 CHR0
CHROMA1
CHROMA2
Y1/CVBS1
Y2/CVBS2
CVBS3
SEL1
CHROMA IN
CHR6
CHR5
CHR4
CHR3
CHR2
CHR1
CHR0
SAA7151B
4.7 µF
C11
11
9
LUMA IN
CVBS1 IN
CVBS2 IN
4.7 µF
44
27
43
4.7 µF
6
U4
68LLC50
CHR0 to 7
DEC_UV0
12
5
IN0
IN1
23 CVBS7
24 CVBS6
25 CVBS5
26 CVBS4
27 CVBS3
28 CVBS2
29 CVBS1
30 CVBS0
to 7
CHR7
CHR6
CHR5
CHR4
CHR3
CHR2
CHR1
CHR0
13
12
11
10
9
55 DEC_UV7
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
CHR7
CHR6
CHR5
CHR4
CHR3
CHR2
CHR1
CHR0
UV7
56 DEC_UV6
57 DEC_UV5
58 DEC_UV4
59 DEC_UV3
60 DEC_UV2
SEL2
UV6
UV5
UV4
UV3
UV2
UV1
UV0
14
19
20
7
GPSWO
HSY
PWE
GATE A
GATE B
CLMP_Y
CLMP_C
SDN
8
HCL
C12
7
61
DEC_UV1
0.1 µF
C13
6
62 DEC_UV0
CVBS0 to 7
DEC_Y0
to 7
0.1 µF
48
8
TDA8758
45 DEC_Y7
46 DEC_Y6
47 DEC_Y5
48 DEC_Y4
49 DEC_Y3
50 DEC_Y2
53 DEC_Y1
54 DEC_Y0
CVBS7 23
CVBS6 22
CVBS5 21
CVBS4 20
CVBS3 17
CVBS2 16
CVBS1 15
CVBS0 14
220 Ω
D7
D6
D5
D4
D3
D2
D1
D0
42
CVBS7
CVBS6
CVBS5
CVBS4
CVBS3
CVBS2
CVBS1
CVBS0
0.022 µF
C15
C14
C16
CLK
DEC_LLC
R13
0.022 µF
0.022 µF
1
V
DEC1
CC
0.022 µF
C17
46
15
16
45
13
44
17
22
47
41
DEC2
V
V
CCO1
CCO2
32
21
10
CX3
22 µF
V
CCA
CCX4
0.1 µF
DEC3
INADCY
IN_ADC_Y
IN_ADC_C
AGC_CAP
REG1
V
V
CCD
CCA
42
DEC_HREF
HREF
HS
44
INADCC
C18
V
CCA
SDAT
XTAL
31
30
DEC_HS
DEC_VS
0.47 µF
33
XTAL2
VS
SAA7151B
0.047 µF
0.047 µF
C19
C20
31
66
68
34
OGND1
CX12
0.1 µF
XTAL1
XTAL1
GTBS
FSI
4.7 kΩ
43
18
REG2
OGND2
DGND
24
R64
IN0
GPSW1
GPSW2
65
39
32
64
63
MUXC
ODD
25
OE_Y
IN1
V
V
DEC_FI
CC
CC
3
OE_C
AGND
RTCO
FEIN
DEC_RTC
29
HSY
HSY
1
2
3
1
26
HCL
HCL
JP14
JP15
2
GPSWO
GPSWO
RSVRD
IICSA
27
DEC_LLC
LL27
CREF
LFCO
RES
48
37
24
39
43
4
3
DEC_REF
36
1
36
LFCO
HEADER 3
3SIP100
HEADER 3
3SIP100
3
RES
TDA8758
40
41
SDA
SCL
SDA
SCL
V
CCA
PAD100
TEST PT
J10
PAD100
TEST PT
J9
V
CC
12
25
37
5
1
V
SP
AP
13
DDA
2
V
DD1
INADCY
INADCC
18
35
V
V
3
2
1
DD2
SSA
V
CX14
0.1 µF
CC
28
52
19
38
51
67
V
V
DD3
SS1
JP5
V
V
V
DD4
SS2
CC
CX5
0.1 µF
CX6
22 µF
V
HEADER 3
3SIP100
SS3
V
CC
V
SS4
V
CC
PAD100
J24
GROUND GROUND
PAD100
J25
V
CCA
U3
GND
33 Ω R14
10
7
LL1 to 5A
LL3A
LFCO
LFCO2
CE
LL1 to 5B
LL3B
1
3
2
4
DEC_LLC
DEC_LLC2
DEC_CREF
RES
33 Ω
14
20
16
JP16
11
19
2
R15
5
7
6
8
LFCOSEL
33 Ω
V
V
CC
CCA
15
3
CLKREF
PORD
XTAL2
4.7 kΩ
C21
R16
Y2
SAA7197
RES
10 pF
1
4
HEADER
4X2
8HH100
24.576 MHz
2SIP100
R12
MS
V
C24
CX7
0.1 µF
CX13
0.1 µF
SSA
12
5
6
0.1 µF
RES
RES
V
XTAL1
SSD
22 kΩ
9
C22
C23
V
V
DDA
SSD
8
13
18
10 pF
0.001 µF
R11
V
V
DDD
SSD
17
L2
V
V
DDD
SSD
10 µH
20SOP300
MBH012
Fig.12 Example of system application (DPC71 evaluation board).
18
1996 Feb 01
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
PACKAGE OUTLINE
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
SOT313-2
c
y
X
36
25
A
E
37
24
Z
E
Q
e
H
E
A
2
A
(A )
3
A
1
w
p
M
θ
pin 1 index
b
L
p
L
13
48
detail X
1
12
Z
v
M
M
D
A
e
w
M
b
p
D
B
H
v
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
Q
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.20 1.45
0.05 1.35
0.27 0.18 7.1
0.17 0.12 6.9
7.1
6.9
9.15 9.15
8.85 8.85
0.75 0.69
0.45 0.59
0.95 0.95
0.55 0.55
1.60
mm
0.25
0.5
1.0
0.2 0.12 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-06-15
94-12-19
SOT313-2
1996 Feb 01
19
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
If wave soldering cannot be avoided, the following
conditions must be observed:
SOLDERING
Introduction
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all LQFP
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
1996 Feb 01
20
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Feb 01
21
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
NOTES
1996 Feb 01
22
Philips Semiconductors
Product specification
YC 8-bit low-power analog-to-digital video
interface
TDA8758
NOTES
1996 Feb 01
23
Philips Semiconductors – a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)
BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. (63) 2 816 6380, Fax. (63) 2 817 3474
Tel. (02)805 4455, Fax. (02)805 4466
Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,
Tel. (01)60 101-1236, Fax. (01)60 101-1211
Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,
Portugal: PHILIPS PORTUGUESA, S.A.,
Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. (01)4163160/4163333, Fax. (01)4163174/4163366
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. (65)350 2000, Fax. (65)251 6500
South Africa: S.A. PHILIPS Pty Ltd.,
Tel. (31)40-2783749, Fax. (31)40-2788399
Brazil: Rua do Rocio 220 - 5th floor, Suite 51,
CEP: 04552-903-SÃO PAULO-SP, Brazil,
P.O. Box 7383 (01064-970),
195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430, Johannesburg 2000,
Tel. (011)470-5911, Fax. (011)470-5494
Tel. (011)821-2333, Fax. (011)829-1849
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS:
Tel. (800) 234-7381, Fax. (708) 296-8556
Chile: Av. Santa Maria 0760, SANTIAGO,
Spain: Balmes 22, 08007 BARCELONA,
Tel. (03)301 6312, Fax. (03)301 42 43
Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,
Tel. (0)8-632 2000, Fax. (0)8-632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. (02)773 816, Fax. (02)777 6730
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. (852)2319 7888, Fax. (852)2319 7700
Tel. (01)488 2211, Fax. (01)481 77 30
Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West
Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. (886) 2 382 4443, Fax. (886) 2 382 4444
Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,
77621 BOGOTA, Tel. (571)249 7624/(571)217 4609,
Fax. (571)217 4549
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. (66) 2 745-4090, Fax. (66) 2 398-0793
Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. (0212)279 27 70, Fax. (0212)282 67 07
Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165,
Denmark: Prags Boulevard 80, PB 1919, DK-2300
COPENHAGEN S, Tel. (45)32 88 26 36, Fax. (45)31 57 19 49
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. (358)0-615 800, Fax. (358)0-61580 920
France: 4 Rue du Port-aux-Vins, BP317,
92156 SURESNES Cedex,
Tel. (01)4099 6161, Fax. (01)4099 6427
Germany: P.O. Box 10 51 40, 20035 HAMBURG,
252148 KIEV, Tel. 380-44-4760297, Fax. 380-44-4766991
United Kingdom: Philips Semiconductors LTD.,
276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. (0181)730-5000, Fax. (0181)754-8421
United States:811 East Arques Avenue, SUNNYVALE,
CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556
Uruguay: Coronel Mora 433, MONTEVIDEO,
Tel. (040)23 53 60, Fax. (040)23 53 63 00
Greece: No. 15, 25th March Street, GR 17778 TAVROS,
Tel. (01)4894 339/4894 911, Fax. (01)4814 240
India: Philips INDIA Ltd, Shivsagar Estate, A Block,
Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. (022)4938 541, Fax. (022)4938 722
Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,
P.O. Box 4252, JAKARTA 12950,
Tel. (02)70-4044, Fax. (02)92 0601
Tel. (021)5201 122, Fax. (021)5205 189
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. (01)7640 000, Fax. (01)7640 200
Italy: PHILIPS SEMICONDUCTORS S.r.l.,
Piazza IV Novembre 3, 20124 MILANO,
Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557
Japan: Philips Bldg 13-37, Kohnan2-chome, Minato-ku, TOKYO 108,
Tel. (03)3740 5130, Fax. (03)3740 5077
Korea: Philips House, 260-199 Itaewon-dong,
Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-2724825
Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415
SCDS47
© Philips Electronics N.V. 1996
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,
SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,
Tel. 9-5(800)234-7381, Fax. (708)296-8556
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. (040)2783749, Fax. (040)2788399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
Tel. (09)849-4160, Fax. (09)849-7811
Norway: Box 1, Manglerud 0612, OSLO,
Printed in The Netherlands
Tel. (022)74 8000, Fax. (022)74 8341
Pakistan: Philips Electrical Industries of Pakistan Ltd.,
Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. (021)587 4641-49,
Fax. (021)577035/5874546
537021/1100/03/pp24
Date of release: 1996 Feb 01
9397 750 00606
Document order number:
相关型号：
TDA8758G/C1
IC 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48, PLASTIC, SOT-313-2, LQFP-48, Analog to Digital ConverterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8758GBE
IC 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48, PLASTIC, SOT-313-2, LQFP-48, Analog to Digital ConverterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8758GBE-S
暂无描述Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8758GP
暂无描述Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8758GPB
暂无描述Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8760
10-bit high-speed analog-to-digital converterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8760K
10-bit high-speed analog-to-digital converterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8760K/2
10-bit high-speed analog-to-digital converterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8760K/4
10-bit high-speed analog-to-digital converterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
TDA8760K/4A
IC 1-CH 10-BIT DELTA-SIGMA ADC, PARALLEL ACCESS, PQCC44, Analog to Digital ConverterWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
NXP
©2020 ICPDF网 联系我们和版权申明