TDA8764AHL [NXP]
10-bit high-speed low-power ADC; 10位高速低功耗ADC
| 型号： | TDA8764AHL |
| 厂家： | 
NXP |
| 描述： | 10-bit high-speed low-power ADC |
| 文件： | 总24页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8764A
10-bit high-speed low-power ADC
Product specification
2000 Jul 03
File under Integrated Circuits, IC11
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
FEATURES
APPLICATIONS
• 10-bit resolution (binary or gray code)
• Sampling rate up to 60 MHz
• DC sampling allowed
High-speed analog-to-digital conversion for:
• Video data digitizing
• Radar pulse analysis
• One clock cycle conversion only
• High energy physics research
• Transient signal analysis
• Σ∆ modulators
• High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 5 MHz full-scale
input at fclk = 60 MHz)
• Medical imaging.
• No missing codes guaranteed
• In Range (IR) CMOS output
GENERAL DESCRIPTION
• TTL and CMOS levels compatible digital inputs
• 2.7 to 3.6 V CMOS digital outputs
• Low-level AC clock input signal allowed
• Power dissipation only 312 mW
The TDA8764A is a 10-bit high-speed low-power
Analog-to-Digital Converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary or gray coded digital words at a maximum
sampling rate of 60 MHz. All digital inputs and outputs are
TTL and CMOS compatible, although a low-level sine
wave clock input signal is allowed.
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
The device requires an external source to drive its
reference ladder.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
SOT341-1
SOT401-1
TDA8764ATS/6
TDA8764AHL/6
SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm
LQFP32 plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
4.75
4.75
2.7
−
TYP.
5.0
MAX. UNIT
VCCA
VCCD
VCCO
ICCA
analog supply voltage
digital supply voltage
5.25
5.25
3.6
37
V
5.0
3.3
29
V
output stages supply voltage
analog supply current
V
mA
mA
mA
LSB
LSB
MHz
ICCD
digital supply current
−
33
40
ICCO
output stages supply current
integral non-linearity
fclk = 60 MHz; ramp input
−
0.5
±0.8
±0.35
−
2.0
±2
INL
f
clk = 60 MHz; ramp input
clk = 60 MHz; ramp input
−
DNL
fclk(max)
differential non-linearity
maximum clock frequency
f
−
±0.9
−
TDA8764ATS and
TDA8764AHL
60
Ptot
total power dissipation
fclk = 60 MHz; ramp input
−
312
411
mW
2000 Jul 03
2
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
BLOCK DIAGRAM
V
V
CCD
CLK
1 (5)
OE GRAY
CCA
3 (7)
11 (17) 10
(16)
15 (21)
CLOCK DRIVER
(6) 2
TC
9 (15)
V
RT
(31) 25
(30) 24
(29) 23
(28) 22
(27) 21
(26) 20
(25) 19
(24) 18
(23) 17
(22) 16
D9
D8
D7
D6
D5
D4
D3
D2
MSB
V
8 (14)
7 (13)
analog
voltage input
I
ANALOG-TO-DIGITAL
CONVERTER
CMOS
OUTPUTS
data outputs
LATCHES
V
RM
R
LAD
D1
D0
LSB
(19) 13
6 (12)
V
V
RB
CCO
(2) 26
CMOS
OUTPUT
IR output
IN-RANGE LATCH
TDA8764A
5, 27, 28
4 (8)
AGND
12 (18)
DGND
(9, 1, 3, 4, 10, 11, 32)
14 (20)
OGND
FCE253
n.c.
The pin numbers given in parenthesis refer to the TDA8764AHL.
Fig.1 Block diagram.
2000 Jul 03
3
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
PINNING
PIN
SYMBOL
DESCRIPTION
TDA8764ATS
TDA8764AHL
CLK
TC
1
2
5
clock input
6
twos complement input (active LOW)
analog supply voltage (5 V)
analog ground
VCCA
AGND
n.c.
VRB
VRM
VI
3
7
4
8
5
9
not connected
6
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
2
reference voltage BOTTOM input
reference voltage MIDDLE input
analog input voltage
reference voltage TOP input
output enable input (active LOW)
digital supply voltage (5 V)
digital ground
7
8
VRT
OE
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
−
VCCD
DGND
VCCO
OGND
GRAY
D0
supply voltage for output stages (2.7 to 3.6 V)
output ground
gray code input (active HIGH)
data output; bit 0 (LSB)
data output; bit 1
D1
D2
data output; bit 2
D3
data output; bit 3
D4
data output; bit 4
D5
data output; bit 5
D6
data output; bit 6
D7
data output; bit 7
D8
data output; bit 8
D9
data output; bit 9 (MSB)
in range data output
not connected
IR
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
1
3
not connected
4
not connected
−
10
11
32
not connected
−
not connected
−
not connected
2000 Jul 03
4
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, halfpage
n.c.
CLK
TC
1
28
27 n.c.
IR
2
3
V
26
CCA
AGND
n.c.
4
25 D9
24 D8
23 D7
22 D6
5
V
6
RB
V
7
RM
TDA8764ATS
V
I
D5
8
21
20 D4
D3
V
9
RT
OE
10
11
19
V
18 D2
CCD
DGND 12
17 D1
V
13
16 D0
CCO
OGND 14
15 GRAY
FCE254
Fig.2 Pin configuration (SSOP28).
n.c.
1
2
3
4
5
6
7
8
24 D2
23 D1
22 D0
IR
n.c.
n.c.
GRAY
21
20
19
18
17
TDA8764AHL
CLK
TC
OGND
V
CCO
V
DGND
CCA
V
AGND
CCD
FCE255
Fig.3 Pin configuration (LQFP32).
5
2000 Jul 03
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
analog supply voltage
CONDITIONS
note 1
MIN.
−0.3
MAX.
+7.0
UNIT
VCCA
VCCD
VCCO
∆VCC
V
V
V
digital supply voltage
note 1
note 1
−0.3
−0.3
+7.0
+7.0
output stages supply voltage
supply voltage difference between
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−1.0
−1.0
−1.0
−0.3
−
+1.0
+4.0
+4.0
+7.0
VCCD
10
V
V
V
V
V
VI
input voltage
referenced to AGND
Vi(sw)(p-p) AC input voltage for switching (peak-to-peak value) referenced to DGND
IO
output current
−
mA
°C
°C
°C
Tstg
Tamb
Tj
storage temperature
ambient temperature
junction temperature
−55
−40
−
+150
+85
150
Note
1. The supply voltages VCCA, VCCD and VCCO may have any value between −0.3 and +7.0 V provided that the supply
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
in free air
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient
SSOP28
LQFP32
110
90
K/W
K/W
2000 Jul 03
6
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
CHARACTERISTICS
VCCA = 4.75 to 5.25 V; VCCD = 4.75 to 5.25 V; VCCO = 2.7 to 3.6 V; AGND and DGND shorted together;
amb = 0 to 70 °C; typical values measured at VCCA = VCCD = 5 V; VCCO = 3.3 V; VRB = 1.3 V; VRT = 3.7 V; CL = 10 pF
and Tamb = 25 °C; unless otherwise specified.
T
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCCA
VCCD
VCCO
∆VCC
analog supply voltage
digital supply voltage
4.75
5.0
5.25
V
4.75
2.7
5.0
3.3
5.25
3.6
V
V
output stages supply voltage
supply voltage difference
between
V
V
V
CCA − VCCD
CCA − VCCO
CCD − VCCO
−0.20
−0.20
−0.20
−
−
+0.20
+2.55
+2.55
37
V
−
V
−
V
ICCA
ICCD
ICCO
analog supply current
digital supply current
29
33
0.5
mA
mA
mA
−
40
output stages supply current
fclk = 60 MHz; ramp input
−
2.0
Inputs
PIN CLK (REFERENCED TO DGND); note 1
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input capacitance
0
−
−
0
2
2
0.8
VCCD
+1
V
2
V
VCLK = 0.8 V
VCLK = 2 V
−1
−
µA
µA
pF
IIH
Ci
10
−
−
PINS OE; TC AND GRAY (REFERENCED TO DGND); see Tables 3 and 4
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
0
−
−
−
−
0.8
VCCD
−
V
2
V
VIL = 0.8 V
VIH = 2 V
−1
−
µA
µA
IIH
1
PIN VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND)
IIL
IIH
Yi
LOW-level input current
HIGH-level input current
input admittance
VI = VRB = 1.3 V
VI = VRT = 3.7 V
fi = 5 MHz; note 2
−
−
0
−
−
µA
µA
55
Ri input resistance
−
45
5
−
kΩ
Ci input capacitance
3
7
pF
2000 Jul 03
7
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Reference voltages for the resistor ladder; see Table 1
VRB
reference voltage BOTTOM
reference voltage TOP
1.2
3.4
2.2
1.3
2.2
CCA − 0.8
V
VRT
3.7
2.4
V
V
V
Vdiff(ref)
differential reference voltage
3.2
V
RT − VRB
Iref
reference current
resistor ladder
Vdiff = 2.4 V
−
−
−
−
−
−
17.6
136
−
mA
Ω
RLAD
TCRLAD
−
temperature coefficient of the
resistor ladder
1860
253
−
ppm
mΩ/K
mV
mV
V
−
Voffset(B)
Voffset(T)
VI(p-p)
offset voltage BOTTOM
offset voltage TOP
Vdiff = 2.4 V; note 3
Vdiff = 2.4 V; note 3
Vdiff = 2.4 V; note 4
200
−
190
−
analog input voltage
(peak-to-peak value)
1.95
2.01
2.10
Outputs
PINS D9 TO D0 AND IR (REFERENCED TO OGND)
VOL
VOH
IOZ
LOW-level output voltage
HIGH-level output voltage
output current in 3-state mode
IOL = 1 mA
0
−
−
0.5
V
IOH = −1 mA
V
CCO − 0.5 −
VCCO
+20
V
0.5 V < VO < VCCO
−20
µA
Switching characteristics
PIN CLK; see Fig.5; note 1
fclk(max)
tCPH
maximum clock frequency
60
−
−
−
−
−
−
MHz
ns
clock pulse width HIGH
clock pulse width LOW
Tamb = 25 °C
Tamb = 25 °C
7.0
3.5
tCPL
ns
Analog signal processing
LINEARITY
INL
integral non-linearity
fclk = 60 MHz; ramp input
−
−
±0.8
±2
LSB
LSB
DNL
differential non-linearity
f
clk = 60 MHz; ramp input;
±0.35 ±0.9
no missing code
Eoffset
EG
offset error
middle code
−
−
±1
−
−
LSB
%
gain error (from device to device) note 5
±0.5
2000 Jul 03
8
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
BANDWIDTH (fCLK = 60 MHZ)
B
analog bandwidth
full-scale sine wave;
note 6
−
−
−
30
−
−
−
MHz
MHz
MHz
75% full-scale sine wave;
note 6
45
small signal at mid-scale;
VI = ±10 LSB at
700
code 512; note 6
tstLH
tstHL
analog input settling time
LOW-to-HIGH
full-scale square wave;
see Fig.7; note 7
−
−
5
5
−
−
ns
ns
analog input settling time
HIGH-to-LOW
full-scale square wave;
see Fig.7; note 7
HARMONICS (fCLK = 60 MHZ)
Hall(FS)
harmonics (full-scale);
fi = 5 MHz
all components
second harmonic
−
−
−
−
−
−68
−67
72
−
−
−
−
−
dB
dB
dB
dB
dB
third harmonic
SFDR
THD
spurious free dynamic range
total harmonic distortion
fi = 5 MHz
fi = 5 MHz
fi = 15 MHz
−64
−57
SIGNAL-TO-NOISE RATIO; note 8
SNRFS
signal-to-noise ratio (full-scale)
without harmonics;
fclk = 60 MHz; fi = 5 MHz
−
58
57
−
−
dB
dB
without harmonics;
53
f
clk = 60 MHz; fi = 15 MHz
EFFECTIVE BITS; note 8
effective bits
f
clk = 60 MHz
fi = 5 MHz
EB
−
−
−
−
9.3
8.9
8.8
8.6
−
−
−
−
bits
bits
bits
bits
fi = 10 MHz
fi = 15 MHz
fi = 20 MHz
TWO-TONE; note 9
TTID two-tone intermodulation
distortion
f
clk = 60 MHz
−
−
−67
−
−
dB
BIT ERROR RATE
BER
bit error rate
fclk = 60 MHz; fi = 5 MHz;
10−13
times/
VI = ±16 LSB at code 512
sample
2000 Jul 03
9
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Timing (fclk = 60 MHz; CL = 10 pF); see Fig.5 and note 10
tds
th
sampling delay time
−
0.7
2
ns
output hold time
4
−
−
ns
td
output delay time TDA8764ATS
VCCO = 2.7 V
CCO = 3.3 V
output delay time TDA8764AHL VCCO = 2.7 V
−
10
9
14
13
17
16
10
−
ns
V
−
ns
td
−
13
12
−
ns
VCCO = 3.3 V
−
ns
CL
digital output load capacitance
slew rate
−
pF
V/ns
SR
V
CCO = 2.7 V
0.2
0.3
3-state output delay times (fclk = 60 MHz); see Fig.6
tdZH
tdZL
tdHZ
tdLZ
enable HIGH
enable LOW
disable HIGH
disable LOW
VCCO = 3.3 V
VCCO = 3.3 V
VCCO = 3.3 V
VCCO = 3.3 V
−
−
−
−
16
30
25
23
20
34
30
27
ns
ns
ns
ns
Notes
1. The rise and fall times of the clock signal must not be less than 0.5 ns.
1
2. The input admittance is Yi =
+ j ω Ci
----
Ri
3. Analog input voltages producing code 0 up to and including code 1023:
a) Voffset(B) (offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00
and the reference voltage BOTTOM (VRB) at Tamb = 25 °C.
b) Voffset(T) (offset voltage TOP) is the difference between VRT (reference voltage TOP) and the analog input which
produces data outputs equal to code 1023 at Tamb = 25 °C.
4. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.4.
V
RT – VRB
-----------------------------------------
OB + RL + ROT
a) The current flowing into the resistor ladder is IL
=
and the full-scale input range at the converter,
˙
R
R L
-----------------------------------------
OB + RL + ROT
to cover code 0 to 1023, is V = R × I =
× (VRT – VRB ) = 0.8375 × (VRT – VRB )
I
L
L
R
b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio
RL
will be kept reasonably constant from device to device. Consequently variation of the output
-----------------------------------------
OB + RL + ROT
R
codes at a given input voltage depends mainly on the difference VRT − VRB and its variation with temperature and
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
(V 1023 – V0) – V
5. E G
=
i(p-p) × 100
----------------------------------------------------
Vi(p-p)
6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal.
2000 Jul 03
10
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input (square wave signal) in order to sample the signal and obtain correct output data.
8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(Nyquist frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.
9. Intermodulation measured relative to either tone with analog input frequencies of 4.5 and 4.3 MHz. The two input
signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.
10. Output data acquisition: the output data is available after the maximum delay time of td. It is recommended to have
the lowest possible output load. These parameters are guaranteed by characterization and not by production test.
handbook, halfpage
V
RT
R
OT
code 1023
R
L
V
I
L
RM
R
LAD
code 0
R
OB
V
RB
FCE256
Fig.4 Explanation of note 4.
2000 Jul 03
11
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
Table 1 Output coding and input voltage (typical values; referenced to AGND; VRB = 1.3 V; VRT = 3.7 V; binary/gray
codes
BINARY OUTPUT BITS
GRAY OUTPUT BITS
STEP
VI
IR
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
U/F
<1.5
0
1
1
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
1
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
1
:
0
1.5
1
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1022
1023
O/F
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
3.51
>3.51
Table 2 Output coding and input voltage (typical values; referenced to AGND; binary/twos complement codes
BINARY OUTPUT BITS
TWOS COMPLEMENT OUTPUT BITS
STEP
VI
IR
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
U/F
<1.5
0
1
1
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
1
:
1
1
1
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
1
:
0
1.5
1
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
1022
1023
O/F
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
3.51
>3.51
Table 3 TC mode selection
TC
X
OE
1
D9 to D0
high-impedance
IR
IR
high-impedance
active
0
0
active; twos complement
active; binary
1
0
active
Table 4 Gray mode selection
GRAY
OE
D9 to D0
X
0
1
1
0
0
high-impedance
active; binary
active; gray
high-impedance
active
active
2000 Jul 03
12
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
t
CPL
t
CPH
V
IH
50%
CLK
V
IL
sample N
sample N + 1
sample N + 2
V
l
t
t
ds
h
HIGH
50%
DATA
D0 to D9
DATA
N - 2
DATA
N - 1
DATA
N
DATA
N + 1
LOW
t
d
FCE257
Fig.5 Timing diagram.
V
CCD
OE
50%
t
t
dHZ
dZH
HIGH
90%
50%
output
data LOW
t
t
dLZ
dZL
LOW
HIGH
50%
LOW
10%
output
TEST
S1
data HIGH
V
t
t
V
CCD
dLZ
dZL
CCD
S1
V
3.3 kΩ
CCD
TDA8764A
t
t
DGND
dHZ
dZH
10 pF
DGND
FCE258
OE
fOE = 100 kHz.
Fig.6 Timing diagram and test conditions of 3-state output delay time.
13
2000 Jul 03
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
t
t
stLH
stHL
50%
code 1023
V
I
50%
code 0
CLK
2 ns
2 ns
50%
50%
0.5 ns
0.5 ns
FCE259
Fig.7 Analog input settling-time diagram.
2000 Jul 03
14
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
INTERNAL PIN CONFIGURATIONS
handbook, halfpage
handbook, halfpage
V
V
CCO
CCA
D9 to D0
IR
V
I
OGND
AGND
FCE260
FCE261
Fig.8 CMOS data and in range outputs.
Fig.9 Analog input.
handbook, halfpage
V
CCA
handbook, halfpage
V
CCO
V
V
RT
R
LAD
RM
OE
TC
V
RB
GRAY
OGND
AGND
FCE262
FCE263
Fig.10 OE, GRAY and TC inputs.
2000 Jul 03
Fig.11 VRB, VRM and VRT inputs.
15
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
handbook, halfpage
V
CCD
CLK
1.5V
DGND
FCE264
Fig.12 CLK input.
2000 Jul 03
16
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
APPLICATION INFORMATION
33 Ω
handbook, halfpage
CLK
n.c.
n.c.
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
(3)
TC
V
IR
CCA
3
(2)
100 nF
AGND
D9
D8
D7
D6
D5
D4
D3
D2
D1
4
n.c.
(1)
5
V
RB
6
100 nF
(1)
V
V
RM
7
AGND
100 nF
AGND
TDA8764ATS
I
8
(1)
V
RT
9
100 nF
100 nF
100 nF
OE
10
11
12
13
14
AGND
V
CCD
(2)
DGND
V
CCO
D0
(2)
GRAY
OGND
FCE265
The analog and digital supplies should be separated and well decoupled.
An application note is available and describes the design and the realization of a demoboard that uses TDA8764ATS with an application environment.
(1) VRB, VRM and VRT are decoupled to AGND.
(2) Decoupling capacitor for supplies must be placed close to the device.
(3) This resistor is mandatory (33 Ω is its minimum value) and must be near the clock source.
Fig.13 Application diagram (SSOP28).
2000 Jul 03
17
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
n.c.
32
D9
31
D8
30
D7
29
D6
28
D5
27
D4
26
D3
25
n.c.
D2
1
2
3
4
5
6
7
8
24
IR
D1
23
22
21
20
19
18
17
n.c.
n.c.
D0
GRAY
TDA8764AHL
33 Ω
OGND
CLK
TC
(2)
(3)
V
100 nF
CCO
V
CCA
DGND
(2)
(2)
V
100 nF
100 nF
CCD
AGND
9
10
11
n.c.
12
13
14
15
16
OE
V
n.c.
n.c.
V
V
V
RT
I
RB
RM
(1)
(1)
(1)
FCE266
100 nF
100 nF
100 nF
AGND
AGND
AGND
The analog and digital supplies should be separated and well decoupled.
An application note is available and describes the design and the realization of a demoboard that uses TDA8764AHL with an
application environment.
(1) VRB, VRM and VRT are decoupled to AGND.
(2) Decoupling capacitor for supplies must be placed close to the device.
(3) This resistor is mandatory (33 Ω is its minimum value) and must be near the clock source.
Fig.14 Application diagram (LQFP32).
2000 Jul 03
18
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
PACKAGE OUTLINES
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A
X
c
H
v
M
A
y
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.1
0.7
mm
2.0
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
99-12-27
SOT341-1
MO-150
2000 Jul 03
19
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c
y
X
A
E
17
24
Z
16
25
E
e
A
H
2
E
A
(A )
3
A
1
w M
p
θ
pin 1 index
b
L
p
32
9
L
1
8
detail X
Z
v M
D
A
e
w M
b
p
D
B
H
v M
B
D
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.15 1.5
0.05 1.3
0.27 0.18 5.1
0.17 0.12 4.9
5.1
4.9
7.15 7.15
6.85 6.85
0.75
0.45
0.95 0.95
0.55 0.55
mm
1.60
0.25
0.5
1.0
0.2 0.12 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
99-12-27
00-01-19
SOT401-1
136E01
MS-026
2000 Jul 03
20
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
SOLDERING
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
2000 Jul 03
21
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
BGA, LFBGA, SQFP, TFBGA
WAVE
not suitable
REFLOW(1)
suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
PLCC(3), SO, SOJ
not suitable(2)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(3)(4) suitable
not recommended(5)
suitable
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Jul 03
22
Philips Semiconductors
Product specification
10-bit high-speed low-power ADC
TDA8764A
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
STATUS
DEFINITIONS (1)
Objective specification
Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2000 Jul 03
23
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For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
70
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613502/01/pp24
Date of release: 2000 Jul 03
Document order number: 9397 750 06996
相关型号：
TDA8764AHL/6/C1
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NXP
TDA8764ATS/6/C1
IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, PLASTIC, SOT-341-1, SSOP-28, Analog to Digital Converter
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