TDA9887TS/V4,112 [NXP]
TDA9887TS;
| 型号： | TDA9887TS/V4,112 |
| 厂家： | 
NXP |
| 描述： | TDA9887TS 光电二极管 商用集成电路 |
| 文件： | 总58页 (文件大小：278K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9887
I2C-bus controlled multistandard
alignment-free IF-PLL demodulator
with FM radio
Product specification
2004 Aug 25
Supersedes data of 2003 Oct 03
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
CONTENTS
10
LIMITING VALUES
11
THERMAL CHARACTERISTICS
CHARACTERISTICS
1
2
3
4
5
6
7
8
FEATURES
12
GENERAL DESCRIPTION
APPLICATIONS
13
TEST AND APPLICATION INFORMATION
PACKAGE OUTLINES
14
ORDERING INFORMATION
QUICK REFERENCE DATA
BLOCK DIAGRAM
15
SOLDERING
15.1
Introduction to soldering surface mount
packages
Reflow soldering
Wave soldering
Manual soldering
PINNING
15.2
15.3
15.4
15.5
FUNCTIONAL DESCRIPTION
8.1
8.2
8.3
VIF amplifier
Tuner AGC and VIF-AGC
VIF-AGC detector
Suitability of surface mount IC packages for
wave and reflow soldering methods
16
17
18
19
DATA SHEET STATUS
DEFINITIONS
8.4
8.5
8.6
8.7
FPLL detector
VCO and divider
AFC and digital acquisition help
Video demodulator and amplifier
Sound carrier trap
DISCLAIMERS
PURCHASE OF PHILIPS I2C COMPONENTS
8.8
8.9
SIF amplifier
8.10
8.11
8.12
8.13
8.14
8.15
8.16
8.17
SIF-AGC detector
Single reference QSS mixer
AM demodulator
FM demodulator and acquisition help
Audio amplifier and mute time constant
Radio mode
Internal voltage stabilizer
I2C-bus transceiver and module address
9
I2C-BUS CONTROL
9.1
Read format
9.1.1
9.1.2
9.2
Slave address
Data byte
Write format
9.2.1
9.2.2
9.2.3
9.2.4
Subaddress
Data byte for switching mode
Data byte for adjust mode
Data byte for data mode
2004 Aug 25
2
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
1
FEATURES
• 5 V supply voltage
• Gain controlled wide-band Vision Intermediate
Frequency (VIF) amplifier, AC-coupled
• Multistandard true synchronous demodulation with
active carrier regeneration: very linear demodulation,
good intermodulation figures, reduced harmonics, and
excellent pulse response
• AM demodulator without extra reference circuit
• Alignment-free selective FM-PLL demodulator with high
linearity and low noise
• I2C-bus control for all functions
• I2C-bus transceiver with pin programmable Module
Address (MAD)
• Four selectable I2C-bus addresses
• Gated phase detector for L and L-accent standard
• Fully integrated VIF Voltage Controlled Oscillator
(VCO), alignment-free, frequencies switchable for all
negative and positive modulated standards via I2C-bus
• Digital acquisition help, VIF frequencies of 33.4, 33.9,
38.0, 38.9, 45.75, and 58.75 MHz
• SIF and FM-AGC for radio (optional)
• 4 MHz reference frequency input: signal from
Phase-Locked Loop (PLL) tuning system or operating
as crystal oscillator
• Radio IF (RIF) input using the sound IF SAW input for
converting to 10.7 MHz, input frequencies are 41.3 MHz
for NTSC (M/N standard) applications and 33.3 MHz for
other applications
• VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector for negative
modulated signals and as a peak white detector for
positive modulated signals
• Alignment-free FM radio demodulation at 10.7 MHz
• Radio AFC
• External FM input and demodulation.
• VIF-AGC monitor output at pin OP2
• External VIF-AGC setting via pin OP1
2
GENERAL DESCRIPTION
• Precise fully digital Automatic Frequency Control (AFC)
detector with 4-bit digital-to-analog converter, AFC bits
readable via I2C-bus
• TakeOver Point (TOP) adjustable via I2C-bus or
alternatively with potentiometer
The TDA9887 is an alignment-free multistandard
(PAL, SECAM and NTSC) vision and sound IF signal PLL
demodulator for positive and negative modulation,
including sound AM and FM processing. A special function
is implemented for the demodulation of FM radio signals
(fRIF = 10.7 MHz).
• Fully integrated sound carrier trap for 4.5, 5.5,
6.0, and 6.5 MHz, controlled by FM-PLL oscillator
• Sound IF (SIF) input for single reference Quasi Split
Sound (QSS) mode, PLL controlled
3
APPLICATIONS
• TV, VTR, PC, and STB applications.
• SIF-AGC for gain controlled SIF amplifier, single
reference QSS mixer able to operate in high
performance single reference QSS mode and in
intercarrier mode, switchable via I2C-bus
4
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA9887T/V4
SO24
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
SOT340-1
SOT617-3
TDA9887TS/V4
SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm
TDA9887HN/V4 HVQFN32 plastic thermal enhanced very thin quad flat package; no leads;
32 terminals; body 5 × 5 × 0.85 mm
2004 Aug 25
3
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
5
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
notes 1 and 2
MIN.
4.5
TYP. MAX. UNIT
VP
IP
supply voltage
supply current
5.0
63
5.5
70
V
52
mA
Video part
Vi(VIF)(rms)
VIF input voltage sensitivity
(RMS value)
−1 dB video at output
−
60
100
µV
GVIF(cr)
fVIF
VIF gain control range
60
−
66
−
−
−
−
−
−
−
−
dB
vision carrier operating frequencies see Table 17
33.4
33.9
38.0
38.9
45.75
58.75
±2.3
MHz
MHz
MHz
MHz
MHz
MHz
MHz
−
−
−
−
−
∆fVIF
VIF frequency window of digital
acquisition help
related to fVIF; see Fig.11
−
Vo(v)(p-p)
video signal output voltage
(peak-to-peak value)
see Fig.5
normal mode
trap bypass mode
“CCIR 330”; note 3
B/G standard
L standard
1.7
2.0
2.3
V
V
0.95
1.10
1.25
Gdif
differential gain
−
−
−
5
−
−
2
6
5
7
4
−
%
%
ϕdif
differential phase
“CCIR 330”
deg
MHz
Bv(−1dB)
−1 dB video bandwidth
trap bypass mode; AC load;
CL < 20 pF; RL > 1 kΩ
Bv(−3dB)(trap)
−3 dB video bandwidth including
note 4
sound carrier trap
ftrap = 4.5 MHz
ftrap = 5.5 MHz
ftrap = 6.0 MHz
ftrap = 6.5 MHz
M/N standard
B/G standard
3.95
4.90
5.40
5.50
30
4.05
5.00
5.50
5.95
36
−
−
−
−
−
−
−
MHz
MHz
MHz
MHz
dB
αSC1
trap attenuation at first sound
carrier
30
36
dB
S/NW
weighted signal-to-noise ratio
weighted in accordance with 56
“CCIR 567”; see Fig.13;
note 5
59
dB
PSRRCVBS
power supply ripple rejection at
pin CVBS
fripple = 70 Hz; video signal; 20
grey level; positive and
negative modulation;
see Fig.6
25
−
dB
AFCstps
AFC control steepness
definition: ∆IAFC/∆fVIF
0.85
1.05
1.25
µA/kHz
2004 Aug 25
4
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Audio part
Vo(AF)(rms)
AF output voltage (RMS value)
27 kHz FM deviation;
50 µs de-emphasis
430
540
650
mV
%
THD
total harmonic distortion of audio
signal
FM: 27 kHz FM deviation;
50 µs de-emphasis
−
0.15
0.50
AM: m = 54 %
−
0.5
1.0
%
BAF(−3dB)
S/NW(AF)
−3 dB AF bandwidth
without de-emphasis;
dependent on FM-PLL filter
80
100
−
kHz
weighted signal-to-noise ratio of
audio signal
FM: 27 kHz FM deviation;
50 µs de-emphasis;
52
56
−
dB
vision carrier unmodulated
AM: m = 54 %
45
40
50
46
−
−
dB
dB
αAM(sup)
AM suppression of
FM demodulator
50 µs de-emphasis;
AM: f = 1 kHz and
m = 54 %; referenced to
27 kHz FM deviation
PSRRAUD
power supply ripple rejection on
pin AUD
fripple = 70 Hz; see Fig.6
for AM
20
14
90
90
26
−
dB
for FM
20
−
dB
Vo(intc)(rms)
IF intercarrier output level
(RMS value)
QSS mode; SC1; SC2 off
140
140
180
180
mV
mV
L standard;
without modulation
intercarrier mode;
PC/SC1 = 20 dB; SC2 off;
note 6
−
75
−
mV
Radio part
AFCstps
AFC control steepness
definition: ∆IAFC/∆fRIF
0.85
1
1.05
1.25
100
µA/kHz
Vi(FM)(rms)
IF intercarrier input level on
pin FMIN for gain controlled
operation of FM-PLL (RMS value)
radio mode and FM external
mode; see Table 16
−
mV
Reference frequency
fref
reference signal frequency
note 7
−
4
−
MHz
mV
Vref(rms)
reference signal voltage
(RMS value)
operation as input terminal 80
−
400
Notes
1. Values of video and sound parameters can be decreased at VP = 4.5 V.
2. For applications without I2C-bus, the time constant (R × C) at the supply must be >1.2 µs (e.g. 1 Ω and 2.2 µF).
3. Condition: luminance range (5 steps) from 0 % to 100 %.
4. AC load: CL < 20 pF and RL > 1 kΩ. The sound carrier frequencies (depending on the TV standard) are attenuated
by the integrated sound carrier traps (see Figs 15 to 20; H (s) is the absolute value of transfer function).
5. S/NW is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value measured on pin CVBS).
B = 5 MHz weighted in accordance with “CCIR 567”.
2004 Aug 25
5
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
6. The intercarrier output signal at pin SIOMAD can be calculated by the following formula taking into account the
internal video signal with 1.1 V (p-p) as a reference:
1
Vo(intc)(rms) = 1.1 ×
× 10r V
----------
2 2
V
1
and r =
×
i(SC)(dB) + 6 dB ± 3 dB
------
20
-------------
Vi(PC)
where:
1
V
is the correction term for RMS value, i(SC)(dB) is the sound-to-picture carrier ratio at pins VIF1 and VIF2
----------
---------------
Vi(PC)
2 2
in dB, 6 dB is the correction term of internal circuitry and ±3 dB is the tolerance of video output and intercarrier output
Vo(intc)(rms)
.
7. Pin REF is able to operate as a 1-pin crystal oscillator input as well as an external reference signal input, e.g. from
the tuning system.
2004 Aug 25
6
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external reference signal
or 4 MHz crystal
C
VAGC(pos)
VIF-PLL
filter
TOP TAGC
9 (8) 14 (15)
VAGC
VPLL
REF
AFC
16 (17)
19 (21)
15 (16)
21 (23)
C
AGC(neg)
C
BL
TUNER AGC
VIF-AGC
DIGITAL VCO CONTROL
AFC DETECTOR
RC VCO
VIF2 2 (31)
VIF1 1 (30)
SOUND CARRIER
TRAPS
4.5 to 6.5 MHz
(18) 17
CVBS
VIF-PLL
video output: 2 V (p-p)
[1.1 V (p-p) without trap]
TDA9887
(7) 8 AUD
audio output
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER
AUDIO PROCESSING
AND SWITCHES
SIF2 24 (27)
SIF1 23 (26)
DEEM
(3) 5
AND AM DEMODULATOR
de-emphasis
network
MAD
AFD
(4) 6
OUTPUT
2
PORTS
C
AF
SUPPLY
SIF-AGC
I C-BUS TRANSCEIVER
NARROW-BAND
FM-PLL DEMODULATOR
C
AGC
(6, 12, 13, 19,
25, 28, 29, 32)
10 (9)
13 (14)
FMIN
4 (2)
3 (1)
OP1 OP2
11 (10)
SCL
20 (22)
18 (20)
AGND
22 (24)
7 (5)
12 (11)
mhc143
V
P
n.c.
SDA
DGND SIOMAD
FMPLL
FM-PLL
filter
sound intercarrier output
and MAD select
Pin numbers for TDA9887HN in parenthesis.
Fig.1 Block diagram.
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
7
PINNING
PIN
SYMBOL
DESCRIPTION
TDA9887T
TDA9887TS
TDA9887HN
VIF1
1
2
30
31
32
1
VIF differential input 1
VIF differential input 2
not connected
VIF2
n.c.
−
OP1
FMPLL
DEEM
AFD
DGND
n.c.
3
output port 1; open-collector
FM-PLL for loop filter
de-emphasis output for capacitor
AF decoupling input for capacitor
digital ground
4
2
5
3
6
4
7
5
−
6
not connected
AUD
TOP
SDA
SCL
8
7
audio output
9
8
tuner AGC TakeOver Point (TOP) for resistor adjustment
I2C-bus data input and output
I2C-bus clock input
10
11
12
−
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
SIOMAD
n.c.
sound intercarrier output and MAD select with resistor
not connected
n.c.
−
not connected
FMIN
TAGC
REF
VAGC
CVBS
n.c.
13
14
15
16
17
−
radio IF and external second SIF input
tuner AGC output
4 MHz crystal or reference signal input
VIF-AGC capacitor for L standard
composite video output
not connected
AGND
VPLL
VP
18
19
20
21
22
−
analog ground
VIF-PLL for loop filter
supply voltage
AFC
OP2
n.c.
AFC output
output port 2; open-collector
not connected
SIF1
SIF2
n.c.
23
24
−
SIF differential input 1 and MAD select with resistor
SIF differential input 2 and MAD select with resistor
not connected
n.c.
−
not connected
2004 Aug 25
8
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
handbook, halfpage
handbook, halfpage
VIF1
VIF2
OP1
SIF2
SIF1
OP2
AFC
VIF1
VIF2
OP1
1
2
3
4
5
6
7
8
9
SIF2
24
1
2
3
4
5
6
7
8
9
24
23
22
21
20
SIF1
OP2
AFC
23
22
21
20
19
FMPLL
DEEM
AFD
FMPLL
DEEM
AFD
V
P
V
P
19 VPLL
18 AGND
17 CVBS
16 VAGC
15 REF
VPLL
TDA9887TS
TDA9887T
DGND
AUD
DGND
AUD
18 AGND
17
CVBS
TOP
TOP
16 VAGC
15 REF
SDA 10
SCL
SDA 10
SCL
TAGC
FMIN
TAGC
11
SIOMAD 12
14
13
11
SIOMAD 12
14
13 FMIN
MHC575
MHC144
Fig.2 Pin configuration for SO24.
Fig.3 Pin configuration for SSOP24.
terminal 1
index area
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
OP1
FMPLL
DEEM
AFD
OP2
AFC
V
P
VPLL
AGND
n.c.
TDA9887HN
DGND
n.c.
AUD
CVBS
VAGC
TOP
001aab385
Transparent top view
Fig.4 Pin configuration for HVQFN32.
2004 Aug 25
9
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
8
FUNCTIONAL DESCRIPTION
8.3
VIF-AGC detector
Figure 1 shows the simplified block diagram of the device
which comprises the following functional blocks:
Gain control is performed by sync level detection (negative
modulation) or peak white detection (positive modulation).
• VIF amplifier
For negative modulation, the sync level voltage is stored at
an integrated capacitor by means of a fast peak detector.
This voltage is compared with a reference voltage
(nominal sync level) by a comparator which charges or
discharges the integrated AGC capacitor for the
generation of the required VIF gain. The time constants for
decreasing or increasing the gain are nearly equal and the
total AGC reaction time is fast to cope with ‘aeroplane
fluttering’.
• Tuner AGC and VIF-AGC
• VIF-AGC detector
• Frequency Phase-Locked Loop (FPLL) detector
• VCO and divider
• AFC and digital acquisition help
• Video demodulator and amplifier
• Sound carrier trap
For positive modulation, the white peak level voltage is
compared with a reference voltage (nominal white level)
by a comparator which charges (fast) or discharges (slow)
the external AGC capacitor directly for the generation of
the required VIF gain. The need of a very long time
constant for VIF gain increase is because the peak white
level may appear only once in a field. In order to reduce
this time constant, an additional level detector increases
the discharging current of the AGC capacitor (fast mode)
in the event of a decreasing VIF amplitude step controlled
by the detected actual black level voltage. The threshold
level for fast mode AGC is typically −6 dB video amplitude.
The fast mode state is also transferred to the SIF-AGC
detector for speed-up. In case of missing peak white
pulses, the VIF gain increase is limited to typically +3 dB
by comparing the detected actual black level voltage with
a corresponding reference voltage.
• SIF amplifier
• SIF-AGC detector
• Single reference QSS mixer
• AM demodulator
• FM demodulator and acquisition help
• Audio amplifier and mute time constant
• Radio mode
• Internal voltage stabilizer
• I2C-bus transceiver and MAD (module address).
8.1
VIF amplifier
The VIF amplifier consists of three AC-coupled differential
stages. Gain control is performed by emitter degeneration.
The total gain control range is typically 66 dB. The
differential input impedance is typically 2 kΩ in parallel with
3 pF.
8.4
FPLL detector
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier
for removing the video AM.
8.2
Tuner AGC and VIF-AGC
This block adapts the voltages, generated at the VIF-AGC
and SIF-AGC detectors, to the internal signal processing
at the VIF and SIF amplifiers and performs the tuner AGC
control current generation. The onset of the tuner AGC
control current generation can be set either via the I2C-bus
(see Table 13) or optionally by a potentiometer at pin TOP
(in case that the I2C-bus information cannot be stored).
The presence of a potentiometer is automatically detected
and the I2C-bus setting is disabled.
During acquisition the frequency detector produces a
current proportional to the frequency difference between
the VIF and the VCO signals. After frequency lock-in the
phase detector produces a current proportional to the
phase difference between the VIF and the VCO signals.
The currents from the frequency and phase detectors are
charged into the loop filter which controls the VIF VCO and
locks it to the frequency and phase of the VIF carrier.
For a positive modulated VIF signal, the charging currents
are gated by the composite sync in order to avoid signal
distortion in case of overmodulation. The gating depth is
switchable via the I2C-bus.
Furthermore, derived from the AGC detector voltage, a
comparator is used to test if the corresponding VIF input
voltage is higher than 200 µV. This information can be
read out via the I2C-bus (bit VIFLEV = 1).
2004 Aug 25
10
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
8.5
VCO and divider
8.7
Video demodulator and amplifier
The VCO of the VIF-FPLL operates as an integrated low
radiation relaxation oscillator at double the picture carrier
frequency. The control voltage, required to tune the VCO
to double the picture carrier frequency, is generated at the
loop filter by the frequency phase detector. The possible
frequency range is 50 to 140 MHz (typical value).
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The VIF
signal is multiplied with the ‘in phase’ signal of the VIF-PLL
VCO.
The demodulator output signal is fed into the video
preamplifier via a level shift stage with integrated low-pass
filter to achieve carrier harmonics attenuation.
The oscillator frequency is divided-by-two to provide two
differential square wave signals with exactly 90 degrees
phase difference, independent of the frequency, for use in
the FPLL detectors, the video demodulator and the
intercarrier mixer.
The output signal of the preamplifier is fed to the VIF-AGC
detector (see Section 8.3) and in the sound trap mode also
fed internally to the integrated sound carrier trap
(see Section 8.8). The differential trap output signal is
converted and amplified by the following postamplifier.
The video output level at pin CVBS is 2 V (p-p).
8.6
AFC and digital acquisition help
Each relaxation oscillator of the VIF-PLL and FM-PLL
demodulator has a wide frequency range. To prevent false
locking of the PLLs and with respect to the catching range,
the digital acquisition help provides an individual control,
until the frequency of the VCO is within the preselected
standard dependent lock-in window of the PLL.
In the bypass mode the output signal of the preamplifier is
fed directly through the postamplifier to pin CVBS. The
output video level is 1.1 V (p-p) for using an external sound
trap with 10 % overall loss.
Noise clipping is provided in both cases.
The in-window and out-window control at the FM-PLL is
additionally used to mute the audio stage (if auto mute is
selected via the I2C-bus).
8.8
Sound carrier trap
The sound carrier trap consists of a reference filter, a
phase detector and the sound trap itself.
The working principle of the digital acquisition help is as
follows. The PLL VCO output is connected to a down
counter which has a predefined start value (standard
dependent). The VCO frequency clocks the down counter
for a fixed gate time. Thereafter, the down counter stop
value is analysed. In case the stop value is higher (lower)
than the expected value range, the VCO frequency is
lower (higher) than the wanted lock-in window frequency
range. A positive (negative) control current is injected into
the PLL loop filter and consequently the VCO frequency is
increased (decreased) and a new counting cycle starts.
A sound carrier reference signal is fed into the reference
low-pass filter and is shifted by nominal 90 degrees. The
phase detector compares the original reference signal with
the signal shifted by the reference filter and produces a
DC voltage by charging or discharging an integrated
capacitor with a current proportional to the phase
difference between both signals, respectively to the
frequency error of the integrated filters. The DC voltage
controls the frequency position of the reference filter and
the sound trap. So the accurate frequency position for the
different standards is set by the sound carrier reference
signal.
The gate time as well as the control logic of the acquisition
help circuit is dependent on the precision of the reference
signal at pin REF. Operation as a crystal oscillator is
possible as well as connecting this input via a serial
capacitor to an external reference frequency, e.g. the
tuning system oscillator.
The sound trap itself is constructed of three separate traps
to realize sufficient suppression of the first and second
sound carriers.
8.9
SIF amplifier
The AFC signal is derived from the corresponding down
counter stop value after a counting cycle. The last four bits
are latched and can be read out via the I2C-bus
(see Table 7). Also the digital-to-analog converted value is
given as current at pin AFC.
The SIF amplifier consists of three AC-coupled differential
stages. Gain control is performed by emitter degeneration.
The total gain control range is typically 66 dB. The
differential input impedance is typically 2 kΩ in parallel with
3 pF.
2004 Aug 25
11
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
8.10 SIF-AGC detector
8.12 AM demodulator
SIF gain control is performed by the detection of the
DC component of the AM demodulator output signal. This
DC signal corresponds directly to the SIF voltage at the
output of the SIF amplifier so that a constant SIF signal is
supplied to the AM demodulator and to the single
reference QSS mixer.
The amplitude modulated SIF amplifier output signal is fed
both to a two-stage limiting amplifier that removes the AM
and to a linear multiplier. The result of the multiplication of
the SIF signal with the limiter output signal is
AM demodulation (passive synchronous demodulator).
The demodulator output signal is fed via a low-pass filter
that attenuates the carrier harmonics and via the input
amplifier of the SIF-AGC detector to the audio amplifier.
By switching the gain of the input amplifier of the SIF-AGC
detector via the I2C-bus, the internal SIF level for
FM sound is 5.5 dB lower than for AM sound. This is to
adapt the SIF-AGC characteristic to the VIF-AGC
characteristic. The adaption is ideal for a picture-to-sound
FM carrier ratio of 13 dB.
8.13 FM demodulator and acquisition help
The narrow-band FM-PLL detector consists of:
• Gain controlled FM amplifier and AGC detector
• Narrow-band PLL.
Via a comparator, the integrated AGC capacitor is charged
or discharged for the generation of the required SIF gain.
Due to AM sound, the AGC reaction time is slow
(fc < 20 Hz for the closed AGC loop). For reducing this
AM sound time constant in the event of a decreasing
IF amplitude step, the load current of the AGC capacitor is
increased (fast mode) when the VIF-AGC detector (at
positive modulation mode) operates in the fast mode too.
An additional circuit (threshold approximately 7 dB)
ensures a very fast gain reduction for a large increasing
IF amplitude step.
The intercarrier signal from the intercarrier mixer or from
pin FMIN is fed to the input of an AC-coupled gain
controlled amplifier with two stages. The gain controlled
output signal is fed to the phase detector of the
narrow-band FM-PLL (FM demodulator). For good
selectivity and robustness against disturbance caused by
the video signal, a high linearity of the gain controlled
FM amplifier and of the phase detector as well as a
constant signal level are required. The gain control is done
by means of an ‘in phase’ demodulator for the FM carrier
(from the output of the FM amplifier). The demodulation
output is fed into a comparator for charging or discharging
the integrated AGC capacitor. This leads to a mean value
AGC loop to control the gain of the FM amplifier.
8.11 Single reference QSS mixer
With the present system a high performance Hi-Fi stereo
sound processing can be achieved. For a simplified
application without a SIF SAW filter, the single reference
QSS mixer can be switched to the intercarrier mode via the
I2C-bus.
The FM demodulator is realized as a narrow-band PLL
with an external loop filter, which provides the necessary
selectivity (bandwidth approximately 100 kHz). To achieve
good selectivity, a linear phase detector and a constant
input level are required. The gain controlled intercarrier
signal from the FM amplifier is fed to the phase detector.
The phase detector controls via the loop filter the
integrated low radiation relaxation oscillator. The designed
frequency range is from 4 to 7 MHz.
The single reference QSS mixer generates the 2nd FM
TV sound intercarrier signal. It is realized by a linear
multiplier which multiplies the SIF amplifier output signal
and the VIF-PLL VCO signal (90 degrees output) which is
locked to the picture carrier. In this way the QSS mixer
operates as a quadrature mixer in the intercarrier mode
and provides suppression of the low frequency video
signals.
The VCO within the FM-PLL is phase-locked to the
incoming 2nd SIF signal, which is frequency modulated.
As well as this, the VCO control voltage is superimposed
by the AF voltage. Therefore, the VCO tracks with the FM
of the 2nd SIF signal. So, the AF voltage is present at the
loop filter and is typically 5 mV (RMS) for 27 kHz
FM deviation. This AF signal is fed via a buffer to the audio
amplifier.
The QSS mixer output signal is fed internally via a
high-pass and low-pass combination to the
FM demodulator as well as via an operational amplifier to
the intercarrier output pin SIOMAD.
The correct locking of the PLL is supported by the digital
acquisition help circuit (see Section 8.6).
2004 Aug 25
12
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
8.14 Audio amplifier and mute time constant
delivers a constant 44 MHz signal (derived from the
reference signal of 4 MHz) for the down-conversion of the
first radio IF to 10.7 MHz. This signal is fed via the external
ceramic band-pass filter to the FM demodulator. The
demodulated AF signal is amplified by the audio amplifier.
The audio amplifier consists of two parts:
• AF preamplifier
• AF output amplifier.
In case of NTSC application (M/N standard) the internal
mixing frequency is 52 MHz. So, the first radio IF has to be
41.3 MHz.
The AF preamplifier used for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the
PLL demodulator is 5 mV (RMS) for a frequency deviation
of 27 kHz and is amplified by 30 dB. By the use of a
DC operating point control circuit (with external
capacitor CAF), the AF preamplifier is decoupled from the
PLL DC voltage. The low-pass characteristic of the
amplifier reduces the harmonics of the sound intercarrier
signal at the AF output terminal.
In the radio mode, the tuner AGC is derived from the
SIF-AGC.
For tuning search mode, the device offers certain
monitoring functions. Switchable are radio AFC, FM-AGC
or SIF-AGC to pin AFC.
8.16 Internal voltage stabilizer
For FM sound a switchable de-emphasis network (with
external capacitor) is implemented between the
preamplifier and the output amplifier.
The band gap circuit internally generates a voltage of
approximately 2.4 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.55 V which is
used as an internal reference voltage.
The AF output amplifier provides the required AF output
level by a rail-to-rail output stage. A preceding stage
makes use of an input selector for switching between
FM sound, AM sound and mute state. The gain can be
switched between 10 dB (normal) and 4 dB (reduced).
8.17 I2C-bus transceiver and module address
The device can be controlled via the 2-wire I2C-bus by a
microcontroller. Two wires carry serial data (SDA) and
serial clock (SCL) information between the devices
connected to the I2C-bus.
Switching to the mute state is controlled automatically,
dependent on the digital acquisition help in case the VCO
of the FM-PLL is not in the required frequency window.
This is done by a time constant: fast for switching to the
mute state and slow (typically 40 ms) for switching to the
no-mute state.
The device has an I2C-bus slave transceiver with
auto-increment. The circuit operates up to clock
frequencies of 400 kHz.
All switching functions are controlled via the I2C-bus:
• AM sound, FM sound and forced mute
• Auto mute enable or disable
A slave address is sent from the master to the slave
receiver. To avoid conflicts in a real application with other
devices providing similar or complementing functions,
there are four possible slave addresses available. These
Module Addresses (MADs) can be selected by connecting
resistors on pin SIOMAD and/or pins SIF1 and SIF2 (see
Fig.25). Pin SIOMAD relates with bit A0 and pins SIF1
and SIF2 relate with bit A3. The slave addresses of this
device are given in Table 1.
• De-emphasis off or on with 50 or 75 µs
• Audio gain normal or reduced.
8.15 Radio mode
The principle is to multiply the first radio IF (e.g. 33.3 MHz
at tuner output) with 44 MHz reference signal. The result
of the down-conversion is the second radio IF (10.7 MHz)
at intercarrier output.
The power-on preset value is dependent on the use of
pin SIOMAD and can be chosen for 45.75 MHz NTSC as
default (pin SIOMAD left open-circuit) or 58.75 MHz NTSC
(resistor on pin SIOMAD). In this way the device can be
used without the I2C-bus as an NTSC only device.
In the radio mode the tuner delivers a first radio IF signal
of 33.3 MHz. This signal is fed via the SIF SAW filter
(conventional used for QSS TV sound processing) to the
SIF input. The sound IF amplifier supplies this radio
IF signal by means of gain control with constant level to the
QSS mixer. The single reference QSS mixer generates the
second radio IF signal of 10.7 MHz. In the radio mode the
VIF VCO operates as part of a frequency synthesizer and
Remark: In case of using the device without the I2C-bus,
then the rise time of the supply voltage after switching on
power must be longer than 1.2 µs.
2004 Aug 25
13
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
Table 1 Slave address detection
SELECTABLE ADDRESS BIT
SLAVE ADDRESS
RESISTOR ON PIN
A3
A0
SIF1 AND SIF2
SIOMAD
MAD1
MAD2
MAD3
MAD4
0
0
1
1
1
0
1
0
no
no
no
yes
no
yes
yes
yes
9
I2C-BUS CONTROL
Read format
9.1
Table 2 I2C-bus read format (slave transmits data)
S
BYTE 1
A
BYTE 2
AN
P
A6 A5 A4 A3 A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
data
slave address
1
Table 3 Explanation of Table 2
SYMBOL
FUNCTION
S
START condition, generated by the master
see Table 4
Slave address
R/W = 1
read command, generated by the master
acknowledge bit, generated by the slave
8-bit data word, transmitted by the slave (see Table 5)
acknowledge-not bit, generated by the master
STOP condition, generated by the master
A
Data
AN
P
The master generates an acknowledge when it has received the dataword READ. The master next generates an
acknowledge, then slave begins transmitting the dataword READ, and so on until the master generates an
acknowledge-not bit and transmits a STOP condition.
2004 Aug 25
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Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
9.1.1
SLAVE ADDRESS
The first module address MAD1 is the standard address (see Table 1).
Table 4 Slave addresses; notes 1 and 2
SLAVE ADDRESS
BIT
A3
VALUE
(HEX)
NAME
MAD1
A6
A5
A4
A2
A1
A0
43
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
1
0
1
0
MAD2
MAD3
MAD4
42
4B
4A
Notes
1. For MAD activation via external resistor: see Table 1 and Fig.25.
2. For applications without I2C-bus: see Tables 18 and 19.
9.1.2
DATA BYTE
Table 5 Data read register (status register)
MSB
LSB
D7
D6
D5
D4
D3
D2
AFC2
D1
AFC1
D0
AFCWIN
VIFLEV
CARRDET
AFC4
AFC3
PONR
Table 6 Description of status register bits
BIT
VALUE
DESCRIPTION
AFCWIN
AFC window
1
0
VCO in ±1.6 MHz AFC window; note 1
VCO out of ±1.6 MHz AFC window
VIF input level
VIFLEV
1
0
high level; VIF input voltage ≥ 200 µV (typically)
low level
CARRDET
FM carrier detection
1
0
detection
no detection
AFC[4:1]
PONR
Automatic frequency control
see Table 7
Power-on reset
1
0
after Power-on reset or after supply breakdown
after a successful reading of the status register
Note
1. If no IF input is applied, then bit AFCWIN = 1 due to the fact that the VCO is forced to the AFC window border for
fast lock-in behaviour.
2004 Aug 25
15
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
Table 7 Automatic frequency control bits; note 1
BIT
fVIF
AFC4
AFC3
AFC2
AFC1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
≤ (f0 − 187.5 kHz)
f0 − 162.5 kHz
f0 − 137.5 kHz
f0 − 112.5 kHz
f0 − 87.5 kHz
f0 − 62.5 kHz
f0 − 37.5 kHz
f0 − 12.5 kHz
f0 + 12.5 kHz
f0 + 37.5 kHz
f0 + 62.5 kHz
f0 + 87.5 kHz
f0 + 112.5 kHz
f0 + 137.5 kHz
f0 + 162.5 kHz
≥ (f0 + 187.5 kHz)
Note
1. f0 is the nominal frequency of fVIF
.
9.2
Write format
Table 8 I2C-bus write format (slave receives data); note 1
S
BYTE 1
A6 to A0
slave address
A
BYTE 2
A7 to A0
A
BYTE 3
bits 7 to 0
data 1
A
BYTE n
A
P
R/W
0
bits 7 to 0
data n
subaddress
Note
1. The auto-increment of the subaddress stops if the subaddress is 3.
Table 9 Explanation of Table 8
SYMBOL
FUNCTION
S
START condition, generated by the master
see Table 4
Slave address
R/W = 0
write command, generated by the master
acknowledge bit, generated by the slave
see Table 10
A
Subaddress (SAD)
Data 1, data n
P
8-bit data words, transmitted by the master (see Tables 11, 12 and 14)
STOP condition
2004 Aug 25
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Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
9.2.1
SUBADDRESS
If more than one data byte is transmitted, then auto-increment is performed: starting from the transmitted subaddress
and auto-increment of subaddress in accordance with the order of Table 10.
Table 10 Definition of the subaddress (second byte after slave address); note 1
MSB
A7(2)
LSB
A0
REGISTER
A6(3)
A5(3)
A4(3)
A3(3)
A2(3)
A1
SAD for switching mode
SAD for adjust mode
SAD for data mode
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
1
0
Notes
1. X = don’t care.
2. Bit A7 = 1 is not allowed.
3. Bits A6 to A2 will be ignored by the internal hardware.
9.2.2
DATA BYTE FOR SWITCHING MODE
Table 11 Bit description of SAD register for switching mode (SAD = 00)
BIT
VALUE
DESCRIPTION
B7
Output port 2 e.g. for SAW switching or AGC monitoring
1
0
high-impedance, disabled or HIGH
low-impedance, active or LOW
B6
B5
Output port 1 e.g. for SAW switching or external AGC input
1
0
high-impedance, disabled or HIGH
low-impedance, active or LOW
Forced audio mute
on
1
0
off
B4 and B3
TV standard modulation and radio mode
positive AM TV; note 1
FM radio; note 2
00
01
10
11
negative FM TV
FM radio; note 2
B2
B1
Carrier mode
1
0
QSS mode
intercarrier mode
Auto mute of FM AF output
active
1
0
inactive
2004 Aug 25
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Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
BIT
VALUE
DESCRIPTION
B0
Video mode (sound trap)
sound trap bypass
1
0
sound trap active
Notes
1. For positive AM TV choose 6.5 MHz for the second SIF.
2. For FM radio, select fVIF = 45.75 MHz for NTSC applications; otherwise use an arbitrary video IF (see Table 17).
9.2.3
DATA BYTE FOR ADJUST MODE
Table 12 Bit description of SAD register for adjust mode (SAD = 01)
BIT
VALUE
DESCRIPTION
C7
Audio gain
1
0
−6 dB
0 dB
C6
C5
De-emphasis time constant
1
0
50 µs
75 µs
De-emphasis
1
0
on
off
C4 to C0
Tuner takeover point adjustment
see Table 13
2004 Aug 25
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Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
Table 13 Tuner takeover point adjustment bits
BIT
TOP ADJUSTMENT (dB)
C4
C3
C2
C1
C0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
+15
+14
+13
+12
+11
+10
+9
+8
+7
+6
+5
+4
+3
+2
+1
0(1)
−1
−2
−3
−4
−5
−6
−7
−8
−9
−10
−11
−12
−13
−14
−15
−16
Note
1. 0 dB is equal to 17 mV (RMS).
2004 Aug 25
19
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
9.2.4
DATA BYTE FOR DATA MODE
Table 14 Bit description of SAD register for data mode (SAD = 10)
BIT
VALUE
DESCRIPTION
E7
AGC features
dependent on bit E5; see Tables 15 and 16
L standard PLL gating
E6
1
0
gating in case of 36 % positive modulation
gating in case of 0 % positive modulation
VIF, SIF and tuner minimum gain
dependent on bit E7; see Table 15
Frequency selection
E5
E4 to E2
E1 and E0
see Table 17
Standard frequency sound intercarrier (sound 2nd IF)
fFM = 4.5 MHz
00
01
10
11
fFM = 5.5 MHz
fFM = 6.0 MHz
fFM = 6.5 MHz (for positive modulation choose 6.5 MHz)
Table 15 Options in extended TV mode; bit B3 = 0 of SAD = 00 register
BIT E7 = 0
FUNCTION
BIT E7 = 1
BIT E5 = 0
BIT E5 = 1
BIT E5 = 0
port function
VIF-AGC output(1)
BIT E5 = 1
Pin OP1
Pin OP2
Gain
port function
port function
VIF-AGC external input(1)
port function
port function
normal gain
port function
minimum gain
normal gain
external gain
Note
1. The corresponding port function has to be disabled (set to ‘high-impedance’); see Table 11 and Chapter 12,
characteristics table, note 12.
Table 16 Options in extended radio mode; bit B3 = 1 of SAD = 00 register
BIT E7 = 1
FUNCTION
Pin AFC
BIT E7 = 0
BIT E3 = 0
BIT E3 = 1
FM radio carrier related AFC
SIF-AGC radio output FM-AGC radio output
2004 Aug 25
20
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
Table 17 Frequency selection bits
BIT
E3
DESCRIPTION
TV MODE
BIT B3 = 0 OF REGISTER SAD = 00
RADIO MODE
E4
E2
BIT B3 = 1 OF REGISTER SAD = 00
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
fVIF = 58.75 MHz; note 1
fVIF = 45.75 MHz; note 1
fVIF = 38.9 MHz
fRIF1 = 33.3 MHz, fVCO = 44 MHz; fRIF2 = 10.7 MHz
fRIF1 = 41.3 MHz, fVCO = 52 MHz; fRIF2 = 10.7 MHz
fRIF1 = 33.3 MHz, fVCO = 44 MHz; fRIF2 = 10.7 MHz
fRIF1 = 41.3 MHz, fVCO = 52 MHz; fRIF2 = 10.7 MHz
fRIF1 = 33.3 MHz, fVCO = 44 MHz; fRIF2 = 10.7 MHz
fRIF1 = 33.3 MHz, fVCO = 44 MHz; fRIF2 = 10.7 MHz
fVIF = 38.0 MHz
fVIF = 33.9 MHz
fVIF = 33.4 MHz
fVIF = 45.75 MHz plus FM external input via fRIF1 = 33.3 MHz, fVCO = 44 MHz; fRIF2 = 10.7 MHz
pin FMIN; note 2
1
1
1
fVIF = 38.9 MHz plus FM external input via fRIF1 = 33.3 MHz, fVCO = 44 MHz; fRIF2 = 10.7 MHz
pin FMIN; note 2
Notes
1. Pin SIOMAD can be used for the selection of the different NTSC standards without I2C-bus. With a resistor on
pin SIOMAD, fVIF = 58.75 MHz; without a resistor on pin SIOMAD, fVIF = 45.75 MHz (NTSC-M).
2. Attention: video sound traps are locked on the FM VCO. The second VIF should be selected in accordance with the
selected video standard.
Table 18 Data setting after power-on reset (default setting with a resistor on pin SIOMAD)
MSB
LSB
REGISTER
Switching mode
D7
1
D6
1
D5
0
D4
1
D3
0
D2
1
D1
1
D0
0
Adjust mode
Data mode
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
Table 19 Data setting after power-on reset (default setting without a resistor on pin SIOMAD)
MSB
LSB
D0
REGISTER
D7
D6
D5
D4
D3
D2
D1
Switching mode
Adjust mode
Data mode
1
0
0
1
0
0
0
1
0
1
1
0
0
0
0
1
0
1
1
0
0
0
0
0
2004 Aug 25
21
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
10 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
5.5
UNIT
VP
Vn
supply voltage
voltage on
−
V
pins VIF1, VIF2, SIF1, SIF2, OP1, OP2, VP, and FMPLL
pin TAGC
0
0
−
VP
V
V
s
8.8
10
tsc
short-circuit time to ground or VP
storage temperature
Tstg
Tamb
−25
+150
°C
ambient temperature
TDA9887T (SO24) and TDA9887TS (SSOP24)
TDA9887HN (HVQFN32)
−20
+70
°C
°C
V
−20
+85
Ves
electrostatic discharge voltage on all pins
note 1
note 2
−400
−4000
+400
+3500
V
Notes
1. Machine model in accordance with SNW-FQ-302B: class C, discharging a 200 pF capacitor via a 0.75 µH series
inductance.
2. Human body model in accordance with SNW-FQ-302A: class 2, discharging a 100 pF capacitor via a 1.5 kΩ series
resistor.
11 THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient
TDA9887T (SO24)
in free air
76
105
40
K/W
K/W
K/W
TDA9887TS (SSOP24)
TDA9887HN (HVQFN32)
2004 Aug 25
22
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
12 CHARACTERISTICS
VP = 5 V; Tamb = 25 °C; see Table 21 for input frequencies; B/G standard is used for the specification (fPC = 38.9 MHz;
fSC = 33.4 MHz; PC/SC = 13 dB; fmod = 400 Hz); input level Vi(VIF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50 Ω via broadband transformer 1 : 1; video modulation DSB; residual carrier for B/G is 10 % and
for L is 3 %; video signal in accordance with “CCIR line 17 and line 330” or “NTC-7 Composite”; measurements taken in
test circuit of Fig.25; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (pin VP)
VP
IP
supply voltage
note 1
4.5
5.0
5.5
V
supply current
52
63
70
mA
Ptot
total power dissipation
−
305
385
mW
POWER-ON RESET
VP(start)
supply voltage for start of reset decreasing supply
voltage
2.5
3.0
3.5
4.4
V
V
VP(stop)
supply voltage for end of reset
increasing supply
voltage; I2C-bus
−
−
transmission enable
τP
time constant (R × C) for
network at pin VP
for applications without 1.2
I2C-bus
−
−
µs
VIF amplifier (pins VIF1 and VIF2)
Vi(VIF)(rms)
Vi(max)(rms)
Vi(ovl)(rms)
∆VIF(int)
VIF input voltage sensitivity
(RMS value)
−1 dB video at output
+1 dB video at output
note 2
−
60
190
−
100
−
µV
mV
mV
dB
maximum input voltage
(RMS value)
150
−
overload input voltage
(RMS value)
440
−
internal IF amplitude difference within AGC range;
−
0.7
between picture and sound
carrier
∆f = 5.5 MHz
GVIF(cr)
BVIF(−3dB)(ll)
BVIF(−3dB)(ul)
Ri(dif)
VIF gain control range
60
−
66
15
80
2
−
−
−
−
−
−
dB
lower limit −3 dB VIF bandwidth
upper limit −3 dB VIF bandwidth
differential input resistance
differential input capacitance
DC input voltage
MHz
MHz
kΩ
−
note 3
note 3
−
Ci(dif)
−
3
pF
VI
−
1.93
V
FPLL and true synchronous video demodulator; note 4
fVCO(max)
maximum oscillator frequency
for carrier regeneration
f = 2fPC
120
140
−
MHz
fVIF
vision carrier operating
frequencies
see Table 17
−
−
−
−
−
−
33.4
33.9
38.0
38.9
45.75
58.75
−
−
−
−
−
−
MHz
MHz
MHz
MHz
MHz
MHz
2004 Aug 25
23
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
∆fVIF
PARAMETER
CONDITIONS
MIN.
TYP.
±2.3
MAX.
UNIT
MHz
VIF frequency window of digital related to fVIF
;
−
−
acquisition help
acquisition time
see Fig.11
tacq
BL = 70 kHz; note 5
−
−
−
30
70
ms
Vi(lock)(rms)
input voltage sensitivity for PLL measured on pins VIF1
30
µV
to be locked (RMS value)
and VIF2;
maximum IF gain
Tcy(DAH)
cycle time of digital acquisition
help
−
64
−
µs
KO(VIF)
KD(VIF)
VIF VCO steepness
definition: ∆fVIF/∆VVPLL
−
−
20
23
−
−
MHz/V
VIF phase detector steepness definition: ∆IVPLL/∆ϕVIF
µA/rad
Video output 2 V (pin CVBS)
NORMAL MODE (SOUND CARRIER TRAP ACTIVE) AND SOUND CARRIER ON
Vo(v)(p-p)
video output voltage
(peak-to-peak value)
see Fig.5
1.7
2.0
−
2.3
V
%
−
∆Vo
video output voltage difference difference between
L and B/G standard
−12
1.90
1.0
+12
3.00
V/S
ratio between video
(black-to-white) and sync level
2.33
1.2
Vsync
sync voltage level
1.4
V
V
Vclip(u)
upper video clipping voltage
level
VP − 1.1 VP − 1
−
Vclip(l)
lower video clipping voltage
level
−
0.7
0.9
V
Ro
output resistance
note 3
−
−
30
Ω
Ibias(int)
internal DC bias current for
emitter-follower
1.5
2.0
−
mA
Io(sink)(max)
Io(source)(max)
∆Vo(CVBS)
maximum AC and DC output
sink current
1
−
−
−
−
mA
mA
maximum AC and DC output
source current
3.9
deviation of CVBS output
voltage
50 dB gain control
30 dB gain control
negative modulation
−
−
−
−
−
−
−
−
0.5
0.1
1
dB
dB
%
∆Vo(bl)
black level tilt
∆Vo(bl)(v)
vertical black level tilt for worst vision carrier
3
%
case in L standard
modulated by test line
(VITS) only
Gdif
differential gain
“CCIR 330”; note 6
B/G standard
L standard
−
−
−
−
5
7
4
−
%
−
%
ϕdif
differential phase
“CCIR 330”
2
deg
dB
S/NW
weighted signal-to-noise ratio
weighted in accordance 56
with “CCIR 567”;
59
see Fig.13; note 7
2004 Aug 25
24
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
S/NUW
PARAMETER
CONDITIONS
MIN.
47
TYP.
51
MAX.
UNIT
dB
unweighted signal-to-noise ratio note 7
−
αIM(blue)
intermodulation attenuation at
‘blue’
see Fig.14; note 8
f = 1.1 MHz
f = 3.3 MHz
58
58
64
64
−
−
dB
dB
αIM(yellow)
intermodulation attenuation at
‘yellow’
see Fig.14; note 8
f = 1.1 MHz
60
59
−
66
65
2
−
−
5
dB
dB
mV
f = 3.3 MHz
∆Vr(PC)(rms)
∆funw(p-p)
residual picture carrier
(RMS value)
fundamental wave and
harmonics
robustness for unwanted
frequency deviation of picture
carrier (peak-to-peak value)
3 % residual carrier;
50 % serration pulses;
L standard; note 3
−
−
−
−
12
3
kHz
%
∆ϕ
robustness for modulator
imbalance
0 % residual carrier;
50 % serration pulses;
L standard;
L-gating = 0 %; note 3
αH
suppression of video signal
harmonics
CL < 20 pF; RL > 1 kΩ; 35
AC load; note 9a
40
−
−
−
−
dB
dB
dB
αspur
suppression of spurious
elements
note 9b
40
20
PSRRCVBS
power supply ripple rejection at fripple = 70 Hz;
pin CVBS video signal; grey level;
25
positive and negative
modulation; see Fig.6
M/N STANDARD INCLUDING KOREA; see Fig.15
Bv(−3dB)(trap)
−3 dB video bandwidth
ftrap = 4.5 MHz; note 10 3.95
4.05
−
MHz
including sound carrier trap
αSC1
attenuation at first sound carrier f = 4.5 MHz
attenuation at first sound carrier f = 4.5 MHz
30
21
36
27
−
−
dB
dB
αSC1(60kHz)
fSC1 ± 60 kHz
αSC2
attenuation at second sound
carrier
f = 4.724 MHz
f = 4.724 MHz
21
27
−
dB
dB
ns
αSC2(60kHz)
td(g)(cc)
attenuation at second sound
carrier fSC2 ± 60 kHz
15
21
−
group delay at colour carrier
frequency
f = 3.58 MHz;
see Fig.16
110
180
250
B/G STANDARD; see Fig.17
Bv(−3dB)(trap)
−3 dB video bandwidth
including sound carrier trap
ftrap = 5.5 MHz; note 10 4.90
5.00
−
MHz
αSC1
attenuation at first sound carrier f = 5.5 MHz
attenuation at first sound carrier f = 5.5 MHz
30
24
36
30
−
−
dB
dB
αSC1(60kHz)
fSC1 ± 60 kHz
αSC2
attenuation at second sound
carrier
f = 5.742 MHz
25
21
27
−
dB
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
αSC2(60kHz)
PARAMETER
CONDITIONS
f = 5.742 MHz
MIN.
15
TYP.
21
MAX.
UNIT
dB
attenuation at second sound
−
carrier fSC2 ± 60 kHz
td(g)(cc)
group delay at colour carrier
frequency
f = 4.43 MHz;
see Fig.18
110
180
250
ns
I STANDARD; see Fig.19
Bv(−3dB)(trap)
−3 dB video bandwidth
including sound carrier trap
ftrap = 6.0 MHz; note 10 5.40
5.50
−
MHz
αSC1
attenuation at first sound carrier f = 6.0 MHz
attenuation at first sound carrier f = 6.0 MHz
26
20
32
26
−
−
dB
dB
αSC1(60kHz)
fSC1 ± 60 kHz
αSC2
attenuation at second sound
carrier
f = 6.55 MHz
f = 6.55 MHz
f = 4.43 MHz
12
10
−
18
15
90
−
dB
dB
ns
αSC2(60kHz)
td(g)(cc)
attenuation at second sound
carrier fSC2 ± 60 kHz
−
group delay at colour carrier
frequency
160
D/K STANDARD; see Fig.20
Bv(−3dB)(trap)
−3 dB video bandwidth
including sound carrier trap
ftrap = 6.5 MHz; note 10 5.50
5.95
−
MHz
αSC1
attenuation at first sound carrier f = 6.5 MHz
attenuation at first sound carrier f = 6.5 MHz
26
20
32
26
−
−
dB
dB
αSC1(60kHz)
fSC1 ± 60 kHz
αSC2
attenuation at second sound
carrier
f = 6.742 MHz
f = 6.742 MHz
f = 4.28 MHz
18
13
−
24
18
60
−
dB
dB
ns
αSC2(60kHz)
td(g)(cc)
attenuation at second sound
carrier fSC2 ± 60 kHz
−
group delay at colour carrier
frequency
130
Video output 1.1 V (pin CVBS)
TRAP BYPASS MODE AND SOUND CARRIER OFF; note 11
Vo(v)(p-p)
video output voltage
(peak-to-peak value)
see Fig.5
0.95
1.10
1.25
V
Vsync
sync voltage level
1.35
3.5
1.5
3.6
1.6
V
V
Vclip(u)
upper video clipping voltage
level
−
Vclip(l)
lower video clipping voltage
level
−
5
7
0.9
6
1.0
−
V
Bv(−1dB)
Bv(−3dB)
−1 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
AC load
MHz
MHz
−3 dB video bandwidth
CL < 20 pF; RL > 1 kΩ;
8
−
AC load
2004 Aug 25
26
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
S/NW
PARAMETER
CONDITIONS
MIN.
TYP.
59
MAX.
UNIT
dB
weighted signal-to-noise ratio
weighted in accordance 56
with “CCIR 567”;
see Fig.13; note 7
−
−
S/NUW
unweighted signal-to-noise ratio note 7
48
52
dB
VIF-AGC; note 12
tresp(inc)
AGC response time to an
increasing VIF step
negative modulation;
20 dB; note 13
−
−
−
−
4
−
−
−
−
ms
ms
ms
ms
positive modulation;
20 dB; note 13
2.6
3
tresp(dec)
AGC response time to a
decreasing VIF step
negative modulation;
20 dB; note 13
positive modulation;
20 dB; note 13
890
L standard; fast mode
−
−
2.6
−
−
ms/dB
ms/dB
L standard; normal
mode; note 13
143
∆Vi(VIF)
VIF amplitude step for activating L standard
AGC fast mode
−2
−6
−10
dB
VVAGC
CRstps
gain control voltage range
0.8
−
3.5
V
control steepness
definition:
−
−80
−
dB/V
∆GVIF/∆VVAGC
;
VVAGC = 2 to 3 V
Vth(VIF)
threshold voltage for high level see Tables 5 and 6
VIF input
120
200
320
µV
PIN VAGC
Ich(max)
maximum charge current
additional charge current
L standard
−
−
100
100
−
−
µA
Ich(add)
L standard: in the event
of missing VITS pulses
and no white video
content
nA
Idch
discharge current
L standard; normal
mode
−
−
35
−
−
nA
L standard; fast mode
1.8
µA
Tuner AGC (pin TAGC); see Figs 7 to 10
Vi(VIF)(start1)(rms) VIF input signal voltage for
ITAGC = 120 µA;
−
2
5
mV
mV
minimum starting point of tuner RTOP = 22 kΩ or
takeover at pins VIF1 and VIF2 no RTOP and −15 dB via
(RMS value)
I2C-bus (see Table 13)
Vi(VIF)(start2)(rms) VIF input signal voltage for
ITAGC = 120 µA;
45
90
−
maximum starting point of tuner RTOP = 0 Ω or no RTOP
takeover at pins VIF1 and VIF2 and +15 dB via I2C-bus
(RMS value)
(see Table 13)
2004 Aug 25
27
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
2.5
UNIT
mV
Vi(SIF)(start1)(rms)
SIF input signal voltage for
I
TAGC = 120 µA;
−
1
minimum starting point of tuner RTOP = 22 kΩ or
takeover at pins SIF1 and SIF2 no RTOP and −15 dB via
(RMS value)
I2C-bus (see Table 13)
Vi(SIF)(start2)(rms)
SIF input signal voltage for
maximum starting point of tuner RTOP = 0 Ω or no RTOP
takeover at pins SIF1 and SIF2 and +15 dB via I2C-bus
I
TAGC = 120 µA;
22.5
7
45
−
mV
(RMS value)
(see Table 13)
QVTOP
tuner takeover point accuracy
ITAGC = 120 µA;
R
no RTOP and 0 dB via
I2C-bus (see Table 13)
17
43
0.07
mV
TOP = 10 kΩ or
∆QVTOP/∆T
takeover point variation with
temperature
ITAGC = 120 µA
−
0.03
dB/K
Vo
permissible output voltage
saturation voltage
sink current
from external source
ITAGC = 450 µA
−
−
−
−
−
−
8.8
V
Vsat
Isink
0.5
V
no tuner gain reduction;
0.75
µA
VTAGC = 8.8 V
maximum tuner gain
reduction; VTAGC = 1 V
450
3
600
5
750
8
µA
∆GIF
IF slip by automatic gain control tuner gain current from
20 % to 80 %
dB
AFC circuit and AGC monitor options (pin AFC); see Figs 11 and 12; notes 14 and 15
Vsat(ul)
Vsat(ll)
upper limit saturation voltage
lower limit saturation voltage
output source current
VP − 0.6 VP − 0.3
−
V
−
0.3
0.6
240
240
V
Io(source)
Io(sink)
160
160
200
200
µA
µA
output sink current
TV MODE
AFCstps
QfVIF(a)
QfVIF(d)
AFC control steepness
definition: ∆IAFC/∆fVIF
0.85
1.05
−
1.25
+20
µA/kHz
kHz
analog accuracy of AFC circuit IAFC = 0; fREF = 4 MHz −20
digital accuracy of AFC circuit
via I2C-bus
IAFC = 0; fREF = 4 MHz; −20
1 digit = 25 kHz
−
+20
+ 1 digit
kHz
− 1 digit
RADIO MODE
AFCstps
AFC control steepness
definition: ∆IAFC/∆fRIF
0.85
1.05
−
1.25
+10
µA/kHz
kHz
QfRIF(a)
analog accuracy of AFC circuit IAFC = 0; fREF = 4 MHz −10
QfRIF(d)
digital accuracy of AFC circuit
via I2C-bus
IAFC = 0; fREF = 4 MHz; −10
1 digit = 25 kHz − 1 digit
−
+10
+ 1 digit
kHz
Io(source)
Io(sink)
SIF or FM-AGC monitor source see Table 16
current
−
−
−
600
270
µA
µA
SIF or FM-AGC monitor sink
current
see Table 16
−
2004 Aug 25
28
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SIF amplifier (pins SIF1 and SIF2)
Vi(SIF)(rms)
Vi(max)(rms)
Vi(ovl)(rms)
SIF input voltage sensitivity
(RMS value)
FM mode; −3 dB at
intercarrier output
pin SIOMAD
−
−
30
70
µV
AM mode; −3 dB at
AF output pin AUD
70
70
100
µV
maximum input voltage
(RMS value)
FM mode; 1 dB at
intercarrier output
pin SIOMAD
50
−
mV
AM mode; 1 dB at
AF output pin AUD
80
140
−
mV
mV
overload input voltage
(RMS value)
note 2
−
−
320
GSIF(cr)
BSIF(−3dB)(ll)
BSIF(−3dB)(ul)
Ri(dif)
SIF gain control range
FM and AM mode
60
−
66
15
80
2
−
−
−
−
−
−
dB
lower limit −3 dB SIF bandwidth
upper limit −3 dB SIF bandwidth
differential input resistance
differential input capacitance
DC input voltage
MHz
MHz
kΩ
−
note 3
note 3
−
Ci(dif)
−
3
pF
VI
−
1.93
V
SIF-AGC detector
tresp
AGC response time to an
increasing or decreasing SIF
step of 20 dB
FM or AM fast step
increasing
−
−
8
−
−
ms
ms
decreasing
25
AM slow step
increasing
−
−
80
−
−
ms
ms
decreasing
250
Single reference QSS intercarrier mixer (pin SIOMAD)
Vo(intc)(rms)
IF intercarrier output level
(RMS value)
QSS mode;
SC1; SC2 off
90
90
−
140
140
75
180
180
−
mV
mV
mV
L standard;
without modulation
intercarrier mode;
PC/SC1 = 20 dB;
SC2 off; note 16
Bintc(−3dB)(ul)
upper limit −3 dB intercarrier
12
15
−
MHz
bandwidth
∆Vr(SC)(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
QSS mode
−
−
2
2
5
5
mV
mV
intercarrier mode
2004 Aug 25
29
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
∆Vr(PC)(rms)
residual picture carrier
(RMS value)
fundamental wave and
harmonics
QSS mode
−
−
2
5
5
mV
intercarrier mode
intercarrier mode;
20
mV
dB
αH
suppression of video signal
harmonics
35
40
−
fvideo = 5 MHz
Ro
output resistance
DC output voltage
note 3
−
−
30
−
Ω
VO
−
2
V
Ibias(int)
internal DC bias current for
emitter follower
0.90
1.15
−
mA
Io(sink)(max)
Io(source)(max)
Io(source)
maximum AC output sink
current
0.6
0.8
−
mA
mA
mA
maximum AC output source
current
0.6
0.8
−
DC output source current
MAD2 activated;
note 17
0.75
0.93
1.20
FM-PLL demodulator; notes 15 and 18 to 22
SOUND INTERCARRIER OUTPUT (PIN SIOMAD)
VFM(rms)
IF intercarrier level for gain
corresponding PC/SC
3.2
−
320
mV
controlled operation of FM-PLL ratio at input pins VIF1
(RMS value)
and VIF2 is 7 to 47 dB
VFM(lock)(rms)
VFM(det)(rms)
fFM
IF intercarrier level for lock-in of
PLL (RMS value)
−
−
−
−
2
mV
mV
IF intercarrier level for
FM carrier detect (RMS value)
see Table 6
2.3
sound intercarrier operating
FM frequencies
see Tables 11 and 14
−
−
−
−
−
4.5
5.5
6.0
6.5
10.7
−
−
−
−
−
MHz
MHz
MHz
MHz
MHz
IF INTERCARRIER INPUT (PIN FMIN)
Vi(FM)(rms)
IF intercarrier input voltage for
gain controlled operation of
FM-PLL (RMS value)
radio mode and
FM external mode;
see Table 16
1
−
100
mV
VFM(lock)(rms)
VFM(det)(rms)
IF intercarrier level for lock-in of
PLL (RMS value)
−
−
−
−
0.7
0.8
mV
mV
IF intercarrier level for
see Table 6
FM carrier detect (RMS value)
2004 Aug 25
30
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
AUDIO OUTPUT (PIN AUD)
Vo(AF)(rms)
AF output voltage (RMS value) 25 kHz FM deviation;
400
500
600
mV
75 µs de-emphasis
27 kHz FM deviation;
50 µs de-emphasis
430
200
1.3
−
540
250
1.4
650
300
−
mV
mV
V
radio mode; 22.5 kHz
modulation
Vo(AF)(cl)(rms)
∆Vo(AF)/∆T
THD
AF output clipping level
(RMS value)
THD < 1.5 %
AF output voltage variation with
temperature
3 × 10−3 7 × 10−3 dB/K
total harmonic distortion
50 µs de-emphasis;
FM deviation: for
TV mode 27 kHz and
for radio mode
−
0.15
0.50
%
22.5 kHz
∆fAF
frequency deviation
THD < 1.5 %; note 19
−
−
−
−
±55
kHz
kHz
−6 dB AF output via
I2C-bus; note 19
±110
BAF(−3dB)
−3 dB AF bandwidth
without de-emphasis;
measured with FM-PLL
filter of Fig.25
80
52
100
56
−
−
kHz
dB
S/NW(AF)
weighted signal-to-noise ratio of FM-PLL only;
audio signal 27 kHz FM deviation;
50 µs de-emphasis
black picture;
see Fig.21
50
−
56
58
−
−
−
2
dB
dB
mV
S/NUW(AF)
unweighted signal-to-noise ratio radio mode; 22.5 kHz
modulation
∆Vr(SC)(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics; without
de-emphasis
−
αAM(sup)
AM suppression of
FM demodulator
referenced to 27 kHz
FM deviation;
50 µs de-emphasis;
AM: f = 1 kHz;
m = 54 %
40
14
46
20
−
−
dB
dB
PSRRFM
power supply ripple rejection
fripple = 70 Hz;
see Fig.6
FM-PLL FILTER (PIN FMPLL)
Vloop
DC loop voltage
1.5
−
3.3
V
Io(source)(PD)(max) maximum phase detector output
source current
−
60
−
µA
Io(sink)(PD)(max)
maximum phase detector output
sink current
−
60
−
µA
2004 Aug 25
31
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
55
MAX.
UNIT
µA
Io(source)(DAH)
output source current of digital
acquisition help
−
−
−
−
−
−
−
−
Io(sink)(DAH)
tW(DAH)
output sink current of digital
acquisition help
55
16
64
µA
µs
µs
pulse width of digital acquisition
help current
Tcy(DAH)
cycle time of digital acquisition
help
KO(FM)
KD(FM)
VCO steepness
definition: ∆fFM/∆VFMPLL
definition: ∆IFMPLL/∆ϕFM
−
−
3.3
4
−
−
MHz/V
phase detector steepness
µA/rad
Audio amplifier
DE-EMPHASIS NETWORK (PIN DEEM)
Ro
output resistance
50 µs de-emphasis;
see Table 12
4.4
6.6
−
5.0
5.6
8.4
−
kΩ
kΩ
mV
V
75 µs de-emphasis;
see Table 12
7.5
VAF(rms)
VO
audio signal (RMS value)
DC output voltage
fAF = 400 Hz;
170
2.37
VAUD = 500 mV
−
−
AF DECOUPLING (PIN AFD)
Vdec
DC decoupling voltage
dependent on fFM
1.5
−
3.3
V
intercarrier frequency
IL
leakage current
∆VO(AUD) < ±50 mV
−
−
±25
nA
µA
µA
Ich(max)
Idch(max)
maximum charge current
maximum discharge current
1.15
1.15
1.50
1.50
1.85
1.85
AUDIO OUTPUT (PIN AUD)
Ro
output resistance
note 3
−
−
300
−
Ω
VO(AUD)
RL
DC output voltage
load resistance
−
2.37
−
V
AC-coupled
10
100
−
−
kΩ
kΩ
nF
kHz
RL(DC)
CL
DC load resistance
load capacitance
−
−
−
1.5
−
BAF(−3dB)(ul)
upper limit −3 dB AF bandwidth
150
−
of audio amplifier
BAF(−3dB)(ll)
lower limit −3 dB AF bandwidth note 20
−
−
20
Hz
of audio amplifier
αmute
mute attenuation of AF signal
DC jump voltage for switching
via I2C-bus
activated by digital
70
75
−
dB
∆Vjump
−
±50
±150
mV
AF output to mute state or vice acquisition help or via
versa
I2C-bus mute
2004 Aug 25
32
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
FM operation; notes 21 and 23
INTERCARRIER AF PERFORMANCE; note 24
S/NW
weighted signal-to-noise ratio
PC/SC ratio is 21 to
27 dB at pins VIF1 and
VIF2
black picture
white picture
50
56
−
−
−
dB
45
40
51
46
dB
dB
6 kHz sine wave
(black-to-white
modulation)
sound carrier
subharmonics;
f = 2.75 MHz ±3 kHz
35
40
40
−
−
dB
dB
SINGLE REFERENCE QSS AF PERFORMANCE; notes 25 and 26
S/NW(SC1)
weighted signal-to-noise ratio
for SC1
PC/SC1 ratio at
−
pins VIF1 and VIF2;
27 kHz (54 % FM
deviation); “CCIR 468”
black picture
white picture
53
50
44
58
53
48
−
−
−
dB
dB
dB
6 kHz sine wave
(black-to-white
modulation)
250 kHz square wave 40
(black-to-white
modulation)
45
51
52
−
−
−
dB
dB
dB
sound carrier
subharmonics;
f = 2.75 MHz ±3 kHz
45
46
sound carrier
subharmonics;
f = 2.87 MHz ±3 kHz
2004 Aug 25
33
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
S/NW(SC2)
PARAMETER
CONDITIONS
PC/SC2 ratio at
pins VIF1 and VIF2;
27 kHz (54 % FM
MIN.
40
TYP.
MAX.
UNIT
dB
weighted signal-to-noise ratio
for SC2
−
−
deviation); “CCIR 468”
black picture
white picture
48
46
42
55
51
46
−
−
−
dB
dB
dB
6 kHz sine wave
(black-to-white
modulation)
250 kHz square wave 29
(black-to-white
modulation)
34
50
51
−
−
−
dB
dB
dB
sound carrier
subharmonics;
f = 2.75 MHz ±3 kHz
44
45
sound carrier
subharmonics;
f = 2.87 MHz ±3 kHz
AM operation
L STANDARD (PIN AUD); see Figs 22 and 23; note 27
Vo(AF)(rms)
THD
AF output voltage (RMS value) 54 % modulation
400
−
500
0.5
125
50
600
1.0
−
mV
%
total harmonic distortion
54 % modulation
BAF(−3dB)
S/NW(AF)
−3 dB AF bandwidth
100
45
kHz
dB
weighted signal-to-noise ratio of in accordance with
−
audio signal
“CCIR 468”
VO(AUD)
DC potential voltage
power supply ripple rejection
−
2.37
26
−
−
V
PSRRAM
see Fig.6
20
dB
Reference frequency input (pin REF)
VI
DC input voltage
input resistance
2.3
−
2.6
5
2.9
−
V
Ri
note 3
kΩ
Ω
Rxtal
resonance resistance of crystal operation as crystal
oscillator
−
−
200
Cx
pull-up/down capacitance
reference signal frequency
note 28
note 29
note 15
−
−
−
−
4
−
−
pF
fref
−
MHz
%
∆fref
tolerance of reference signal
frequency
±0.1
Vref(rms)
Ro(ref)
CK
reference signal voltage
(RMS value)
operation as input
terminal
80
−
−
400
4.7
−
mV
kΩ
pF
output resistance of reference
signal source
−
decoupling capacitance to
operation as input
22
100
external reference signal source terminal
2004 Aug 25
34
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I2C-bus transceiver (pins SDA and SCL); notes 30 and 31
fSCL
VIH
SCL clock frequency
HIGH-level input voltage
LOW-level input voltage
HIGH-level input current
LOW-level input current
LOW-level output voltage
output sink current
0
3
−
−
−
−
−
−
−
−
400
kHz
VCC
+1.5
+10
+10
0.4
V
VIL
−0.3
−10
−10
−
V
IIH
µA
µA
V
IIL
VOL
Io(sink)
Io(source)
IOL = 3 mA
VP = 0 V
VP = 0 V
−
10
µA
µA
output source current
−
10
Output ports (pins OP1 and OP2); note 32
VOL
LOW-level output voltage
IOL = 2 mA (sink
current)
−
−
0.4
V
VOH
HIGH-level output voltage
output sink current
−
−
−
−
−
−
6
V
Io(sink)
2
mA
µA
Io(sink/source)(max) maximum output sink or source pin OP2 functions as
current VIF-AGC output
10
Notes
1. Values of video and sound parameters can be decreased at VP = 4.5 V.
2. Level headroom for input level jumps during gain control setting.
3. This parameter is not tested during the production and is only given as application information for designing the
receiver circuit.
4. Loop bandwidth BL = 70 kHz (damping factor d = 1.9; calculated with sync level within gain control range).
Calculation of the VIF-PLL filter can be done by use of the following formula:
1
2π
BL–3dB
=
K K R , valid for d ≥ 1.2
------
O
D
1
2
d = R K K C ,
--
O
D
where:
rad
--------
V
Hz
------
V
µA
--------
rad
KO is the VCO steepness
or 2π
; KD is the phase detector steepness
;
R is the loop resistor; C is the loop capacitor; BL−3dB is the loop bandwidth for −3 dB; d is the damping factor.
5. Vi(VIF) = 10 mV (RMS); ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video
modulation.
6. Condition: luminance range (5 steps) from 0 % to 100 %.
7. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value on pin CVBS). B = 5 MHz
(B/G, I and D/K standard). Noise analyzer setting: 200 kHz high-pass and SC-trap switched on.
8. The intermodulation figures are defined for:
V0 at 4.4 MHz
a) f = 1.1 MHz (referenced to black and white signal) as αIM = 20 log
+ 3.6 dB
-------------------------------------
V0 at 1.1 MHz
V0 at 4.4 MHz
b) f = 3.3 MHz (referenced to colour carrier) as αIM = 20 log
-------------------------------------
V0 at 3.3 MHz
2004 Aug 25
35
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
9. Measurements taken with SAW filter M1963M (sound shelf: 20 dB); loop bandwidth BL = 70 kHz.
a) Modulation Vestigial Side-Band (VSB); sound carrier off; fvideo > 0.5 MHz.
b) Sound carrier on; fvideo = 10 kHz to 10 MHz.
10. AC load; CL < 20 pF and RL > 1 kΩ. The sound carrier frequencies (depending on TV standard) are attenuated by
the integrated sound carrier traps (see Figs 15 to 20; H (s) is the absolute value of transfer function).
11. The sound carrier trap can be bypassed by switching the I2C-bus. In this way the full composite video spectrum
appears at pin CVBS. The amplitude is 1.1 V (p-p).
12. If selected by the I2C-bus, the VIF-AGC voltage can be monitored at pin OP2, and pin OP1 can be used as input. In
this case, both pins cannot be used for the normal port function.
13. The response time is valid for a VIF input level range from 200 µV to 70 mV.
14. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.11. The AFC steepness can be changed by resistors R1 and R2.
15. The tolerance of the reference frequency determines the accuracy of the VIF-AFC, FM demodulator centre
frequency and maximum FM deviation.
16. The intercarrier output signal at pin SIOMAD can be calculated by the following formula taking into account the
internal video signal with 1.1 V (p-p) as a reference:
1
Vo(intc)(rms) = 1.1 ×
× 10r V
----------
2 2
V
1
and r =
×
i(SC)(dB) + 6 dB ± 3 dB
------
20
-------------
Vi(PC)
where:
1
V
is the correction term for RMS value, i(SC)(dB) is the sound-to-picture carrier ratio at pins VIF1 and VIF2
----------
---------------
Vi(PC)
2 2
in dB, 6 dB is the correction term of internal circuitry and ±3 dB is the tolerance of video output and intercarrier output
Vo(intc)(rms)
.
17. For normal operation (with the I2C-bus) no DC load at pin SIOMAD is allowed. The second module address (MAD2)
will be activated by the application of a 2.2 kΩ resistor between pin SIOMAD and ground. If this MAD2 is activated,
also the power-on set-up state activates a VIF frequency of 58.75 MHz.
18. SIF input level is 10 mV (RMS); VIF input level is 10 mV (RMS) unmodulated.
19. Measured with an FM deviation of 25 kHz and the typical AF output voltage of 500 mV (RMS). The AF output signal
can be attenuated by 6 dB to 250 mV (RMS) via the I2C-bus. For handling a frequency deviation of more than 55 kHz,
the AF output signal has to be reduced in order to avoid clipping (THD < 1.5 %).
20. The lower limit of the audio bandwidth depends on the value of the capacitor at pin AFD. A value of CAF = 470 nF
leads to fAF(−3dB) ≈ 20 Hz and CAF = 220 nF leads to fAF(−3dB) ≈ 40 Hz.
21. For all S/N measurements the VIF modulator in use has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) QSS AF performance, measured with the television demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB (at deviation 27 kHz) for 6 kHz sine wave black-to-white video modulation.
c) Picture-to-sound carrier ratio PC/SC1 = 13 dB (transmitter).
2004 Aug 25
36
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
22. Calculation of the loop filter parameters can be done approximately using the following formulae:
KOKD
1
fo
=
---------------
CP
------
2π
1
ϑ =
-----------------------------------
2R KOKDCP
BL–3dB = fo(1.55 – ϑ 2)
The formulae are only valid under the following conditions:
ϑ ≤ 1 and CS > 5CP
where:
rad
--------
V
Hz
------
V
KO is the VCO steepness
or 2π
;
µA
--------
rad
KD is the phase detector steepness
;
R is the loop resistor;
CS is the series capacitor;
CP is the parallel capacitor;
fo is the natural frequency of the PLL;
BL−3dB is the loop bandwidth for −3 dB;
ϑ is the damping factor. For examples, see Table 20.
23. The PC/SC ratio is calculated as the addition of TV transmitter PC/SC1 ratio and SAW filter PC/SC1 ratio. This PC/SC
ratio is necessary to achieve the S/NW values as noted. A different PC/SC ratio will change these values.
24. Measurements taken with SAW filter G1984 (Siemens) for vision and sound IF (sound shelf: 14 dB).
Picture-to-sound carrier ratio of transmitter PC/SC = 13 dB. Input level on pins VIF1 and VIF2 of
Vi(SIF) = 10 mV (RMS) sync level, 27 kHz FM deviation for sound carrier, fAF = 400 Hz. Measurements in accordance
with “CCIR 468”. De-emphasis is 50 µs.
25. The QSS signal output on pin SIOMAD is analysed by a test demodulator TDA9820. The S/N ratio of this device is
more than 60 dB, related to a deviation of ±27 kHz, in accordance with “CCIR 468”.
26. Measurements taken with SAW filter K3953 for vision IF (suppressed sound carrier) and K9453 for sound IF
(suppressed picture carrier). Input level Vi(SIF) = 10 mV (RMS), 27 kHz (54 % FM deviation).
27. Measurements taken with SAW filter K9453 (Siemens) for AM sound IF (suppressed picture carrier).
28. The value of Cx determines the accuracy of the resonance frequency of the crystal. It depends on the type of crystal
used.
29. Pin REF is able to operate as a 1-pin crystal oscillator input as well as an external reference signal input, e.g. from
the tuning system.
30. The SDA and SCL lines will not be pulled down if VCC is switched off.
31. The AC characteristics are in accordance with the I2C-bus specification for fast mode (maximum clock frequency is
400 kHz). Information about the I2C-bus can be found in the brochure “The I2C-bus and how to use it” (order number
9398 393 40011).
32. Port P1 and port P2 are open-collector outputs.
2004 Aug 25
37
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
Table 20 Examples to note 22 (FM-PLL filter)
BL−3dB (kHz)
CS (nF)
CP (pF)
R (kΩ)
ϑ
100
160
10
10
390
150
5.6
9.1
0.5
0.5
Table 21 Input frequencies and carrier ratios
B/G
STANDARD
M/N
STANDARD
L
L ACCENT
STANDARD
DESCRIPTION
VIF carrier
SYMBOL
UNIT
STANDARD
fPC
38.9
33.4
33.158
13
45.75 or 58.75
38.9
32.4
−
33.9
40.4
−
MHz
MHz
MHz
dB
SIF carrier
fSC1
fSC2
SC1
SC2
41.25 or 54.25
−
7
−
Picture-to-sound
carrier ratio
10
10
20
−
−
dB
2004 Aug 25
38
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
trap bypass mode
normal mode
zero carrier level
white level
2.72 V
2.6 V
3.41 V
3.20 V
black level
1.83 V
1.5 V
1.80 V
1.20 V
sync level
MHC115
Fig.5 Typical video signal levels on output pin CVBS (sound carrier off).
V
P
(V)
V
= 5 V
P
5
100 mV
TDA9887
f
= 70 Hz
ripple
MHC145
t (s)
Fig.6 Ripple rejection condition.
39
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
mhc116
I
TAGC
V
VAGC
(V)
(µA)
600
500
400
300
200
100
0
4
3
2
(1)
(2)
(3)
(4)
1
30 40 50 60 70 80 90 100 110 120
V
i(VIF)
(dBµV)
(1) VVAGC is VIF-AGC voltage and can only be measured at pin OP2 controlled by the I2C-bus (see Table 15).
(2)
TAGC is tuner current in TV mode with RTOP = 22 kΩ or setting via I2C-bus at −15 dB.
I
(3) ITAGC is tuner current in TV mode with RTOP = 10 kΩ or setting via I2C-bus at 0 dB.
(4) ITAGC is tuner current in TV mode with RTOP = 0 kΩ or setting via I2C-bus at +15 dB.
Fig.7 Typical VIF and tuner AGC characteristic.
MHC148
mhb159
4
110
handbook, halfpage
V
i(VIF)
V
(dBµV)
FMAGC
(V)
100
3
90
80
70
60
2
1
40
60
80
100
(dBµV)
120
0
4
8
12
16
20
24
(kΩ)
V
R
TOP
i(FMIN)
Fig.8 Typical tuner takeover point as a function of
resistor RTOP
.
Fig.9 Typical FM-AGC characteristic.
2004 Aug 25
40
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
MHC149
I
TAGC
(µA)
V
SAGC
(V)
4
600
500
400
300
200
100
0
3
(1)
(2)
(3)
(4)
(5)
2
1
30
40
50
60
70
80
90
100 110 120
(dBµV)
V
i(SIF)
(1) VSAGC is SIF-AGC voltage in FM mode.
(2) VSAGC is SIF-AGC voltage in AM mode.
(3) ITAGC is tuner current in TV mode with RTOP = 22 kΩ or setting via I2C-bus at −15 dB.
(4) ITAGC is tuner current in TV mode with RTOP = 10 kΩ or setting via I2C-bus at 0 dB.
(5)
I
TAGC is tuner current in TV mode with RTOP = 0 kΩ or setting via I2C-bus at +15 dB.
Fig.10 Typical SIF and tuner AGC characteristic.
lock range without SAW filter
AFC window
I
AFC
5
4
3
2
1
0
(µA)
V
AFC
−200
V
P
(V)
−100
0
R1
22 kΩ
I
AFC
21
(23)
V
AFC
TDA9887
R2
22 kΩ
+100
+200
36
37
38
40
41
38.9
f (MHz)
38.71 39.09
mhc146
Pin number for TDA9887HN in parenthesis.
Fig.11 Typical analog AFC characteristic for VIF.
41
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
I
AFC
5
(µA)
V
AFC
(V)
−200
V
P
4
3
2
1
0
−100
0
R1
22 kΩ
not defined
not defined
I
AFC
21
(23)
V
AFC
TDA9887
R2
22 kΩ
+100
+200
8
9
10
10.7 11
10.9125
12
13
f (MHz)
10.5125
mhc147
Pin number for TDA9887HN in parenthesis.
Fig.12 Typical analog AFC characteristic for RIF.
3.2 dB
mhc112
80
10 dB
S/N
(dB)
13.2 dB
21 dB
13.2 dB
21 dB
60
40
20
0
SC CC
PC
SC CC
PC
BLUE
YELLOW
mha739
30
50
70
90
V
110
(dBµV)
SC is sound carrier, with respect to sync level.
i(VIF)
CC is chrominance carrier, with respect to sync level.
PC is picture carrier, with respect to sync level.
The sound carrier levels are taking into account a sound shelf
attenuation of 14 dB (SAW filter G1984M).
Fig.13 Typical signal-to-noise ratio as a function of
VIF input voltage.
Fig.14 Input signal conditions.
2004 Aug 25
42
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
mhc122
10
H(s)
(dB)
0
−10
−20
−30
−40
minimum
requirements
2
2.5
3
3.5
4
4.5
5
f (MHz)
Fig.15 Typical amplitude response for sound trap at M/N standard (including Korea).
mhb167
400
group
delay
(ns)
300
200
100
0
ideal characteristic
due to pre-correction
in the transmitter
minimum
requirements
−100
0
0.5
1
1.5
2
2.5
3
3.5
4
f (MHz)
Overall delay is not shown, here the maximum ripple is specified.
Fig.16 Typical group delay for sound trap at M/N standard.
43
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
mhb168
10
H(s)
(dB)
0
−10
−20
−30
−40
minimum
requirements
4
4.5
5
5.5
6
6.5
7
f (MHz)
Fig.17 Typical amplitude response for sound trap at B/G standard.
mhb169
400
group
delay
(ns)
300
200
100
0
ideal characteristic
due to pre-correction
in the transmitter
minimum
requirements
−100
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
f (MHz)
Overall delay is not shown, here the maximum ripple is specified.
Fig.18 Typical group delay for sound trap at B/G standard.
44
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
mhc123
10
H(s)
(dB)
0
−10
−20
−30
−40
minimum
requirements
4
4.5
5
5.5
6
6.5
7
f (MHz)
Fig.19 Typical amplitude response for sound trap at I standard.
mhb171
10
H(s)
(dB)
0
−10
−20
−30
−40
minimum
requirements
4
4.5
5
5.5
6
6.5
7
f (MHz)
Fig.20 Typical amplitude response for sound trap at D/K standard.
45
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
mhc118
10
0
(1)
S/N
W
(dB)
−10
−20
−30
−40
−50
−60
−70
(2)
(3)
52
49
46
43
40
37
34
31
28
25
22
19
16
13
10
7
4
PC/SC ratio
gain controlled operation of FM PLL
(1) Signal.
Conditions: PC/SC ratio measured at pins VIF1 and VIF2; via transformer;
27 kHz FM deviation; 50 µs de-emphasis.
(2) Noise at H-picture (CCIR weighted quasi peak).
(3) Noise at black picture (CCIR weighted quasi peak).
Fig.21 Audio signal-to-noise ratio as a function of picture-to-sound carrier ratio in intercarrier mode.
2004 Aug 25
46
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
mhc119
10
(1)
S/N
W
(dB)
−10
−30
−50
−70
(2)
30
50
70
90
110
V (dBµV)
i
(1) Signal.
(2) Noise.
Condition: m = 54 %.
Fig.22 Typical takeover audio signal-to-noise ratio as a function of input signal at AM standard.
mhc120
1.5
THD
(%)
1.0
0.5
0
−2
−1
2
10
10
1
10
10
f
(kHz)
AF
CAGC = 2.2 µF; m = 54 %.
Fig.23 Typical total harmonic distortion as a function of audio frequency at AM standard.
47
2004 Aug 25
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
MHC150
140
10
IF signals
RMS value
(V)
antenna input
(dBµV)
video 2 V (p-p)
120
1
(1)
−1
100
10
SAW insertion
loss 20 dB
IF slip
6 dB
−2
10 (TOP)
80
tuning gain
control range
70 dB
VIF AGC
−3
10
60
−3
0.66 × 10
SAW insertion
loss 20 dB
−4
10
40
40 dB
RF gain
−5
10
20
10
−5
0.66 × 10
VIF amplifier, demodulator
and video
VHF/UHF tuner
tuner
VIF
TDA9887
SAW filter
(1) Depends on TOP.
Fig.24 Front-end level diagram.
48
2004 Aug 25
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external
reference
AFC
output
VIF-PLL
filter
CVBS
output
tuner AGC
output
radio test
input
(2)
V
P
SIF
input
1 : 1
1.5
nF
22
kΩ
100
nF
100
pF
150 Ω
4 MHz
51 Ω
(1)
R3
R2
51 Ω
C
x
150 kΩ
150 kΩ
22 kΩ
220 nF
VPLL
470 nF
VAGC
V
SIF2
24
SIF1
OP2
22
AFC
P
AGND
18
CVBS
REF
TAGC
FMIN
23
(26)
21
(23)
20
(22)
19
(21)
17
16
15
14
13
(27)
(24)
(20)
(18)
(17)
(16)
(15)
(14)
TDA9887
(30)
1
(31)
2
(1)
3
(2)
4
(3)
5
(4)
6
(5)
7
(7)
8
(8)
9
(9)
10
(10)
11
(11)
12
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
VIF
input
1 : 1
10 nF
470 nF
10 nF
390
pF
R1
MAD
select
2.2
kΩ
(1)
22 kΩ
5.6 kΩ
51 Ω
FM-PLL
filter
audio
output
intercarrier
output
mhc151
Pin numbers for TDA9887HN in parenthesis.
(1) Optional for I2C-bus address selection.
Option
R1 not used
1000 011 (R/W)
1001 011 (R/W)
R1 = 2.2 kΩ
R2 and R3 not used
R2 = R3 = 150 kΩ
1000 010 (R/W)
1001 010 (R/W)
(2) Different VIF loop filter in comparison with the application circuit due to different input characteristics (SAW filter or transformer).
Fig.25 Test circuit.
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680 kΩ
CVBS output
f
ref
5 V
tuner AGC
220 kΩ
BA277
(3)
BC847C
75 Ω
10 µF
12 kΩ
BA277
BA277
1.5
nF
5 V
220 Ω
22 kΩ
1
2
5
4
330 Ω
BC847
SAW
FILTER
K9456
100 kΩ
47 µF
(2)
330 Ω
10 nF
(1)
220 nF
VPLL
10 nF
470 nF
100 pF
3
6.8
kΩ
6.8
kΩ
V
SIF2
24
SIF1
23
OP2
AFC
P
AGND
CVBS
VAGC
16
REF
TAGC
14
FMIN
(2)
22
(24)
21
(23)
20
(22)
19
(21)
18
(20)
17
(18)
15
(16)
13
10.7 MHz
(27)
(26)
(17)
(15)
(14)
5 V
10 nF
TDA9887
22 kΩ
(2)
330 Ω
(30)
1
(31)
2
(1)
3
(2)
4
(3)
5
(4)
6
(5)
7
(7)
8
(8)
9
(9)
10
(10)
11
(11)
12
VIF1
VIF2
OP1
FMPLL
DEEM
10 nF
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
100 Ω
100 Ω
IF
input
1
2
5
10 nF
470 nF
SAW
FILTER
K3953
390
pF
4
51 Ω
5.6 kΩ
(3)
2
3
I C-bus
AF output
intercarrier
output
positive supply
I C-bus controller
2
mhc152
Pin numbers for TDA9887HN in parenthesis.
(1) If pin OP2 outputs VIF-AGC voltage, then pin OP1 can be used for SAW switching.
(2) Only for radio mode, not needed for external FM input mode.
(3) Optional measures to improve ESD performance within a TV-set application.
Fig.26 Application circuit.
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
14 PACKAGE OUTLINES
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT137-1
075E05
MS-013
2004 Aug 25
51
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
D
E
A
X
c
H
v
M
A
y
E
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
8.4
8.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
0.8
0.4
mm
2
0.65
1.25
0.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT340-1
MO-150
2004 Aug 25
52
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
HVQFN32: plastic thermal enhanced very thin quad flat package; no leads;
32 terminals; body 5 x 5 x 0.85 mm
SOT617-3
B
A
D
terminal 1
index area
A
A
1
E
c
detail X
C
e
1
y
y
v
M
M
C
C
A
B
C
1
e
1/2 e
b
w
9
16
L
17
8
e
e
E
h
2
1/2
e
24
1
terminal 1
index area
32
25
X
D
h
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
1
b
c
E
e
e
1
e
2
y
D
D
E
L
v
w
y
1
h
h
max.
0.05 0.30
0.00 0.18
5.1
4.9
3.75
3.45
5.1
4.9
3.75
3.45
0.5
0.3
mm
0.05 0.1
1
0.2
0.5
3.5
3.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-04-18
02-10-22
SOT617-3
- - -
MO-220
- - -
2004 Aug 25
53
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
15 SOLDERING
To overcome these problems the double-wave soldering
method was specifically developed.
15.1 Introduction to soldering surface mount
packages
If wave soldering is used the following conditions must be
observed for optimal results:
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
15.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 seconds and 200 seconds
depending on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 °C to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
Typical dwell time of the leads in the wave ranges from
3 seconds to 4 seconds at 250 °C or 265 °C, depending
on solder material applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 225 °C (SnPb process) or below 245 °C (Pb-free
process)
– for all BGA, HTSSON-T and SSOP-T packages
15.4 Manual soldering
– for packages with a thickness ≥ 2.5 mm
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
• below 240 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 seconds to 5 seconds
between 270 °C and 320 °C.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
15.3 Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
2004 Aug 25
54
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
15.5 Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
not suitable
REFLOW(2)
BGA, HTSSON..T(3), LBGA, LFBGA, SQFP, SSOP..T(3), TFBGA,
USON, VFBGA
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON,
HTQFP, HTSSOP, HVQFN, HVSON, SMS
PLCC(5), SO, SOJ
not suitable(4)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(5)(6) suitable
SSOP, TSSOP, VSO, VSSOP
CWQCCN..L(8), PMFP(9), WQCCN..L(8)
not recommended(7)
suitable
not suitable
not suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted
on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.
9. Hot bar or manual soldering is suitable for PMFP packages.
2004 Aug 25
55
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
16 DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17 DEFINITIONS
18 DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Aug 25
56
Philips Semiconductors
Product specification
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
19 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2004 Aug 25
57
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R25/03/pp58
Date of release: 2004 Aug 25
Document order number: 9397 750 13539
相关型号：
TDA9897HL/V2/S1
IC SPECIALTY CONSUMER CIRCUIT, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT313-2, MS-026, LQFP-48, Consumer IC:Other
NXP
TDA9897HN/V2
IC SPECIALTY CONSUMER CIRCUIT, PQCC48, 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, SOT619-1, MO-220, HVQFN-48, Consumer IC:Other
NXP
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