TEA1612T/N1,518 [NXP]
Zero voltage switching resonant converter controller;
| 型号： | TEA1612T/N1,518 |
| 厂家： | 
NXP |
| 描述： | Zero voltage switching resonant converter controller |
| 文件： | 总19页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TEA1612T
Zero voltage switching resonant converter controller
Rev. 01 — 24 September 2009
Product data sheet
1. General description
The TEA1612T is a monolithic integrated circuit implemented in a high-voltage double
Diffused Metal Oxide Semiconductor (DMOS) process. The circuit is a high voltage
controller for a zero-voltage switching resonant converter. The IC provides the drive
function for two discrete power MOSFETs in a half-bridge configuration. It also includes a
level-shift circuit, an oscillator with an accurately-programmable frequency range, a
latched shut-down function, burst mode operation and a transconductance error amplifier.
The oscillator signal passes through a divide-by-two flip-flop before being fed to the output
drivers in order to guarantee an accurate 50 % switching duty factor.
The circuit is very flexible and enables a broad range of applications for different mains
voltages.
V
drv(hs)
bridge voltage
supply
V
DD
(high side)
MOSFET
SWITCH
HALF-
BRIDGE
CIRCUIT
RESONANT
CONVERTER
TEA1612T
signal
ground
power ground
014aaa825
Fig 1. Basic configuration
2. Features
I Adjustable burst mode operation at low loads for low standby power
I Integrated high voltage level-shift function
I Integrated high voltage bootstrap diode
I Low start-up current
I Adjustable non-overlap time
I Internal Over Temperature Protection (OTP)
I Over Current Protection (OCP) that activates a shut-down timer
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
I Soft start timing pin
I Brown Out (BO) detection
I Transconductance error amplifier for ultra high-ohmic regulation feedback
I Latched shut-down circuit for Over Voltage Protection (OVP)
I Adjustable minimum and maximum frequencies
I Under Voltage Lock Out (UVLO)
I Fault latch reset input
I Wide (max. 20 V) supply voltage range
I PFC-off output
3. Applications
I TV and monitor power supplies
I High power adapter
I PC power supplies
I High voltage power supplies
I Office equipment
4. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
TEA1612T
SO24
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
2 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
5. Block diagram
V
DD
15
10kΩ
12
VDD(FLOAT)
16
VAUX
11
GH
12.6 V
LEVEL
SHIFTER
HIGH SIDE
DRIVER
10
9
SH
n.c.
14
8
GL
13
LOW SIDE
DRIVER
SGND
SUPPLY
PGND
1
PFC
7
OCP
SD
2
BO
0.3 V
1.25 V
5 V
LOGIC
21
17
23
RESET
HYST
2.33 V
24
3
BURST
P
gm
6
TIMER
CT
2.5 V
1.8 V
: 2
2.7 V
×2
start-up
OSCILLATOR
19
×16
3 V
5
4
600 mV 20
IRS
22
600 mV 18
IFS
VCO
VREF
CF
014aaa847
CSS
Fig 2. Block diagram
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
3 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
6. Pinning information
6.1 Pinning
1
2
24
23
22
21
20
19
18
17
16
15
14
13
PFC
BURST
HYST
VREF
SD
BO
3
P
VCO
4
5
CSS
IRS
6
CT
CF
TEA1612T
7
OCP
IFS
8
PGND
n.c.
RESET
VAUX
9
10
11
12
SH
V
DD
GH
GL
VDD(FLOAT)
SGND
014aaa824
Fig 3. Pin configuration
6.2 Pin description
Table 2.
Symbol
PFC
BO
Pin description, proposal
Pin
1
Description
PFC-control output
brownout input
2
P
3
error amplifier non-inverting input
error amplifier output
VCO
CSS
CT
4
5
soft start capacitor input
timer capacitor input
6
OCP
PGND
n.c.
7
overcurrent protection input
8
power ground
not connected[1]
9
SH
10
11
12
13
14
15
16
17
18
19
20
21
high side switch source connection
high side switch gate connection
floating supply high side driver
signal ground
GH
VDD(FLOAT)
SGND
GL
low side switch gate connection
supply voltage
VDD
VAUX
RESET
IFS
auxiliary supply voltage
latch reset input
oscillator discharge current input
oscillator capacitor
CF
IRS
oscillator charge input current
shut-down input
SD
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
4 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 2.
Pin description, proposal
Symbol
VREF
Pin
22
23
24
Description
reference voltage
HYST
hysteresis reference input for burst mode
burst comparator input
BURST
[1] Provided as a high voltage spacer
7. Functional description
7.1 Start-up
When the applied voltage at pin VDD reaches VDD(init) (see Figure 4), the low side power
switch is turned-on while the high side power switch remains in the non-conducting state.
This start-up output state guarantees the initial charging of the bootstrap capacitor (Cboot
)
used for the floating supply of the high side driver.
During start-up, the voltage on the frequency capacitor (Cf) is zero and defines the
start-up state. The voltage at the soft start pin (CSS) is set to 2.7 V. The CSS pin voltage
is copied to the VCO pin via a buffer and switching starts at about 80 % of the maximum
frequency at the moment VDD reaches the start level.
The start-up state is maintained until VDD reaches the start level (13.5 V), the oscillator is
activated and the converter starts operating.
V
V
V
DD
0
DD(startup)
DD(init)
GH-SH
0
GL
0
t
014aaa036
Fig 4. Start-up
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
5 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
7.2 Oscillator
The internal oscillator is a current-controlled oscillator that generates a sawtooth output.
The frequency of the sawtooth is determined by the external capacitor Cf and the currents
flowing into the IFS and IRS pins.
The minimum frequency and the non-overlap time are set by the capacitor Cf and
resistors Rf(min) and Rno. The maximum frequency is set by resistor R∆f (see Figure 7).
The oscillator frequency is exactly twice the bridge frequency to achieve an accurate 50 %
duty factor. An overview of the oscillator and driver signals is given in Figure 5.
CF
GH-SH
0
GL
0
non-overlap time (high to low)
non-overlap time (low to high)
t
014aaa685
Fig 5. Oscillator and driver signals
7.3 Non-overlap time resistor
The non-overlap time resistor Rno is connected between the 3 V reference pin VREF, and
the IFS current input pin (see Figure 7). The voltage on the IFS pin is kept constant at a
temperature independent value of 0.6 V. The current that flows into the IFS pin is
determined by resistor's Rno 2.4 V voltage drop divided by its value. The IFS input current
equals 1/16 of the discharge current of capacitor Cf and determines the falling slope of the
oscillator.
The falling slope time is used to create a non-overlap time (tno) between two successive
switching actions of the half-bridge switches:
2.4V
Rno
IIFS
=
-----------
C f × ∆VCf
tno
=
--------------------------
16 × IIFS
tIFS = tno
7.4 Minimum frequency resistor
The Rf(min) resistor is connected between the VREF pin (3 V reference voltage) and the
IRS current input pin (held at a temperature independent voltage level of 0.6 V). The
charge current of the capacitor Cf is twice the current flowing into the IRS pin.
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
6 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
The Rf(min) resistor has a voltage drop of 2.4 V and its resistance defines the minimum
charge current (rising slope) of the Cf capacitor if the control current is zero. The minimum
frequency is defined by this minimum charge current (IIRS1) and the discharge current:
2.4V
Rf (min)
IIRS1
=
=
-----------------
C f × ∆VCf
tIRS1
--------------------------
2 × IIRS1
1
f osc(min)
=
------------------------
tno + tIRS1
f osc(min)
f bridge(min)
=
---------------------
2
7.5 Maximum frequency resistor
The output voltage is regulated by changing the frequency of the half-bridge converter.
The maximum frequency is determined by the R∆f resistor which is connected between
the error amplifier output VCO and the oscillator current input pin IRS. The current that
flows through the R∆f resistor (IIRS2) is added to the current flowing through the Rf(min)
resistor. As a result, the charge current ICF increases and the oscillation frequency
increases. As the falling slope of the oscillator is constant, the relationship between the
output frequency and the charge current is not a linear function (see Figure 6 and
Figure 7):
VVCO – 0.6
IIRS2
=
=
--------------------------
R∆f
C f × ∆VCf
--------------------------------------------
2 × (IIRS1 + IIRS2
tIRS2
)
The maximum output voltage of the error amplifier and the value of R∆f determine the
maximum frequency:
VVCO(max) – 0.6
IIRS2(max)
=
---------------------------------------
R∆f
C f × ∆VCf
tIRS(min)
=
---------------------------------------------------------
2 × (IIRS2 + IIRS2(max)
)
1
f osc(max)
=
------------
TOSC
f osc(max)
f bridge(max)
=
---------------------
2
TOSC = tIRS(min) + tIFS
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
7 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
Bridge frequency accuracy is optimum in the low frequency region. At higher frequencies
both the non-overlap time and the oscillator frequency show a decay.
The frequency of the oscillator depends on the value of capacitor Cf, the peak-to-peak
voltage swing VCF, and the charge and discharge currents. However, at higher
frequencies the accuracy decreases due to delays in the circuit.
f
osc
f
osc(max)
f
osc(start)
f
osc(min)
0
I
IRS
014aaa038
Fig 6. Frequency range
7.6 Error amplifier
The error amplifier is a transconductance amplifier. Thus the output current at pin VCO is
determined by the amplifier transconductance, the differential voltage on input pin P, and
the internal reference voltage (2.5 V). The output current IVCO is fed to the IRS input of the
current-controlled oscillator.
The source capability of the error amplifier increases current in the IRS pin when the
differential input voltage is positive. Therefore the minimum current is determined by
resistor Rf(min) and the minimum frequency setting is independent of the characteristics of
the error amplifier.
The error amplifier has a maximum output current of 0.5 mA for an output voltage up to
2.5 V. If the source current decreases, the oscillator frequency also decreases resulting in
a higher regulated output voltage.
During start-up, the output voltage of the amplifier is connected to the soft start (CSS) pin
via a buffer. This will hold the VCO pin at a constant value of VVCO(start)
.
7.7 Soft start
The CSS pin voltage is copied to the VCO pin via a buffer. This buffer only has a source
capability i.e. it can only charge the VCO pin. This means that the error amplifier output
can increase the VCO pin voltage above the CSS voltage level.
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
8 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
At start-up the soft start capacitor is charged to VVCO(start) setting a start-up frequency of
about 80 % of the maximum frequency. After start-up the external soft start capacitor is
discharged by Istart(soft). The VCO pin voltage follows the CSS voltage (discharging takes
place via R∆f) and the frequency sweeps down. The CSS capacitor determines the
frequency sweep rate.
When the circuit comes into regulation, the error amplifier output controls the VCO pin
voltage and the CSS voltage sweeps down further to zero volt.
7.8 VAUX input
The TEA1612T can start up either via a start-up bleeder resistor (connected to the high
voltage and VDD) or via the VAUX input. In the latter case the internal 10 kΩ resistor (from
VAUX to VDD) initiates charging of the VDD capacitor after which the series regulator takes
over. The series regulator is active up to the moment that VDD equals VDD(reg). Further
charging to VDD(startup) is done via the internal 10 kΩ resistor.
In oscillation state the start-up resistor is no longer capable of delivering the VDD supply
current, so an auxiliary supply (for instance, via an auxiliary winding or a dV/dt supply)
needs to take over. The VAUX input facilitates a series regulator which regulates its output
voltage (= VDD) to VDD(reg)
.
7.9 Burst mode
In the application the amount of converted power can be estimated from the actual
operating frequency: the higher the frequency, the lower the output power. This frequency
is proportional to the feedback current to the IRS pin which is measured via a sense
resistor Rfb2 (see Figure 7). The actual feedback current equals 1/Rfb2 × (VBURST − VIRS).
When the voltage at the BURST pin exceeds Vref(BURST), the TEA1612T output drivers
(GL, GH) are made inactive (i.e. low). The output drivers are enabled again when the
voltage at the BURST pin falls below the preset voltage at the HYST pin.
7.10 Shut-down
The shut-down input on pin SD has an accurate threshold level of 2.33 V. When the
voltage on input SD reaches 2.33 V, the TEA1612T enters shut-down mode.
During shut-down mode, VDD is clamped by an internal Zener diode at 12.0 V with 1 mA
input current. This clamp prevents VDD rising above the rating of 14 V due to low supply
current to the TEA1612T in shut-down mode.
When the TEA1612T is in shut-down mode, it can only be activated again by lowering VDD
to below the VDD(rst) level (typically 5.3 V) or by making the reset input active. The
shut-down latch is then reset and a new start-up cycle can commence.
In shut-down mode the GL pin is high and the GH pin is low. In this way the bootstrap
capacitor remains charged so that after a reset a new cycle can start well defined.
7.11 Latch reset input
The internal shut-down latch can be reset via the reset input.This input is active low.
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
9 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
7.12 Overcurrent protection and timer
The OCP input continuously compares the voltage on pin OCP with Vref(OCP). When the
OCP pin voltage is higher than Vref(OCP), the timer capacitor CT will be charged with Ich
during the next full CF cycle or else the timer capacitor will be discharged with Ileak
.
In case the CT voltage exceeds Vtrip(H)(CT) the TEA1612T will switch to shut-down mode.
The timer capacitor will be discharged with Idch until the CT voltage reaches Vtrip(L)(CT)
after which a soft start cycle is started.
7.13 Overtemperature protection
The TEA1612T continuously monitors its temperature. When the temperature exceeds the
Totp(act) level, the TEA1612T will switch to the shut-down mode.
7.14 Brownout protection
The brownout protection compares the actual BO pin with the Vtrip(bo) voltage. If the BO
voltage (see Figure 7) is lower than Vtrip(bo), the TEA1612T switches to start-up mode and
activates an internal current source Ibo(hys) to create a brownout hysteresis. When the BO
pin voltage becomes larger than Vtrip(bo), the TEA1612T will start-up again.
7.15 PFC disable function
The PFC output pin is an open-drain output. Operation of the PFC pin is internally enabled
when the voltage on the BO pin is higher than Vtrip(bo). When the voltage is lower than
Vtrip(bo), the PFC output is always in the open-drain state.
The PFC output is pulled low when:
• The overtemperature protection is active.
• The OCP timer has timed out.
• The TEA1612T has been set to shut-down.
• During the off-time in burst mode.
This PFC output signal can be used to switch off the power corrector in the application
during Burst mode (and during protection) to further reduce standby power losses.
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
10 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
8. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Supply Voltages
Vdrv(hs) high-side driver voltage
VDD
Parameter
Conditions
Min
Max
Unit
0
0
0
600
14
V
V
V
[1]
[1]
supply voltage
Vaux
auxiliary voltage
20
Voltages on pins P, SD, RESET, OCP, BO, PFC, BURST, HYST and CT
VI
input voltage
0
5
V
Currents
IIFS
current on pin IFS
current on pin IRS
current on pin VREF
-
-
-
1 ÷ 16
1
mA
mA
mA
IIRS
IVREF
−2
Power and temperature
Ptot
total power dissipation
Tamb < 70 °C
-
0.8
W
Tamb
ambient temperature
storage temperature
operating
−25
−25
+70
+150
°C
°C
Tstg
Handling
VESD
[2]
[3]
electrostatic discharge voltage
-
-
2000
200
V
V
[1] It is recommended that a 100 nF capacitor be placed as close as possible to the VDD pin (as indicated in
Figure 7, and in the application note).
[2] Human body model class 2: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
[3] Machine model class 2: equivalent to discharging a 200 pF capacitor through a 0.75 µH coil and 10 Ω
resistor.
9. Thermal characteristics
Table 4.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Unit
Rth(j-a)
thermal resistance from junction
to ambient
in free air
100
K/W
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
11 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
10. Characteristics
Table 5.
Characteristics
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 °C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
High voltage pins VDD(FLOAT), GH and SH
Ileak leakage current
Supply pins VDD, VAUX
Parameter
Conditions
Min
Typ
Max
Unit
VDD(float), VGH and VSH = 600 V
low side on; high side off
-
-
30
µA
VDD(init)
initial supply voltage
-
4
5
V
V
V
V
V
V
VDD(startup) start-up supply voltage
12.9
9.0
3.8
-
13.4
9.4
13.9
9.8
4.2
-
VDD(stop)
VDD(hys)
VDD(reg)
VDD
stop supply voltage
hysteresis of supply voltage
regulation supply voltage
supply voltage
4.0
Vaux = 17 V
12.6
12.3
Vaux = 17 V, IVDD = 50 mA,
oscillation state
-
-
clamp voltage in shut-down state;
low side on; high side off;
11.0
4.5
12.0
5.6
13.0
6.3
V
V
IDD = 1 mA
VDD(rst)
IDD
reset supply voltage
supply current:
low side on; high side off;
Cf = 100 pF; IIFS = 0.5 mA;
I
IRS = 50 µA; low side off;
high side off; VDD = 9 V[1]
start-up
210
260
2.0
310
-
µA
mA
µA
operating
-
-
shut-down
220
270
Reference voltage on pin VREF
Vref
Iref
Zo
reference voltage
reference current
output impedance
temperature coefficient
Iref = 0 mA
2.9
3.0
-
3.1
V
source only
−2.0
-
-
-
mA
Ω
Iref = −1 mA
-
-
5.0
−0.3
TC
Iref = 0 mA; Tj = 25 °C to 150 °C
mV/K
Current controlled oscillator pins IRS, IFS, CF
Ich(CF)min minimum charge current on IIRS = 15 µA; VCF = 2 V
28
30
32
µA
µA
pin CF
Ich(CF)max
maximum charge current on IIRS = 200 µA; VCF = 2 V
340
380
420
pin CF
VIRS
voltage on pin IRS
IIRS = 200 µA
590
47
620
50
650
53
mV
Idch(CF)min
minimum discharge current IIFS = 50 µA ÷ 16; VCF = 2 V
µA
on pin CF
Idch(CF)max
maximum discharge current IIFS = 1 mA ÷ 16; VCF = 2 V
0.89
0.94
0.99
mA
on pin CF
VIFS
voltage on pin IFS
IIFS = 1 mA ÷ 16
590
156
620
167
650
178
mV
fbridge(min)
minimum bridge frequency
Cf = 100 pF; IIFS = 0.5 mA ÷ 16;
IIRS = 50 µA; fbridge = f OSC ÷ 2
kHz
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
12 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 5.
Characteristics …continued
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 °C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
[2]
fbridge(max)
maximum bridge frequency Cf = 100 pF; IIFS = 1 mA ÷ 16;
IIRS = 200 µA; fbridge = f OSC ÷ 2
395
440
485
kHz
Vtrip(L)
Vtrip(H)
VCF(p-p)
LOW-level trip voltage
HIGH-level trip voltage
pin CF; DC level
pin CF; DC level
-
1.27
2.97
1.7
-
V
V
V
-
-
peak-to-peak voltage on pin DC level
CF
1.6
1.8
tno
non-overlap time
Cf = 100 pF; IIFS = 0.5 mA ÷ 16;
IRS = 50 µA
0.58
14.4
0.63
16
0.68
17.6
µs
I
Idch(osc)/IIFS oscillator discharge current
to current on pin IFS ratio
IIFS = 0.5 mA ÷ 16;
-
Output drivers
Isource(GH)
source current on pin GH
high side; VDD(float) = 11.2 V;
-
-
300
480
-
-
mA
mA
V
SH = 0 V; VGH = 0 V
high side; VDD(float) = 11.2 V;
SH = 0 V; VGH = 11.2 V
Isink(GH)
sink current on pin GH
V
Isource(GL)
Isink(GL)
VOH
source current on pin GL
sink current on pin GL
HIGH-level output voltage
low side; VGL = 0 V
low side; VGL = 13 V
pin GH; high side;
-
-
-
300
580
10.9
-
-
-
mA
mA
V
VDD(float) = 11.2 V; VSH = 0 V;
IGH = 10 mA
pin GL; low side; IGL = 10 mA
pin GH; high side;
-
-
12.6
0.17
-
-
V
V
VOL
LOW-level output voltage
VDD(float) = 11.2 V; VSH = 0 V;
IGH = 10 mA
pin GL; low side; IGL = 10 mA
IO = 5 mA
-
0.18
1.6
-
V
V
VFd(bs)
bootstrap diode forward
voltage
1.3
1.9
Shut-down input pin SD
II
input current
VSD = 2.33 V
-
-
0.5
µA
Vth(SD)
threshold voltage on pin SD
2.26
2.33
2.40
V
Error amplifier pins P, VCO
II(cm)
common-mode input current VI(cm) = 1 V
-
−0.1
-
−0.5
2.5
+2
-
µA
VI(cm)
common-mode input voltage
offset input voltage
-
V
VI(offset)
gm
VI(cm) = 1 V; IVCO = −10 mA
VI(cm) = 1 V; source only
RL = 10 kΩ to GND; VI(cm) = 1 V
RL = 10 kΩ to GND; VI(cm) = 1 V
operating; RL = 10 kΩ to GND
operating; VVCO = 1 V
−2
-
0
mV
µA/mV
dB
transconductance
330
70
5
Gol
open-loop gain
-
-
GB
gain bandwidth product
maximum VCO voltage
maximum VCO current
start VCO voltage
-
-
MHz
V
VVCO(max)
IVCO(max)
VVCO(start)
3.2
−0.4
2.5
3.6
−0.5
2.7
4.0
−0.6
2.9
mA
V
IVCO = 0.3 mA
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
13 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 5.
Characteristics …continued
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 °C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
Reset pin
Vrst
Parameter
Conditions
Min
Typ
Max
Unit
reset voltage
2.15
2.4
0.65
-
2.65
V
Vrst(hys)
II(rst)
hysteresis of reset voltage
reset input current
-
-
-
V
1
µA
CSS pin
Istart(soft)
CT pin
Ich
soft start current
12
15
18
µA
charge current
discharge current
leakage current
21
8
27
33
12
1
µA
µA
µA
µA
Idch
10
Ileak
0.1
2.4
0.3
2.7
Ich/Idch
charge current to discharge
current ratio
3.0
Vtrip(H)(CT)
Vtrip(L)(CT)
HIGH-level trip voltage on
pin CT
2.7
0.6
3
3.3
0.8
V
V
LOW-level trip voltage on pin
CT
0.7
OCP pin
Vref(OCP)
reference voltage on pin
OCP
280
120
305
135
330
150
mV
OTP
Totp(act)
activation overtemperature
protection temperature
°C
BO pin
Vtrip(bo)
Ibo(hys)
brownout trip voltage
1.19
14
1.25
16
1.31
18
V
hysteresis of brownout
current
µA
BURST pin
Vref(BURST) reference voltage on pin
BURST
1.75
1.8
1.85
V
PFC pin
Ileak
leakage current
VPFC = 1 V
IPFC = 1 mA
-
-
-
-
1
µA
Vsat
saturation voltage
0.2
V
HYST pin
Ileak
leakage current
VHYST = 5 V
-
-
1
µA
[1] The supply current IDD increases with the increasing bridge frequency to drive the capacitive load of two MOSFETs. Typical MOSFETs
for the TEA1612T application are 8N50 (NXP type PHX80N50E, QG(tot) = 55 nC (typ) and these will increase the supply current at
150 kHz according to the following formula:∆IDD = 2 × QG(tot) × f bridge = 2 × 55nC × 150kHz = 16.5mA
[2] The frequency of the oscillator depends on the value of capacitor Cf, the peak-to-peak voltage swing VCF and the charge/discharge
currents Ich(CF) and Idch(CF)
.
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
14 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
11. Application information
V
I
C
VDD
V
DD
15
12 VDD(FLOAT)
12.6 V
C
VDD
VAUX 16
SGND 13
18 V
TEA1612
11 GH
10 SH
LEVEL
SHIFTER
HIGH SIDE
DRIVER
SUPPLY
on/off
V
O
9
n.c.
14 GL
PFC
BO
1
2
PFC
controller
LOW SIDE
DRIVER
8
7
PGND
OCP
1.25 V
5 V
RESET 17
Reset
VREF
0.3 V
LOGIC
21 SD
OVP
HYST 23
2.33 V
BURST 24
6
CT
gm
P
3
TIMER
: 2
C
T
2.7 V
1.8 V
2.5 V
×2
OSCILLATOR
×16
start-up
3 V
600 mV
20
600 mV
18
5
CSS
4
22
19
VCO
R
IRS
VREF IFS
CF
R
f(min)
R
no
∆f
C
SS
C
f
R
fb2
A
B
R
fb1
014aaa848
Fig 7. Application diagram
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
15 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
12. Package outline
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25
0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT137-1
075E05
MS-013
Fig 8. Package outline SOT137-1 (SO24)
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
16 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
13. Revision history
Table 6.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TEA1612T_1
20090924
Product data sheet
-
-
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
17 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
14.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TEA1612T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 24 September 2009
18 of 19
TEA1612T
NXP Semiconductors
Zero voltage switching resonant converter controller
16. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
Functional description . . . . . . . . . . . . . . . . . . . 5
Start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Non-overlap time resistor . . . . . . . . . . . . . . . . . 6
Minimum frequency resistor . . . . . . . . . . . . . . . 6
Maximum frequency resistor. . . . . . . . . . . . . . . 7
Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VAUX input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Shut-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Latch reset input . . . . . . . . . . . . . . . . . . . . . . . . 9
Overcurrent protection and timer . . . . . . . . . . 10
Overtemperature protection . . . . . . . . . . . . . . 10
Brownout protection . . . . . . . . . . . . . . . . . . . . 10
PFC disable function. . . . . . . . . . . . . . . . . . . . 10
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal characteristics. . . . . . . . . . . . . . . . . . 11
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 12
Application information. . . . . . . . . . . . . . . . . . 15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
9
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 September 2009
Document identifier: TEA1612T_1
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