TEF6621_V01 [NXP]

Tuner on main-board IC;
TEF6621_V01
型号: TEF6621_V01
厂家: NXP    NXP
描述:

Tuner on main-board IC

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TEF6621  
Tuner on main-board IC  
Rev. 01.04 — 7 August 2008  
Objective data sheet  
1. General description  
The TEF6621 is an AM/FM radio including Phase-Locked Loop (PLL) tuning system. The  
system is designed in such a way, that it can be used as a world-wide tuner covering  
common FM and AM bands for radio reception. All functions are controlled by the I2C-bus.  
Besides the basic feature set it provides a good weak signal processing function.  
2. Features  
I FM tuner for Japan, Europe and US reception  
I AM tuner for Long Wave (LW) and Medium Wave (MW) reception  
I Integrated AM Radio Frequency (RF) selectivity  
I Integrated PLL tuning system; controlled via I2C-bus  
I Fully integrated Local Oscillator (LO)  
I No alignment needed  
I Very easy application on the main board  
I No critical RF components  
I Fully integrated Intermediate Frequency (IF) filters and FM stereo decoder  
I Fully integrated FM noise blanker  
I Field strength (LEVEL), multipath [Wideband AM (WAM)] and noise [UltraSonic Noise  
(USN)] dependent stereo blend  
I Field strength (LEVEL), multipath (WAM) and noise (USN) dependent High-Cut  
Control (HCC)  
I Field strength (LEVEL), multipath (WAM) and noise (USN) dependent soft mute  
I Single power supply  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
3. Quick reference data  
Table 1.  
Symbol  
VCC  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
supply voltage  
supply current  
on pins VCC1 and VCC2  
8
8.5  
9
V
ICC  
into pins VCC1, VCC2 and  
VREGSUP  
FM  
AM  
90  
120  
134  
140  
150  
mA  
mA  
100  
FM path  
fRF  
RF frequency  
FM tuning range  
76  
-
-
108  
-
MHz  
Vi(sens)  
input sensitivity voltage  
(S+N)/N = 26 dB; including  
weak signal handling  
5
dBµV  
(S+N)/N  
THD  
signal plus noise-to-noise ratio  
total harmonic distortion  
Vi(RF) = 1 mV; f = 22.5 kHz  
55  
-
60  
-
dB  
%
mono; f = 75 kHz;  
0.4  
0.8  
Vi(RF) = 1 mV  
αimage  
αcs  
image rejection  
fRF(image) = fRF(wanted) ± 2 × fIF  
45  
26  
60  
40  
-
-
dB  
dB  
channel separation  
Vi(RF) = 1 mV; data byte Fh  
bits CHSEP[2:0] = 100  
AM path  
fRF  
RF frequency  
AM (LW) tuning range  
AM (MW) tuning range  
144  
522  
-
-
288  
kHz  
kHz  
1710  
Vi(sens)  
input sensitivity voltage  
S/N = 26 dB; data byte 3h  
bits DEMP[1:0] = 10  
MW  
-
34  
40  
56  
0.7  
55  
-
dBµV  
dBµV  
dB  
LW  
-
-
(S+N)/N  
THD  
signal plus noise-to-noise ratio  
total harmonic distortion  
image rejection  
Vi(RF) = 10 mV  
Vi(RF) = 1 mV; m = 80 %  
fRF(image) = fRF(wanted) ± 2 × fIF  
50  
-
-
1
-
%
αimage  
40  
dB  
4. Ordering information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
TEF6621T  
SO32  
plastic small outline package; 32 leads; body width 7.5 mm  
SOT287-1  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
2 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
5. Block diagram  
32  
AMSELOUT2  
1
2
AMRFIN  
31  
AMSELOUT1  
AMRFDEC  
30  
AM TUNER  
AMIFAGC1  
3
4
29  
FMIN2  
FMIN1  
AMSELIN2  
FM TUNER  
28  
AMSELIN1  
27  
TEST  
5
6
7
GNDRF  
TEF6621T  
26  
PLLREF  
V
CC2  
25  
24  
PLL TUNING  
SYSTEM  
PLL  
AMRFAGC  
VCODEC  
8
23  
22  
21  
20  
LOUT  
ROUT  
GND  
STEREO DECODER  
HIGH CUT  
SOFT MUTE  
FM NOISE BLANKER  
9
OUTPUT  
V
CC1  
POWER  
SUPPLY  
10  
11  
GNDAUD  
AMIFAGC2  
VREGSUP  
VREF  
12  
13  
14  
19  
18  
17  
MPXIN  
MPXOUT  
RSSI  
SDA  
SIGNAL  
IMPROVEMENT  
CONTROL  
2
I C-BUS  
SCL  
GNDD  
15  
16  
XTAL2  
XTAL1  
008aaa134  
Fig 1. Block diagram of TEF6621T  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
3 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
6. Pinning information  
6.1 Pinning  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
AMRFIN  
AMRFDEC  
FMIN2  
AMSELOUT2  
AMSELOUT1  
AMIFAGC1  
AMSELIN2  
AMSELIN1  
TEST  
3
4
FMIN1  
5
GNDRF  
6
V
CC2  
7
AMRFAGC  
LOUT  
PLLREF  
PLL  
8
TEF6621T  
9
ROUT  
VCODEC  
GND  
10  
11  
12  
13  
14  
15  
16  
GNDAUD  
AMIFAGC2  
MPXIN  
V
CC1  
VREGSUP  
VREF  
SDA  
MPXOUT  
RSSI  
XTAL2  
SCL  
XTAL1  
GNDD  
008aaa135  
Fig 2. Pin configuration  
6.2 Pin description  
Table 3.  
Symbol  
AMRFIN  
AMRFDEC  
FMIN2  
Pin description  
Pin  
1
Description  
AM RF single-ended input  
AM RF decoupling  
FM RF differential input 2  
FM RF differential input 1  
RF ground  
2
3
FMIN1  
4
GNDRF  
VCC2  
5
6
supply voltage 2  
AMRFAGC  
LOUT  
7
AM RF Automatic Gain Control (AGC)  
audio left output  
8
ROUT  
9
audio right output  
GNDAUD  
AMIFAGC2  
MPXIN  
MPXOUT  
RSSI  
10  
11  
12  
13  
14  
15  
16  
17  
18  
audio ground  
AM IF AGC 2  
FM Multiplex (MPX) and AM audio input to stereo decoder  
FM MPX and AM audio output from tuner part  
Received Signal Strength Indication (RSSI)  
4 MHz crystal oscillator pin 2  
4 MHz crystal oscillator pin 1  
digital ground  
XTAL2  
XTAL1  
GNDD  
SCL  
I2C-bus clock input  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
4 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 3.  
Pin description …continued  
Description  
Symbol  
SDA  
Pin  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
I2C-bus data input and output  
VREF  
reference voltage decoupling  
VREGSUP  
VCC1  
supply voltage internal voltage regulators  
supply voltage 1  
GND  
ground  
VCODEC  
PLL  
decoupling for Voltage-Controlled Oscillator (VCO) supply voltage  
PLL tuning voltage  
PLLREF  
TEST  
PLL reference voltage  
test pin; leave open in normal operation  
AM selectivity input 1  
AMSELIN1  
AMSELIN2  
AMIFAGC1  
AMSELOUT1  
AMSELOUT2  
AM selectivity input 2  
AM IF AGC 1  
AM selectivity output 1  
AM selectivity output 2  
7. Functional description  
7.1 FM tuner  
The RF input signal is mixed to a low IF with inherent image suppression. The IF signal is  
filtered and demodulated. The complete signal path is fully integrated.  
7.2 AM tuner  
The RF signal is filtered and mixed to a low IF with inherent image suppression. The IF  
signals are filtered and demodulated. The signal path is highly integrated.  
7.3 PLL tuning system  
The PLL tuning system includes a fully integrated VCO. To avoid problems with unwanted  
signals on image side, the receiver controls automatically high-side or low-side injection.  
7.4 FM stereo decoder  
The MPX signal from the FM tuner is translated by the stereo decoder into a left and right  
audio channel. Good channel separation is achieved without alignment.  
7.5 Weak signal processing and noise blanker  
The reception quality of the station received is measured by a combination of detectors:  
field strength (LEVEL), multipath (WAM) and noise (USN). The audio processing functions  
soft mute, HCC and stereo blend are controlled accordingly to maintain the best possible  
audio quality in case of poor signal conditions. Audio disturbances like e.g. ignition noise  
are suppressed by the noise blanker circuit, using USN detection on MPX and spike  
detection on the level signal.  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
5 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
9. Limiting values  
Table 57. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VCC  
Parameter  
Conditions  
Min  
0.3  
0.3  
Max  
+10  
Unit  
V
supply voltage  
on pins VCC1 and VCC2  
VCCn  
voltage difference between any between pins VCC1 and VCC2  
supply pins  
+0.3  
V
VSCL  
voltage on pin SCL  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
0.3  
40  
+6  
V
VSDA  
voltage on pin SDA  
+6  
V
VAMRFDEC  
VAMRFIN  
VAMRFAGC  
VAMIFAGC2  
VRSSI  
voltage on pin AMRFDEC  
voltage on pin AMRFIN  
voltage on pin AMRFAGC  
voltage on pin AMIFAGC2  
RSSI voltage  
+6  
V
+6  
V
+6  
V
+6  
V
+6  
V
VVCODEC  
VPLL  
voltage on pin VCODEC  
voltage on pin PLL  
+6  
V
+6  
V
VPLLREF  
VTEST  
VAMIFAGC1  
VVREF  
Vn  
voltage on pin PLLREF  
voltage on pin TEST  
+6  
V
+6  
V
voltage on pin AMIFAGC1  
voltage on pin VREF  
+6  
V
+6  
V
voltage on any other pin  
storage temperature  
+VCC  
+150  
+85  
150  
+2000  
+200  
V
Tstg  
°C  
°C  
°C  
V
Tamb  
ambient temperature  
20  
Tj  
junction temperature  
-
[1]  
[2]  
Vesd  
electrostatic discharge voltage human body model  
machine model  
2000  
200  
V
[1] Class 2 according to JESD22-A114.  
[2] Class B according to EIA/JESD22-A115.  
10. Thermal characteristics  
Table 58. Thermal characteristics  
Symbol  
Parameter  
Conditions  
Typ  
Unit  
[1]  
Rth(j-a)  
thermal resistance from  
junction to ambient  
in free air; single layer board with a  
copper thickness of 35 µm;  
see Figure 28  
48  
K/W  
Ψj-top  
thermal characterization  
parameter from junction to top  
of package  
4.5  
K/W  
[1] The thermal resistance depends strongly on the PCB design. An application different to Figure 28 must ensure that the thermal  
resistance is below 54 K/W to avoid violation of the maximum junction temperature; see Table 57.  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
39 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
11. Static characteristics  
Table 59. Static characteristics  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
Symbol  
VCC  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
supply voltage  
supply current  
on pins VCC1 and VCC2  
8
8.5  
9
V
ICC  
into pins VCC1, VCC2 and  
VREGSUP  
FM  
90  
120  
134  
-
140  
150  
-
mA  
mA  
V
AM  
100  
6.35  
VVREGSUP  
voltage on pin  
VREGSUP  
Tamb = 20 °C to +85 °C  
Power-on reset  
VP(POR)  
Vhys(POR)  
tstart  
power-on reset supply reset at power-on  
voltage  
6.5  
6.75  
0.2  
10  
7.0  
-
V
power-on reset  
hysteresis voltage  
-
-
V
start time  
series resistance of crystal  
100  
ms  
Rs = 150 Ω  
Logic pins SDA and SCL (voltage referenced to pin GNDD)  
[1]  
[1]  
VIH  
HIGH-level input  
voltage  
1.58  
-
-
5.5  
V
V
VIL  
LOW-level input  
voltage  
0.5  
+1.04  
[1] SDA and SCL HIGH and LOW internal thresholds are specified according to an I2C-bus voltage of 2.5 V ± 10 % or 3.3 V ± 5 %. The  
I2C-bus interface tolerates also SDA and SCL signals from a 5 V I2C-bus, but does not fulfill the 5 V I2C-bus specification completely.  
The TEF6621 complies with the fast-mode I2C-bus protocol. The maximum I2C-bus communication speed is 400 kbit/s.  
12. Dynamic characteristics  
Table 60. Dynamic characteristics  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Crystal oscillator; pins XTAL1 and XTAL2  
fxtal  
crystal frequency  
fundamental frequency  
-
4
-
-
MHz  
106  
fxtal/fxtal  
relative crystal frequency device inaccuracy  
variation  
45  
+45  
Ci  
Ri  
input capacitance  
input capacitance from pin XTAL1 and  
pin XTAL2 to ground  
1
-
3
-
4
pF  
input resistance  
750  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
40 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 60. Dynamic characteristics …continued  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Tuning system  
C/NLO  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
LO carrier-to-noise ratio  
tuning time  
fLO = 100 MHz; f = 10 kHz  
-
-
98  
-
-
dBc/Hz  
ttune  
FM (Europe/USA/Japan)  
1.8  
ms  
fRF = 87.5 MHz to 108 MHz  
AM (MW) fRF = 0.53 MHz to 1.7 MHz  
AM (LW) fRF = 0.144 MHz to 0.288 MHz  
FM tuning range  
-
9
-
ms  
-
3.5  
-
-
ms  
fRF  
RF frequency  
76  
144  
522  
-
108  
288  
MHz  
kHz  
AM (LW) tuning range  
-
AM (MW) tuning range  
-
1710 kHz  
ftune(step)  
step of tuning frequency  
input sensitivity voltage  
FM (Europe/USA/Japan)  
AM (LW and MW)  
50  
1
-
-
kHz  
kHz  
-
FM path  
Vi(sens)  
(S+N)/N = 26 dB; without weak signal  
handling  
-
-
-
5.5  
5
-
-
-
dBµV  
dBµV  
dBµV  
(S+N)/N = 26 dB; including weak signal  
handling  
(S+N)/N = 46 dB; including weak signal  
handling  
16  
NF  
noise figure  
-
6
9
-
dB  
dB  
(S+N)/N  
signal plus noise-to-noise Vi(RF) = 1 mV; f = 22.5 kHz  
55  
60  
ratio  
αripple  
ripple rejection  
Vripple / Vaudio; Vripple = 100 mV;  
ripple = 100 Hz  
34  
44  
-
dB  
f
fIF  
IF frequency  
-
150  
60  
-
-
-
kHz  
dB  
αimage  
IP3  
image rejection  
fRF(image) = fRF(wanted) ± 2 × fIF  
45  
106  
third-order intercept point fRF(unw)1 = 97.5 MHz;  
113  
dBµV  
fRF(unw)2 = 97.9 MHz; Vi(RF) = 80 dBµV  
Sdyn  
dynamic selectivity  
static selectivity  
Vi(RF) = 10 µV; fRF(unw) = 22.5 kHz;  
(S+N)/N = 26 dB; mono; fAF = 1 kHz  
fRF = 100 kHz  
fRF = 200 kHz  
-
-
3
-
-
dB  
dB  
55  
Sstat  
maximum IF bandwidth  
f
f
f
i(RF) ± 100 kHz  
10  
54  
65  
14  
64  
75  
25  
74  
90  
dB  
dB  
dB  
i(RF) ± 200 kHz  
i(RF) ± 300 kHz (excluding image)  
αsup(AM)  
AM suppression  
AM: fAF = 1 kHz; m = 30 %  
Vi(RF) = 0.05 mV to 20 mV  
Vi(RF) = 20 mV to 500 mV  
45  
40  
55  
50  
-
-
dB  
dB  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
41 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 60. Dynamic characteristics …continued  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
FM front-end; pins FMIN1 and FMIN2  
Ri(dif)  
Ci(dif)  
differential input  
resistance  
fRF = 97.1 MHz; maximum gain  
fRF = 97.1 MHz  
200  
-
300  
4
400  
7
differential input  
capacitance  
pF  
FM RF AGC  
Vstart(AGC)  
AGC start voltage  
RF input voltage for first AGC step;  
Vi(RF) value, at which the RF gain  
decreases by 6 dB with increasing  
Vi(RF); data byte 2h  
bits RFAGC[1:0] = 00  
bits RFAGC[1:0] = 01  
bits RFAGC[1:0] = 10  
bits RFAGC[1:0] = 11  
83  
81  
79  
77  
1
86  
84  
82  
80  
-
89  
87  
85  
83  
5
dBµV  
dBµV  
dBµV  
dBµV  
dB  
Vi(RF)AGC(hys) hysteresis of AGC RF  
input voltage  
hysteresis of AGC start  
FM IF AGC  
Vi(RF)AGC  
AGC RF input voltage  
Vi(RF) value, at which the IF gain  
decreases by 6 dB with increasing  
71  
1
76  
-
81  
6
dBµV  
Vi(RF); start of AGC; first step  
Vi(RF)AGC(hys) hysteresis of AGC RF  
input voltage  
hysteresis of AGC start  
dB  
FM RSSI; pin RSSI  
VRSSI  
RSSI voltage  
Vi(RF) = 20 dBµV  
Vi(RF) = 20 dBµV  
Vi(RF) = 40 dBµV  
0.6  
1.6  
2.5  
45  
0.8  
1.9  
2.9  
50  
1.0  
2.2  
3.3  
55  
V
V
V
VRSSI/Li(RF) RSSI voltage difference to between Vi(RF) = 20 dBµV and  
mV/dB  
RF input level difference  
ratio  
Vi(RF) = 40 dBµV  
FM IF counter  
fIFc(res)  
IF counter frequency  
resolution  
-
5
-
kHz  
FM demodulator; pin MPXOUT  
Ro  
output resistance  
load resistance  
load capacitance  
-
-
100  
RL  
5
-
-
kΩ  
pF  
kHz  
CL  
-
-
20  
-
fmax  
maximum frequency  
deviation  
THD = 3 %; Vi(RF) = 10 mV  
115  
140  
Vo  
output voltage  
f = 22.5 kHz; fAF = 1 kHz  
180  
230  
300  
mV  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
42 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 60. Dynamic characteristics …continued  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Audio part; pin MPXIN  
Ri  
input resistance  
data byte 3h bit LOCUT = 0 (FM or AM)  
data byte 3h bit LOCUT = 1 (AM)  
balance between R and L channel  
-
220  
16  
-
-
kΩ  
kΩ  
dB  
dB  
-
-
αbal(ch)  
channel balance  
pilot suppression  
1  
30  
+1  
-
αsup(pilot)  
9 % pilot; fpilot = 19 kHz; referenced to  
91 % FM modulation  
40  
mpilot  
modulation degree of pilot threshold for pilot detection  
tone  
stereo on  
2
3.9  
3.1  
0.8  
30  
5.8  
5
%
stereo off  
pilot hysteresis  
1.2  
0.7  
-
%
αhys(pilot)  
1.6  
100  
%
tdet(pilot)  
pilot detection time  
ms  
Audio output; pins LOUT and ROUT  
Vo  
output voltage  
f = 22.5 kHz; fAF = 1 kHz  
data byte 3h bit OUTA = 1  
data byte 3h bit OUTA = 0  
200  
80  
290  
120  
410  
175  
mV  
mV  
αAF  
AF attenuation  
mono; pre-emphasis = 50 µs;  
referenced to fAF = 1 kHz  
fAF = 50 Hz  
0.6 0.1 +0.4  
dB  
dB  
dB  
fAF = 15 kHz  
1.5  
0
+1.5  
-
αcs  
channel separation  
Vi(RF) = 1 mV; data byte Fh  
bits CHSEP[2:0] = 100  
26  
40  
THD  
total harmonic distortion  
mono; f = 75 kHz; Vi(RF) = 1 mV  
stereo; f = 67.5 kHz; L or R  
-
0.4  
0.8  
1
%
-
-
-
-
%
RL  
CL  
load resistance  
10  
-
-
kΩ  
pF  
load capacitance  
20  
FM noise blanker  
(S+N)/N  
signal plus noise-to-noise noise pulses at RF input signal tp = 5 ns;  
-
30  
-
dB  
ratio  
tr < 1 ns; tf < 1 ns; fp = 100 Hz;  
Vp = 500 mV; Vi(RF) = 40 dBµV;  
quasi peak; audio filter according  
“ITU-R BS.468-4”  
AM path  
Vi(sens)  
input sensitivity voltage  
S/N = 26 dB; data byte 3h  
bits DEMP[1:0] = 10  
MW  
-
-
-
34  
40  
1
-
-
-
dBµV  
LW  
dBµV  
Vn(i)(eq)  
equivalent input noise  
voltage  
Csource = 100 pF  
nV/Hz  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
43 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 60. Dynamic characteristics …continued  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
(S+N)/N  
signal plus noise-to-noise Vi(RF) = 10 mV  
ratio  
50  
56  
-
dB  
fIF  
IF frequency  
-
25  
-
kHz  
dB  
αimage  
Bfltr(IF)  
Sstat  
image rejection  
IF filter bandwidth  
static selectivity  
fRF(image) = fRF(wanted) ± 2 × fIF  
3 dB bandwidth  
40  
5
55  
-
6.5  
48  
8
-
kHz  
dB  
f
tune ± 10 kHz  
tune ± 20 kHz  
40  
65  
120  
f
78  
-
dB  
Vi(RF)(max)  
IP2  
maximum RF input  
voltage  
THD = 10 %; m = 80 %; active antenna  
50 Ω  
135  
-
dBµV  
second-order intercept  
point  
150  
116  
170  
127  
-
-
dBµV  
dBµV  
IP3  
third-order intercept point f = 40 kHz  
AM LNA and AM RF AGC; input pins AMRFIN and AMRFDEC  
Ri  
Ci  
input resistance  
fRF = 990 kHz  
-
-
20  
-
-
[1][2]  
input capacitance  
AGC maximum gain  
530  
pF  
MW band with passive antenna (measured with dummy aerial 15 pF/60 pF)  
Vi(RF)AGC  
AGC RF input voltage  
switched LNA AGC: Vi(RF) value, at  
which the LNA gain decreases with  
increasing Vi(RF); m = 0 %; start of AGC;  
first step  
110  
113  
116  
dBµV  
Vi(RF)AGC(hys) hysteresis of AGC RF  
input voltage  
hysteresis of AGC start  
1
4
7
dB  
MW band with active antenna (measured with dummy aerial 50 )  
Vi(RF)AGC  
AGC RF input voltage  
switched LNA AGC: Vi(RF) value, at  
which the LNA gain decreases with  
increasing Vi(RF); m = 0 %; start of AGC;  
first step  
78  
81  
84  
dBµV  
Vi(RF)AGC(hys) hysteresis of AGC RF  
input voltage  
hysteresis of AGC start  
1
-
3
6
-
dB  
LW band with passive antenna (measured with dummy aerial 15 pF/60 pF)  
Vi(RF)AGC  
AGC RF input voltage  
switched LNA AGC: Vi(RF) value, at  
which the LNA gain decreases with  
increasing Vi(RF); fRF = 207 kHz;  
m = 0 %; start of AGC; first step  
104  
dBµV  
Vi(RF)AGC(hys) hysteresis of AGC RF  
input voltage  
hysteresis of AGC start  
1
4
7
dB  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
44 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 60. Dynamic characteristics …continued  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
LW band with active antenna (measured with dummy aerial 50 )  
Vi(RF)AGC  
AGC RF input voltage  
switched LNA AGC: Vi(RF) value, at  
which the LNA gain decreases with  
increasing Vi(RF); fRF = 207 kHz;  
m = 0 %; start of AGC; first step  
-
80  
-
dBµV  
Vi(RF)AGC(hys) hysteresis of AGC RF  
input voltage  
hysteresis of AGC start  
1
4
7
dB  
Continuous AM RF AGC  
Vi(RF)AGC  
AGC RF input voltage  
linear RF AGC: Vi(RF) at which AGC  
starts; m = 0 %  
data byte 2h bits RFAGC[1:0] = 00  
data byte 2h bits RFAGC[1:0] = 01  
data byte 2h bits RFAGC[1:0] = 10  
data byte 2h bits RFAGC[1:0] = 11  
Vi(RF) = 10 mV to 600 mV  
87  
85  
83  
81  
-
90  
88  
86  
84  
64  
3.2  
35  
93  
91  
89  
87  
-
dBµV  
dBµV  
dBµV  
dBµV  
ms  
ts  
settling time  
Vi(RF) = 600 mV to 10 mV  
-
-
s
Isource(AGC)  
AGC source current  
AGC attack; Vi(RF)M = 105 dBµV (peak);  
25  
50  
µA  
normal mode  
AGC attack; fast mode after tuning and  
AGC switching  
0.7  
0.7  
1
1
1.4  
mA  
Isink(AGC)  
AGC sink current  
AGC release; normal mode  
1.4  
35  
µA  
µA  
AGC release; fast mode after tuning and  
AGC switching  
17.5 25  
Continuous IF AGC 1  
Vi(RF)AGC  
AGC RF input voltage  
linear IF AGC 1: Vi(RF) at which AGC  
starts; m = 0 %  
59  
35  
62  
50  
65  
70  
dBµV  
µA  
Isource(AGC)  
AGC source current  
AGC sink current  
AGC attack; Vi(RF)M = 80 dBµV (peak);  
normal mode  
AGC attack; fast mode after tuning and  
AGC switching  
0.875 1.25 1.75  
mA  
Isink(AGC)  
AGC release; normal mode  
0.7  
1
1.4  
35  
µA  
µA  
AGC release; fast mode after tuning and  
AGC switching  
17.5 25  
Continuous IF AGC 2  
Vi(RF)AGC  
AGC RF input voltage  
linear IF AGC 2: Vi(RF) at which AGC  
starts; m = 0 %  
19  
4
22  
6
25  
8
dBµV  
µA  
Isource(AGC)  
AGC source current  
AGC attack; Vi(RF)M = 50 dBµV (peak);  
normal mode  
AGC attack; fast mode after tuning and  
AGC switching  
100  
150  
200  
µA  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
45 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 60. Dynamic characteristics …continued  
VCC = 8.5 V; Tamb = 25 °C; unless otherwise specified.  
FM condition: all RF voltages refer to an unterminated RMS voltage with a source impedance 75 ; fmod = 1 kHz,  
f = 22.5 kHz, de-emphasis = 50 µs, fRF = 97.1 MHz; unless otherwise specified.  
AM condition: all RF voltages are RMS values measured at the input of a 15 pF/60 pF dummy aerial; fmod = 400 Hz,  
m = 30 %, fRF = 990 kHz; unless otherwise specified.  
All values measured in a test circuit according to Figure 29; default settings; audio signals measured at LOUT and ROUT with  
IEC tuner filter (200 Hz to 15 kHz; IEC 60315-4); unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
1.4  
35  
Unit  
µA  
Isink(AGC)  
AGC sink current  
AGC release; normal mode  
0.7  
1
AGC release; fast mode after tuning and  
AGC switching  
17.5 25  
µA  
AM demodulator; pin MPXOUT  
Vo output voltage  
Audio output; pins LOUT and ROUT  
m = 30 %  
175  
210  
250  
mV  
Vo  
output voltage  
m = 30 %; fAF = 400 Hz; data byte 3h  
bits DEMP[1:0] = 10  
data byte 3h bit OUTA = 1  
data byte 3h bit OUTA = 0  
200  
85  
270  
115  
355  
150  
mV  
mV  
αAF  
AF attenuation  
referenced to fAF = 400 Hz;  
210 mV input at pin MPXIN  
fAF = 100 Hz; data byte 3h  
bit LOCUT = 1  
4.5 3  
4.5 3  
1.5  
2  
dB  
dB  
dB  
fAF = 1.5 kHz; data byte 3h  
bits DEMP[1:0] = 10  
fAF = 5 kHz; data byte 3h  
bits DEMP[1:0] = 10  
24  
21  
18  
THD  
total harmonic distortion  
ripple rejection  
Vi(RF) = 1 mV; m = 80 %  
-
0.7  
37  
1
-
%
αripple  
Vripple / Vaudio; Vripple = 100 mV;  
30  
dB  
fripple = 100 Hz  
AM RSSI; pin RSSI  
VRSSI RSSI voltage  
Vi(RF) = 20 dBµV at dummy aerial input  
Vi(RF) = 14 dBµV at dummy aerial input  
Vi(RF) = 34 dBµV at dummy aerial input  
0.9  
1.6  
2.6  
45  
1.1  
1.9  
2.9  
50  
1.25  
2.2  
3.2  
55  
V
V
V
VRSSI/Li(RF) RSSI voltage difference to 5 µV < Vi(RF) < 50 µV  
mV/dB  
RF input level difference  
ratio  
AM IF counter  
fIFc(res)  
IF counter frequency  
resolution  
-
500  
-
Hz  
[1] The switched input capacitance is part of the switched RF AGC function.  
[2] The input impedance of the AM LNA depends on the AGC state.  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
46 of 58  
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1 nF  
100  
1.8 µH  
10 nF  
10 nF  
1 µF  
32  
31  
30  
29  
28  
27  
26  
25  
24  
1 nF  
1
2
1 MΩ  
220 nF  
AM TUNER  
560 µH  
560 µH  
15 pF  
T1  
3
FM TUNER  
primary inductance: 71 nH  
ratio prim./sec.: 2.25/5  
33  
pF  
470 kΩ  
TEST  
10 nF  
4
5
6
7
TEF6621T  
1 nF  
4.7 kΩ  
PLL TUNING  
SYSTEM  
100 nF  
10 nF  
100 nF  
1 µF  
1 µF  
8
23  
22  
21  
20  
L
STEREO DECODER  
HIGH CUT  
SOFT MUTE  
FM NOISE BLANKER  
1 µF  
1 µF  
9
R
OUTPUT  
POWER  
SUPPLY  
C1  
22 Ω  
3.3 µH  
10  
11  
V
P
220 nF  
100 nF  
100 nF  
V
CC  
12  
13  
14  
15  
16  
19  
18  
17  
SDA  
SCL  
SIGNAL  
IMPROVEMENT  
CONTROL  
2
I C-BUS  
RSSI  
15 pF  
X1  
4 MHz  
008aaa136  
For list of components see Table 61 and for crystal specification see Table 62.  
Fig 27. Application diagram of TEF6621T  
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130 mm  
110 mm  
001aah342  
Fig 28. Printed-circuit board layout, suggested for application (this layout has been used in the NXP GH989 reference design, 35 µm)  
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D1  
BAV99  
1 nF  
1 M  
5.6 pF  
82 Ω  
100 nF  
10 nF  
10 nF  
1 µF  
32  
31  
30  
29  
28  
1 nF  
470 nH  
1.8 µH  
1
2
220 nF  
1 MΩ  
AM TUNER  
560 µH  
560 µH  
L1  
290 nH  
L2  
215 nH  
15 pF  
3
FM TUNER  
22 pF  
22 pF  
470 kΩ  
4
5
6
7
27  
26  
25  
24  
1 nF  
TEST  
10 nF  
TEF6621T  
4.7 kΩ  
PLL TUNING  
SYSTEM  
1 µF  
100 nF  
10 nF  
100 nF  
20 pF  
20 pF  
1 µF  
1 µF  
10 kΩ  
10 kΩ  
L
8
23  
22  
21  
20  
STEREO DECODER  
HIGH CUT  
SOFT MUTE  
FM NOISE BLANKER  
1 µF  
R
9
OUTPUT  
POWER  
SUPPLY  
C1  
22 Ω  
3.3 µH  
10  
11  
V
P
220 nF  
100 nF  
100 nF  
V
CC  
12  
13  
14  
15  
16  
19  
18  
17  
SDA  
SCL  
SIGNAL  
IMPROVEMENT  
CONTROL  
2
I C-BUS  
RSSI  
20 pF  
10 kΩ  
15 pF  
X1  
4 MHz  
008aaa137  
For list of components see Table 61 and for crystal specification see Table 62.  
Fig 29. Test circuit of TEF6621T  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 61. List of components for Figure 27 and Figure 29  
Symbol  
C1  
Component  
Type  
Manufacturer  
any  
decoupling capacitor  
ESD protection diode  
FM RF input 1  
FM RF input 2  
transformer  
1 µF; X7R 0805  
BAV99  
D1  
NXP Semiconductors  
Murata  
L1  
290 nH; LQH31HNR29K03L  
215 nH; LQH31HNR21K01L  
#P600ENS-10959QH  
LN-G102-1413  
L2  
Murata  
T1  
TOKO  
X1  
crystal 4 MHz  
NDK  
Table 62. 4 MHz crystal specification for Figure 27 and Figure 29  
Symbol  
fxtal  
Parameter  
Conditions  
Min  
Typ  
Max  
-
Unit  
MHz  
pF  
crystal frequency  
load capacitance  
shunt capacitance  
motional capacitance  
series resistance  
fundamental frequency  
-
4.000  
CL  
-
18  
-
-
Cshunt  
C1  
-
7
pF  
-
10  
-
-
fF  
Rs  
-
150  
+25  
+5  
+30  
+85  
fxtal/fxtal  
relative crystal frequency  
variation  
at 25 °C  
25  
5  
30  
20  
-
106  
106  
106  
°C  
caused by ageing  
caused by temperature  
-
-
Tamb  
ambient temperature  
-
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
50 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
Table 63. DC operating points  
VCC2 = 8.5 V; VCC1 = 8.5 V; Vi(RF) = 0 µV; audio output gain low; unless otherwise specified.  
Symbol  
Pin Unloaded DC voltage (V)  
AM mode  
FM mode  
Min  
Typ  
2.85  
4.1  
-
Max  
Min  
Typ  
-
Max  
AMRFIN  
AMRFDEC  
FMIN2  
1
2
3
4
5
6
7
8
9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3.1  
3.1  
FMIN1  
-
-
-
GNDRF  
VCC2  
external GND  
external GND  
external 8.5  
external 8.5  
AMRFAGC  
LOUT  
-
-
-
1.8  
3.8  
3.8  
-
-
-
-
-
-
-
-
-
3.8  
3.8  
ROUT  
-
GNDAUD  
AMIFAGC2  
MPXIN  
MPXOUT  
RSSI  
10 external GND  
external GND  
11  
12  
13  
14  
15  
16  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3.7  
4
-
3.7  
4
-
1.2  
6.5  
6.5  
-
0.8  
6.5  
6.5  
XTAL2  
-
XTAL1  
-
GNDD  
17 external GND  
external GND  
SCL  
18 external I2C-bus voltage  
19 external I2C-bus voltage  
external I2C-bus voltage  
external I2C-bus voltage  
SDA  
VREF  
20 3.9  
4.0  
6.5  
4.1  
7
3.9  
4.0  
6.5  
4.1  
7
VREGSUP  
VCC1  
21 5.6  
5.6  
22 external 8.5  
23 external GND  
external 8.5  
GND  
external GND  
VCODEC  
PLL  
24  
-
5.7  
-
-
-
5.7  
-
25 1.2  
5.5  
-
1.2  
-
5.5  
PLLREF  
TEST  
26  
27  
-
-
2.25  
-
-
-
-
-
-
-
-
2.25  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
AMSELIN1  
AMSELIN2  
AMIFAGC1  
28 1.2  
29 1.2  
1.55  
1.55  
5.5  
6.8  
6.8  
1.9  
1.9  
-
30  
-
AMSELOUT1 31 6.5  
AMSELOUT2 32 6.5  
7.15  
7.15  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
51 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
15. Package outline  
SO32: plastic small outline package; 32 leads; body width 7.5 mm  
SOT287-1  
D
E
A
X
c
y
H
v
M
A
E
Z
17  
32  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
16  
1
w
M
detail X  
b
p
e
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
E
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
max.  
0.3  
0.1  
2.45  
2.25  
0.49  
0.36  
0.27 20.7  
0.18 20.3  
7.6  
7.4  
10.65  
10.00  
1.1  
0.4  
1.2  
1.0  
0.95  
0.55  
mm  
2.65  
0.25  
0.01  
1.27  
0.05  
1.4  
0.25  
0.01  
0.25  
0.01  
0.1  
8o  
0o  
0.012 0.096  
0.004 0.089  
0.02 0.011 0.81  
0.01 0.007 0.80  
0.30  
0.29  
0.419  
0.394  
0.043 0.047  
0.016 0.039  
0.037  
0.022  
inches  
0.1  
0.004  
0.055  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
00-08-17  
03-02-19  
SOT287-1  
MO-119  
Fig 30. Package outline SOT287-1 (SO32)  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
52 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
16. Soldering of SMD packages  
This text provides a very brief insight into a complex technology. A more in-depth account  
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow  
soldering description”.  
16.1 Introduction to soldering  
Soldering is one of the most common methods through which packages are attached to  
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both  
the mechanical and the electrical connection. There is no single soldering method that is  
ideal for all IC packages. Wave soldering is often preferred when through-hole and  
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not  
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high  
densities that come with increased miniaturization.  
16.2 Wave and reflow soldering  
Wave soldering is a joining technology in which the joints are made by solder coming from  
a standing wave of liquid solder. The wave soldering process is suitable for the following:  
Through-hole components  
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board  
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless  
packages which have solder lands underneath the body, cannot be wave soldered. Also,  
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,  
due to an increased probability of bridging.  
The reflow soldering process involves applying solder paste to a board, followed by  
component placement and exposure to a temperature profile. Leaded packages,  
packages with solder balls, and leadless packages are all reflow solderable.  
Key characteristics in both wave and reflow soldering are:  
Board specifications, including the board finish, solder masks and vias  
Package footprints, including solder thieves and orientation  
The moisture sensitivity level of the packages  
Package placement  
Inspection and repair  
Lead-free soldering versus SnPb soldering  
16.3 Wave soldering  
Key characteristics in wave soldering are:  
Process issues, such as application of adhesive and flux, clinching of leads, board  
transport, the solder wave parameters, and the time during which components are  
exposed to the wave  
Solder bath specifications, including temperature and impurities  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
53 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
16.4 Reflow soldering  
Key characteristics in reflow soldering are:  
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to  
higher minimum peak temperatures (see Figure 31) than a SnPb process, thus  
reducing the process window  
Solder paste printing issues including smearing, release, and adjusting the process  
window for a mix of large and small components on one board  
Reflow temperature profile; this profile includes preheat, reflow (in which the board is  
heated to the peak temperature) and cooling down. It is imperative that the peak  
temperature is high enough for the solder to make reliable solder joints (a solder paste  
characteristic). In addition, the peak temperature must be low enough that the  
packages and/or boards are not damaged. The peak temperature of the package  
depends on package thickness and volume and is classified in accordance with  
Table 64 and 65  
Table 64. SnPb eutectic process (from J-STD-020C)  
Package thickness (mm) Package reflow temperature (°C)  
Volume (mm3)  
< 350  
235  
350  
220  
< 2.5  
2.5  
220  
220  
Table 65. Lead-free process (from J-STD-020C)  
Package thickness (mm) Package reflow temperature (°C)  
Volume (mm3)  
< 350  
260  
350 to 2000  
> 2000  
260  
< 1.6  
260  
250  
245  
1.6 to 2.5  
> 2.5  
260  
245  
250  
245  
Moisture sensitivity precautions, as indicated on the packing, must be respected at all  
times.  
Studies have shown that small packages reach higher temperatures during reflow  
soldering, see Figure 31.  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
54 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
maximum peak temperature  
= MSL limit, damage level  
temperature  
minimum peak temperature  
= minimum soldering temperature  
peak  
temperature  
time  
001aac844  
MSL: Moisture Sensitivity Level  
Fig 31. Temperature profiles for large and small components  
For further information on temperature profiles, refer to Application Note AN10365  
“Surface mount reflow soldering description”.  
17. Abbreviations  
Table 66. Abbreviations  
Acronym  
AGC  
HCC  
I2C-bus  
IF  
Description  
Automatic Gain Control  
High-Cut Control  
Inter IC bus  
Intermediate Frequency  
Local Oscillator  
LO  
LW  
Long Wave  
MPX  
MW  
Multiplex  
Medium Wave  
PLL  
Phase-Locked Loop  
Radio Frequency  
Received Signal Strength Indication  
UltraSonic Noise  
Voltage-Controlled Oscillator  
Wideband AM  
RF  
RSSI  
USN  
VCO  
WAM  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
55 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
18. Revision history  
Table 67. Revision history  
Document ID  
Release date  
yyyymmdd  
Data sheet status  
Change notice  
Supersedes  
TEF6621_1  
Objective data sheet  
-
-
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
56 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
19. Legal information  
19.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
19.2 Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
19.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
19.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
I2C-bus — logo is a trademark of NXP B.V.  
20. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
TEF6621_1  
© NXP B.V. 2008. All rights reserved.  
Objective data sheet  
Rev. 01.04 — 7 August 2008  
57 of 58  
TEF6621  
NXP Semiconductors  
Tuner on main-board IC  
21. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
13.1  
14  
Printed-circuit board. . . . . . . . . . . . . . . . . . . . 48  
Test information. . . . . . . . . . . . . . . . . . . . . . . . 49  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 52  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
15  
16  
Soldering of SMD packages . . . . . . . . . . . . . . 53  
Introduction to soldering. . . . . . . . . . . . . . . . . 53  
Wave and reflow soldering . . . . . . . . . . . . . . . 53  
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 53  
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 54  
16.1  
16.2  
16.3  
16.4  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4  
17  
18  
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 55  
Revision history . . . . . . . . . . . . . . . . . . . . . . . 56  
7
Functional description . . . . . . . . . . . . . . . . . . . 5  
FM tuner . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
AM tuner . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
PLL tuning system . . . . . . . . . . . . . . . . . . . . . . 5  
FM stereo decoder . . . . . . . . . . . . . . . . . . . . . . 5  
Weak signal processing and noise blanker. . . . 5  
I2C-bus transceiver . . . . . . . . . . . . . . . . . . . . . . 6  
7.1  
7.2  
7.3  
7.4  
7.5  
7.6  
19  
Legal information . . . . . . . . . . . . . . . . . . . . . . 57  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 57  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 57  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 57  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 57  
19.1  
19.2  
19.3  
19.4  
8
8.1  
8.1.1  
8.1.2  
8.1.3  
8.1.4  
8.2  
I2C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . . . 6  
Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Read mode: data byte STATUS . . . . . . . . . . . . 7  
Read mode: data byte LEVEL . . . . . . . . . . . . . 7  
Read mode: data byte USN_WAM . . . . . . . . . . 8  
Read mode: data byte IFCOUNTER . . . . . . . . 8  
Write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Mode and subaddress byte for write. . . . . . . . 10  
Write mode: data byte TUNER0 . . . . . . . . . . . 22  
Write mode: data byte TUNER1 . . . . . . . . . . . 22  
Write mode: data byte TUNER2 . . . . . . . . . . . 23  
Write mode: data byte RADIO . . . . . . . . . . . . 24  
Write mode: data byte SOFTMUTE0 . . . . . . . 24  
Write mode: data byte SOFTMUTE1 . . . . . . . 25  
Write mode: data byte SOFTMUTE2_FM. . . . 27  
Write mode: data byte SOFTMUTE2_AM . . . 29  
Write mode: data byte HIGHCUT0 . . . . . . . . . 29  
Write mode: data byte HIGHCUT1 . . . . . . . . . 30  
Write mode: data byte HIGHCUT2 . . . . . . . . . 32  
Write mode: data byte STEREO0. . . . . . . . . . 34  
Write mode: data byte STEREO1. . . . . . . . . . 34  
Write mode: data byte STEREO2. . . . . . . . . . 36  
Write mode: data byte CONTROL . . . . . . . . . 37  
Write mode: data byte LEVEL_OFFSET . . . . 38  
Write mode: data byte AM_LNA . . . . . . . . . . . 38  
20  
21  
Contact information . . . . . . . . . . . . . . . . . . . . 57  
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58  
8.2.1  
8.2.2  
8.2.3  
8.2.4  
8.2.5  
8.2.6  
8.2.7  
8.2.8  
8.2.9  
8.2.10  
8.2.11  
8.2.12  
8.2.13  
8.2.14  
8.2.15  
8.2.16  
8.2.17  
8.2.18  
9
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 39  
Thermal characteristics. . . . . . . . . . . . . . . . . . 39  
Static characteristics. . . . . . . . . . . . . . . . . . . . 40  
Dynamic characteristics . . . . . . . . . . . . . . . . . 40  
Application information. . . . . . . . . . . . . . . . . . 47  
10  
11  
12  
13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2008.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 7 August 2008  
Document identifier: TEF6621_1  

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