TJA1042T/3 [NXP]

High-speed CAN transceiver with Standby mode; 高速CAN与待机模式收发器
TJA1042T/3
型号: TJA1042T/3
厂家: NXP    NXP
描述:

High-speed CAN transceiver with Standby mode
高速CAN与待机模式收发器

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TJA1042  
High-speed CAN transceiver with Standby mode  
Rev. 02 — 8 July 2009  
Product data sheet  
1. General description  
The TJA1042 is a high-speed CAN transceiver that provides an interface between a  
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.  
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the  
automotive industry, providing the differential transmit and receive capability to (a  
microcontroller with) a CAN protocol controller.  
The TJA1042 is a step up from the TJA1040, PCA82C250 and PCA82C251 high-speed  
CAN transceivers. It offers improved ElectroMagnetic Compatibility (EMC) and  
ElectroStatic Discharge (ESD) performance, and also features:  
Ideal passive behavior to the CAN bus when the supply voltage is off  
A very low-current Standby mode with bus wake-up capability  
Direct interfacing to microcontrollers with 3 V to 5 V supply voltages on TJA1042T/3  
and TJA1042TK/3  
These features make the TJA1042 an excellent choice for all types of HS-CAN networks,  
in nodes that require a low-power mode with wake-up capability via the CAN bus.  
2. Features  
2.1 General  
I Fully ISO 11898-2 and ISO 11898-5 compliant  
I Suitable for 12 V and 24 V systems  
I Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)  
I VIO input on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3 V to 5 V  
microcontrollers (available in SO8 and very small HVSON8 packages respectively)  
I SPLIT voltage output on TJA1042T for stabilizing the recessive bus level (available in  
SO8 package only)  
2.2 Low-power management  
I Very low-current Standby mode with host and bus wake-up capability  
I Functional behavior predictable under all supply conditions  
I Transceiver disengages from the bus when not powered up (zero load)  
2.3 Protections  
I High ESD handling capability on the bus pins  
I Bus pins protected against transients in automotive environments  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
I Transmit Data (TXD) dominant time-out function  
I Bus-dominant time-out function in Standby mode  
I Undervoltage detection on pins VCC and VIO  
I Thermally protected  
3. Ordering information  
Table 1.  
Ordering information  
Type number[1]  
Package  
Name  
SO8  
Description  
Version  
SOT96  
SOT96  
SOT782  
TJA1042T  
plastic small outline package; 8 leads; body width 3.9 mm  
plastic small outline package; 8 leads; body width 3.9 mm  
TJA1042T/3  
TJA1042TK/3  
SO8  
HVSON8  
plastic thermal enhanced very small outline package; 8 leads; body  
width 3 mm; lead pitch 0.65 mm; exposed die pad  
[1] TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with VIO pin.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
2 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
4. Block diagram  
V
V
IO  
5
CC  
3
V
CC  
TJA1042  
TEMPERATURE  
PROTECTION  
(1)  
7
6
V
IO  
CANH  
CANL  
SLOPE  
CONTROL  
AND  
1
TIME-OUT  
DRIVER  
TXD  
(1)  
V
IO  
MODE  
CONTROL  
5
(1)  
SPLIT  
SPLIT  
8
4
STB  
RXD  
MUX  
AND  
DRIVER  
WAKE-UP  
FILTER  
2
015aaa017  
GND  
(1) In a transceiver with a SPLIT pin, the VIO input is internally connected to VCC  
.
Fig 1. Block diagram  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
3 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
5. Pinning information  
5.1 Pinning  
TJA1042T/3  
TJA1042T  
TJA1042TK/3  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
TXD  
STB  
TXD  
STB  
GND  
CANH  
CANL  
SPLIT  
GND  
CANH  
CANL  
V
CC  
V
CC  
RXD  
RXD  
V
IO  
015aaa018  
015aaa019  
Fig 2. Pin configuration diagrams  
5.2 Pin description  
Table 2.  
Pin description  
Pin Description  
Symbol  
TXD  
1
2
3
4
5
5
transmit data input  
GND  
VCC  
ground supply  
supply voltage  
RXD  
SPLIT  
VIO  
receive data output; reads out data from the bus lines  
common-mode stabilization output; in TJA1042T version only  
supply voltage for I/O level adapter; in TJA1042T/3 and TJA1042TK/3 versions  
only  
CANL  
CANH  
STB  
6
7
8
LOW-level CAN bus line  
HIGH-level CAN bus line  
Standby mode control input  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
4 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
6. Functional description  
The TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the  
functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved  
EMC and ESD handling capability and quiescent current performance. Improved slope  
control and high DC handling capability on the bus pins provide additional application  
flexibility.  
The TJA1042 is available in two versions, distinguished only by the function of pin 5:  
The TJA1042T is 100 % backwards compatible with the TJA1040, and also covers  
existing PCA82C250 and PCA82C251 applications  
The TJA1042T/3 and TJA1042TK/3 allow for direct interfacing to microcontrollers with  
supply voltages down to 3 V  
6.1 Operating modes  
The TJA1042 supports two operating modes, Normal and Standby, which are selectable  
via pin STB. See Table 3 for a description of the operating modes under normal supply  
conditions.  
Table 3.  
Mode  
Operating modes  
Pin STB  
Pin RXD  
LOW  
HIGH  
Normal  
LOW  
bus dominant  
bus recessive  
Standby  
HIGH  
wake-up request  
detected  
no wake-up request  
detected  
6.1.1 Normal mode  
A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit  
and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).  
The differential receiver converts the analog data on the bus lines into digital data which is  
output to pin RXD. The slope of the output signals on the bus lines is controlled and  
optimized in a way that guarantees the lowest possible EME.  
6.1.2 Standby mode  
A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not  
able to transmit or correctly receive data via the bus lines. The transmitter and  
Normal-mode receiver blocks are switched off to reduce supply current, and only a  
low-power differential receiver monitors the bus lines for activity. The wake-up filter on the  
output of the low-power receiver does not latch bus dominant states, but ensures that only  
bus dominant and bus recessive states that persist longer than tfltr(wake)bus are reflected on  
pin RXD.  
In Standby mode, the bus lines are biased to ground to minimize the system supply  
current. The low-power receiver is supplied by V , and is capable of detecting CAN bus  
IO  
activity even if VIO is the only supply voltage available. When pin RXD goes LOW to signal  
a wake-up request, a transition to Normal mode will not be triggered until STB is forced  
LOW.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
5 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
6.2 Fail-safe features  
6.2.1 TXD dominant time-out function  
A ‘TXD dominant time-out’ timer is started when pin TXD is set LOW. If the LOW state on  
pin TXD persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus  
lines to recessive state. This function prevents a hardware and/or software application  
failure from driving the bus lines to a permanent dominant state (blocking all network  
communications). The TXD dominant time-out timer is reset when pin TXD is set to HIGH.  
The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s.  
6.2.2 Bus dominant time-out function  
In Standby mode a 'bus dominant time-out' timer is started when the CAN bus changes  
from recessive to dominant state. If the dominant state on the bus persists for longer than  
tto(dom)bus, the RXD pin is reset to HIGH. This function prevents a clamped dominant bus  
(due to a bus short-circuit or a failure in one of the other nodes on the network) from  
generating a permanent wake-up request. The bus dominant time-out timer is reset when  
the CAN bus changes from dominant to recessive state.  
6.2.3 Internal biasing of TXD and STB input pins  
Pins TXD and STB have internal pull-ups to VIO to ensure a safe, defined state in case  
one or both of these pins are left floating.  
6.2.4 Undervoltage detection on pins VCC and VIO  
Should VCC drop below the VCC undervoltage detection level, Vuvd(VCC), the transceiver  
will switch to Standby mode. The logic state of pin STB will be ignored until VCC has  
recovered.  
Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceiver will  
switch off and disengage from the bus (zero load) until VIO has recovered.  
6.2.5 Over-temperature protection  
The output drivers are protected against overtemperature conditions. If the virtual junction  
temperature exceeds the shutdown junction temperature, Tj(sd), the output drivers will be  
disabled until the virtual junction temperature falls below Tj(sd) and TXD becomes  
recessive again. Including the TXD condition ensures that output driver oscillation due to  
temperature drift is avoided.  
6.3 SPLIT output pin and VIO supply pin  
Two versions of the TJA1042 are available, only differing in the function of a single pin. Pin  
5 is either a SPLIT output pin or a VIO supply pin.  
6.3.1 SPLIT pin  
Using the SPLIT pin on the TJA1042T in conjunction with a split termination network (see  
Figure 3 and Figure 4) can help to stabilize the recessive voltage level on the bus. This will  
reduce EME in networks with DC leakage to ground (e.g. from deactivated nodes with  
poor bus leakage performance). In Normal mode, pin SPLIT delivers a DC output voltage  
of 0.5VCC. In Standby mode or when VCC is off, pin SPLIT is floating.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
6 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
V
CC  
TJA1042T  
CANH  
SPLIT  
CANL  
R
R
60  
60 Ω  
V
= 0.5 V  
CC  
SPLIT  
in normal mode;  
otherwise floating  
015aaa020  
GND  
Fig 3. Stabilization circuitry and application for version with SPLIT pin  
6.3.2 VIO supply pin  
Pin VIO on the TTJA1042T/3 and TJA1042TK/3 should be connected to the  
microcontroller supply voltage (see Figure 5). This will adjust the signal levels of pins TXD,  
RXD and STB to the I/O levels of the microcontroller. Pin VIO also provides the internal  
supply voltage for the low-power differential receiver of the transceiver. For applications  
running in low-power mode, this allows the bus lines to be monitored for activity even if  
there is no supply voltage on pin VCC  
.
For versions of the TJA1042 without a VIO pin, the VIO input is internally connected to VCC  
This sets the signal levels of pins TXD, RXD and STB to levels compatible with 5 V  
microcontrollers.  
.
7. Application design-in information  
5 V  
BAT  
V
CC  
V
DD  
CANH  
STB  
Pxx  
Pyy  
CANH  
MICRO-  
CONTROLLER  
SPLIT  
CANL  
TJA1042T  
TXD  
RXD  
TX0  
RX0  
CANL  
GND  
GND  
015aaa022  
Fig 4. Typical application with TJA1042T and a 5 V microcontroller.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
7 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
BAT  
3 V  
5 V  
INH  
V
V
IO  
CC  
V
STB  
CANH  
DD  
Pxx  
CANH  
CANL  
TJA1042T/3  
MICRO-  
CONTROLLER  
TXD  
RXD  
TJA1042TK/3  
TX0  
RX0  
CANL  
GND  
GND  
015aaa021  
Switching off the 5 V supply in Standby mode (dotted line) is optional.  
Fig 5. Typical application with TJA1042T/3 or TJA1042TK/3 and a 3 V microcontroller.  
8. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.  
Symbol Parameter  
Conditions  
Min  
Max  
Unit  
Vx  
voltage on pin x  
no time limit; DC value  
on pins CANH and CANL  
on any other pin  
on pins CANH and CANL  
IEC 61000-4-2  
at pins CANH and CANL  
HBM  
58  
+58  
+7  
V
V
V
0.3  
[1]  
[2]  
[3]  
[4]  
Vtrt  
transient voltage  
150 +100  
VESD  
electrostatic discharge voltage  
9  
+9  
kV  
at pins CANH and CANL  
at any other pin  
MM  
8  
4  
+8  
+4  
kV  
kV  
[5]  
[6]  
at any pin  
300 +300  
V
CDM  
at corner pins  
750 +750  
500 +500  
V
at any pin  
V
[7]  
Tvj  
virtual junction temperature  
storage temperature  
40  
55  
40  
+150  
+150  
+125  
°C  
°C  
°C  
Tstg  
Tamb  
ambient temperature  
[1] Verified by an external test house to ensure pins CANH and CANL can withstand ISO 7637 part 3 automotive transient test pulses 1, 2a,  
3a and 3b.  
[2] IEC 61000-4-2 (150 pF, 330 Ω).  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
8 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
[3] ESD performance of pins CANH and CANL according to IEC 61000-4-2 (150 pF, 330 ) has been be verified by an external test house.  
The result is equal to or better than ±8 kV (unaided).  
[4] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 k).  
[5] Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 µH, 10 ).  
[6] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF). The classification level is C5 (>1000 V).  
[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P × Rth(vj-a), where Rth(vj-a) is a  
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient  
temperature (Tamb).  
9. Thermal characteristics  
Table 5.  
Thermal characteristics  
According to IEC 60747-1.  
Symbol  
Parameter  
Conditions  
Value  
145  
50  
Unit  
K/W  
K/W  
Rth(vj-a)  
thermal resistance from virtual junction to ambient  
SO8 package; in free air  
HVSON8 package; in free air  
10. Static characteristics  
Table 6.  
Static characteristics  
Tvj = 40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise; All voltages are  
defined with respect to ground; Positive currents flow into the IC.[2]  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Supply; pin VCC  
VCC  
ICC  
supply voltage  
4.5  
-
5.5  
V
supply current  
Standby mode  
TJA1042T; includes IIO  
TJA1042T/3 or TJA1042TK/3  
Normal mode  
-
-
10  
-
15  
5
µA  
µA  
recessive; VTXD = VIO  
dominant; VTXD = 0 V  
2.5  
20  
5
10  
70  
4.5  
mA  
mA  
V
45  
-
Vuvd(VCC)  
undervoltage detection  
voltage on pin VCC  
[1]  
3.5  
I/O level adapter supply; pin VIO  
VIO  
IIO  
supply voltage on pin VIO  
supply current on pin VIO  
2.8  
5
-
-
5.5  
14  
V
Standby mode  
µA  
Normal mode  
recessive; VTXD = VIO  
dominant; VTXD = 0 V  
15  
80  
200  
1000  
2.7  
µA  
µA  
V
100  
1.3  
350  
2.0  
Vuvd(VIO)  
undervoltage detection  
voltage on pin VIO  
Standby mode control input; pin STB  
VIH  
HIGH-level input voltage  
0.7VIO  
-
VIO  
0.3  
+
V
VIL  
IIH  
LOW-level input voltage  
HIGH-level input current  
0.3  
1  
-
-
0.3VIO  
+1  
V
VSTB = VIO  
µA  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
9 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
Table 6.  
Static characteristics …continued  
Tvj = 40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise; All voltages are  
defined with respect to ground; Positive currents flow into the IC.[2]  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
IIL  
LOW-level input current  
VSTB = 0 V  
15  
-
1  
µA  
CAN transmit data input; pin TXD  
VIH  
HIGH-level input voltage  
0.7VIO  
-
VIO  
0.3  
+
V
VIL  
IIH  
IIL  
LOW-level input voltage  
HIGH-level input current  
LOW-level input current  
input capacitance  
0.3  
5  
-
0.3VIO  
+5  
V
VTXD = VIO  
-
µA  
µA  
pF  
Normal mode; VTXD = 0 V  
260  
-
150  
30  
10  
[3]  
Ci  
5
CAN receive data output; pin RXD  
IOH  
IOL  
HIGH-level output current  
LOW-level output current  
VRXD = VIO 0.4 V; VIO = VCC  
8  
3  
1  
mA  
mA  
VRXD = 0.4 V; bus dominant  
2
5
12  
Bus lines; pins CANH and CANL  
VO(dom) dominant output voltage  
VTXD = 0 V; t < tto(dom)TXD  
pin CANH  
2.75  
0.5  
3.5  
1.5  
-
4.5  
V
pin CANL  
2.25  
+400  
V
Vdom(TX)sy transmitter dominant voltage Vdom(TX)sym = VCC VCANH VCANL  
400  
mV  
symmetry  
m
VO(dif)bus  
bus differential output voltage VTXD = 0 V; t < tto(dom)TXD  
VCC = 4.75 V to 5.25 V  
1.5  
-
-
3
V
RL = 45 to 65 Ω  
VTXD = VIO; VCC = 4.75 V to 5.25 V  
50  
+50  
mV  
recessive; no load  
VO(rec)  
recessive output voltage  
Normal mode; VTXD = VIO; no load  
Standby mode; no load  
2
0.5VCC  
-
3
V
V
0.1  
+0.1  
[4]  
[5]  
Vth(RX)dif  
differential receiver threshold Vcm(CAN) = 30 V to +30 V  
voltage  
Normal mode  
0.5  
0.4  
50  
0.7  
0.7  
120  
0.9  
V
Standby mode  
1.15  
200  
V
Vhys(RX)dif differential receiver hysteresis Vcm(CAN) = 30 V to +30 V  
mV  
voltage  
Normal mode  
IO(dom)  
dominant output current  
VTXD = 0 V; t < tto(dom)TXD; VCC = 5 V  
pin CANH; VCANH = 0 V  
pin CANL; VCANL = 5 V / 40 V  
100  
40  
70  
70  
-
40  
100  
+5  
mA  
mA  
mA  
IO(rec)  
recessive output current  
Normal mode; VTXD = VIO  
5  
VCANH = VCANL = 27 V to +32 V  
IL  
leakage current  
VCC = VIO = 0 V; VCANH = VCANL = 5 V  
between VCANH and VCANL  
5  
9
-
+5  
28  
+1  
52  
20  
µA  
kΩ  
%
Ri  
input resistance  
15  
-
Ri  
Ri(dif)  
Ci(cm)  
input resistance deviation  
differential input resistance  
1  
19  
-
30  
-
kΩ  
pF  
[3]  
[3]  
common-mode input  
capacitance  
Ci(dif)  
differential input capacitance  
-
-
10  
pF  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
10 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
Table 6.  
Static characteristics …continued  
Tvj = 40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise; All voltages are  
defined with respect to ground; Positive currents flow into the IC.[2]  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Common mode stabilization output; pin SPLIT; only for TJA1042T  
VO  
output voltage  
Normal mode  
SPLIT = 500 µA to +500 µA  
0.3VCC 0.5VCC 0.7VCC  
0.45VCC 0.5VCC 0.55VCC  
V
I
Normal mode; RL = 1 MΩ  
V
IL  
leakage current  
Standby mode  
5  
-
+5  
µA  
VSPLIT = 58 V to +58 V  
Temperature detection  
Tj(sd) shutdown junction  
temperature  
[3]  
-
190  
-
°C  
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC  
.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Products are 100 % tested at 125 °C ambient  
temperature (wafer level pretesting), and 100 % tested at 25 °C ambient temperature (final testing). Both pretesting and final testing use  
correlated test conditions to cover the specified temperature and power supply voltage range.  
[3] Not tested in production.  
[4] Vcm(CAN) is the common mode voltage of CANH and CANL.  
[5] For TJA1042T/3 and TJA1042TK/3: values valid when VIO = 4.5 V to 5.5 V; when VIO = 2.8 V to 4.5 V, values valid when  
Vcm(CAN) = 12 V to +12 V.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
11 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
11. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
Tvj = 40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise. All voltages are  
defined with respect to ground. Positive currents flow into the IC.[2]  
Symbol  
Parameter  
Conditions  
Min Typ  
Max  
Unit  
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 6 and Figure 7  
td(TXD-busdom) delay time from TXD to bus dominant  
td(TXD-busrec) delay time from TXD to bus recessive  
td(busdom-RXD) delay time from bus dominant to RXD  
td(busrec-RXD) delay time from bus recessive to RXD  
Normal mode  
Normal mode  
Normal mode  
Normal mode  
-
65  
90  
60  
65  
-
-
ns  
ns  
ns  
ns  
ns  
-
-
-
-
-
-
tPD(TXD-RXD)  
propagation delay from TXD to RXD  
version with SPLIT pin  
Normal mode  
60  
220  
versions with VIO pin  
Normal mode  
60  
-
250  
ns  
tto(dom)TXD  
tto(dom)bus  
tfltr(wake)bus  
TXD dominant time-out time  
bus dominant time-out time  
bus wake-up filter time  
VTXD = 0 V; Normal mode  
Standby mode  
0.3  
0.3  
0.5  
2
2
1
12  
12  
3
ms  
ms  
µs  
version with SPLIT pin  
Standby mode  
versions with VIO pin  
Standby mode  
0.5  
7
1.5  
25  
5
µs  
µs  
td(stb-norm)  
standby to normal mode delay time  
47  
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC  
.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Products are 100 % tested at 125 °C ambient  
temperature (wafer level pretesting), and 100 % tested at 25 °C ambient temperature (final testing). Both pretesting and final testing use  
correlated test conditions to cover the specified temperature and power supply voltage range.  
+5 V  
47 µF  
100 nF  
(1)  
V
V
CC  
IO  
TXD  
CANH  
TJA1042  
R
L
100 pF  
SPLIT  
CANL  
RXD  
GND  
STB  
15 pF  
015aaa024  
(1) For versions with a VIO pin (TJA1042T/3 and TJA1042TK/3), the VIO pin is connected to pin VCC  
.
Fig 6. Timing test circuit for CAN transceiver  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
12 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
HIGH  
LOW  
TXD  
CANH  
CANL  
dominant  
0.9 V  
V
O(dif)(bus)  
0.5 V  
recessive  
HIGH  
0.7V  
IO  
RXD  
0.3V  
IO  
LOW  
t
t
d(TXD-busrec)  
d(TXD-busdom)  
t
t
d(busrec-RXD)  
d(busdom-RXD)  
t
t
PD(TXD-RXD)  
PD(TXD-RXD)  
015aaa025  
Fig 7. CAN transceiver timing diagram  
12. Test information  
12.1 Quality information  
This product has been qualified to the appropriate Automotive Electronics Council (AEC)  
standard Q100 or Q101 and is suitable for use in automotive applications.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
13 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
13. Package outline  
SO8: plastic small outline package; 8 leads; body width 3.9 mm  
SOT96-1  
D
E
A
X
v
c
y
H
M
A
E
Z
5
8
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
4
e
w
M
detail X  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
5.0  
4.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.20  
0.014 0.0075 0.19  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches 0.069  
0.01 0.004  
Notes  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT96-1  
076E03  
MS-012  
Fig 8. Package outline SOT96-1 (SO8)  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
14 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
HVSON8: plastic thermal enhanced very thin small outline package; no leads;  
8 terminals; body 3 x 3 x 0.85 mm  
SOT782-1  
0
1
2 mm  
scale  
X
B
A
D
A
A
1
E
c
terminal 1  
index area  
detail X  
C
e
1
terminal 1  
index area  
y
C
1
v
M
C
C
A B  
y
b
e
w M  
1
4
L
E
h
8
5
D
h
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
b
c
D
D
E
E
e
e
1
L
v
w
y
y
1
1
h
h
max.  
0.05 0.35  
0.00 0.25  
3.1  
2.9  
2.55  
2.25  
3.1  
2.9  
1.75  
1.45  
0.5  
0.3  
mm  
1
0.65 1.95  
0.1  
0.05 0.05  
0.1  
0.2  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
03-01-29  
SOT782-1  
- - -  
MO-229  
- - -  
Fig 9. Package outline SOT782-1 (HVSON8)  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
15 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
14. Soldering of SMD packages  
This text provides a very brief insight into a complex technology. A more in-depth account  
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow  
soldering description”.  
14.1 Introduction to soldering  
Soldering is one of the most common methods through which packages are attached to  
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both  
the mechanical and the electrical connection. There is no single soldering method that is  
ideal for all IC packages. Wave soldering is often preferred when through-hole and  
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not  
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high  
densities that come with increased miniaturization.  
14.2 Wave and reflow soldering  
Wave soldering is a joining technology in which the joints are made by solder coming from  
a standing wave of liquid solder. The wave soldering process is suitable for the following:  
Through-hole components  
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board  
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless  
packages which have solder lands underneath the body, cannot be wave soldered. Also,  
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,  
due to an increased probability of bridging.  
The reflow soldering process involves applying solder paste to a board, followed by  
component placement and exposure to a temperature profile. Leaded packages,  
packages with solder balls, and leadless packages are all reflow solderable.  
Key characteristics in both wave and reflow soldering are:  
Board specifications, including the board finish, solder masks and vias  
Package footprints, including solder thieves and orientation  
The moisture sensitivity level of the packages  
Package placement  
Inspection and repair  
Lead-free soldering versus SnPb soldering  
14.3 Wave soldering  
Key characteristics in wave soldering are:  
Process issues, such as application of adhesive and flux, clinching of leads, board  
transport, the solder wave parameters, and the time during which components are  
exposed to the wave  
Solder bath specifications, including temperature and impurities  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
16 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
14.4 Reflow soldering  
Key characteristics in reflow soldering are:  
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to  
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus  
reducing the process window  
Solder paste printing issues including smearing, release, and adjusting the process  
window for a mix of large and small components on one board  
Reflow temperature profile; this profile includes preheat, reflow (in which the board is  
heated to the peak temperature) and cooling down. It is imperative that the peak  
temperature is high enough for the solder to make reliable solder joints (a solder paste  
characteristic). In addition, the peak temperature must be low enough that the  
packages and/or boards are not damaged. The peak temperature of the package  
depends on package thickness and volume and is classified in accordance with  
Table 8 and 9  
Table 8.  
SnPb eutectic process (from J-STD-020C)  
Package thickness (mm) Package reflow temperature (°C)  
Volume (mm3)  
< 350  
350  
220  
< 2.5  
235  
220  
2.5  
220  
Table 9.  
Lead-free process (from J-STD-020C)  
Package thickness (mm) Package reflow temperature (°C)  
Volume (mm3)  
< 350  
260  
350 to 2000  
> 2000  
260  
< 1.6  
260  
250  
245  
1.6 to 2.5  
> 2.5  
260  
245  
250  
245  
Moisture sensitivity precautions, as indicated on the packing, must be respected at all  
times.  
Studies have shown that small packages reach higher temperatures during reflow  
soldering, see Figure 10.  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
17 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
maximum peak temperature  
= MSL limit, damage level  
temperature  
minimum peak temperature  
= minimum soldering temperature  
peak  
temperature  
time  
001aac844  
MSL: Moisture Sensitivity Level  
Fig 10. Temperature profiles for large and small components  
For further information on temperature profiles, refer to Application Note AN10365  
“Surface mount reflow soldering description”.  
15. Revision history  
Table 10. Revision history  
Document ID  
TJA1042_2  
Release date  
20090708  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
TJA1042_1  
Modifications  
Revised parameter values in Table 4 (VESD  
)
Revised parameter values in Table 6 (VO for SPLIT pin)  
TJA1042_1  
20090309  
Product data sheet  
-
-
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
18 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
16. Legal information  
16.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
16.2 Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
16.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
16.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
17. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
TJA1042_2  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 02 — 8 July 2009  
19 of 20  
TJA1042  
NXP Semiconductors  
High-speed CAN transceiver with Standby mode  
18. Contents  
1
General description . . . . . . . . . . . . . . . . . . . . . . 1  
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Low-power management . . . . . . . . . . . . . . . . . 1  
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
2.1  
2.2  
2.3  
3
4
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4  
6
6.1  
Functional description . . . . . . . . . . . . . . . . . . . 5  
Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5  
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6  
TXD dominant time-out function . . . . . . . . . . . . 6  
Bus dominant time-out function . . . . . . . . . . . . 6  
Internal biasing of TXD and STB input pins . . . 6  
Undervoltage detection on pins VCC and VIO . . 6  
Over-temperature protection. . . . . . . . . . . . . . . 6  
SPLIT output pin and VIO supply pin . . . . . . . . 6  
SPLIT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
6.1.1  
6.1.2  
6.2  
6.2.1  
6.2.2  
6.2.3  
6.2.4  
6.2.5  
6.3  
6.3.1  
6.3.2  
VIO supply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
7
Application design-in information . . . . . . . . . . 7  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 9  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 9  
Dynamic characteristics . . . . . . . . . . . . . . . . . 12  
Test information. . . . . . . . . . . . . . . . . . . . . . . . 13  
Quality information . . . . . . . . . . . . . . . . . . . . . 13  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14  
8
9
10  
11  
12  
12.1  
13  
14  
Soldering of SMD packages . . . . . . . . . . . . . . 16  
Introduction to soldering . . . . . . . . . . . . . . . . . 16  
Wave and reflow soldering . . . . . . . . . . . . . . . 16  
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16  
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 17  
14.1  
14.2  
14.3  
14.4  
15  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 19  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . 19  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 8 July 2009  
Document identifier: TJA1042_2  

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