TJA1042TK/3,118_技术文档

TJA1042

High-speed CAN transceiver with Standby mode

Rev. 10 — 24 November 2017

Product data sheet

1. General description

The TJA1042 high-speed CAN transceiver provides an interface between a Controller

Area Network (CAN) protocol controller and the physical two-wire CAN bus. The

transceiver is designed for high-speed CAN applications in the automotive industry,

providing the differential transmit and receive capability to (a microcontroller with) a CAN

protocol controller.

The TJA1042 belongs to the third generation of high-speed CAN transceivers from NXP

Semiconductors, offering significant improvements over first- and second-generation

devices such as the TJA1040. It offers improved ElectroMagnetic Compatibility (EMC)

and ElectroStatic Discharge (ESD) performance, and also features:

• Ideal passive behavior to the CAN bus when the supply voltage is off

• A very low-current Standby mode with bus wake-up capability

• TJA1042T/3 and TJA1042TK/3 can be interfaced directly to microcontrollers with

supply voltages from 3 V to 5 V

The TJA1042 implements the CAN physical layer as defined in ISO 11898-2:2016 and

SAE J2284-1 to SAE J2284-5. This implementation enables reliable communication in the

CAN FD fast phase at data rates up to 5 Mbit/s.

These features make the TJA1042 an excellent choice for all types of HS-CAN networks,

in nodes that require a low-power mode with wake-up capability via the CAN bus.

2. Features and benefits

2.1 General

 ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant

 Timing guaranteed for data rates up to 5 Mbit/s in the CAN FD fast phase

 Suitable for 12 V and 24 V systems

 Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)

 V_IOinput on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3 V to 5 V

microcontrollers

 SPLIT voltage output on TJA1042T for stabilizing the recessive bus level

 Available in SO8 package and leadless HVSON8 package (3.0 mm  3.0 mm) with

improved Automated Optical Inspection (AOI) capability

 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)

compliant)

 AEC-Q100 qualified

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

2.2 Predictable and fail-safe behavior

 Very low-current Standby mode with host and bus wake-up capability

 Functional behavior predictable under all supply conditions

 Transceiver disengages from the bus when not powered up (zero load)

 Transmit Data (TXD) dominant time-out function

 Bus-dominant time-out function in Standby mode

 Undervoltage detection on pins V_CCand V_IO

2.3 Protections

 High ESD handling capability on the bus pins (8 kV)

 High voltage robustness on CAN pins (58 V)

 Bus pins protected against transients in automotive environments

 Thermally protected

3. Quick reference data

Table 1.

Symbol

V_CC

Quick reference data

Parameter

Conditions

Min

4.5

2.8

3.5

Typ

Max Unit

supply voltage

-

5.5

4.5

V

V_IO

supply voltage on pin V_IO

V_uvd(VCC)

undervoltage detection voltage

on pin V_CC

V_uvd(VIO)

I_CC

undervoltage detection voltage

on pin V_IO

1.3

2.0

2.7

V

supply current

Standby mode

-

10

5

15

10

70

14

A

mA

A

Normal mode; bus recessive

Normal mode; bus dominant

Standby mode; V_TXD= V_IO

Normal mode

2.5

20

5

45

-

I_IO

supply current on pin V_IO

recessive; V_TXD= V_IO

dominant; V_TXD= 0 V

15

80

200

A

-

350

1000 A

V_ESD

V_CANH

V_CANL

T_vj

electrostatic discharge voltage IEC 61000-4-2 at pins CANH and CANL

voltage on pin CANH

8

-

+8

kV

V

58

40

+58

voltage on pin CANL

V

virtual junction temperature

+150 C

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

2 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

4. Ordering information

Table 2.

Ordering information

Type number^[1]

Package

Name

SO8

Description

Version

TJA1042T

plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

SOT782-1

TJA1042T/3

TJA1042TK/3

SO8

HVSON8

plastic thermal enhanced very thin small outline package; no leads;

8 terminals; body 3  3  0.85 mm

[1] TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with V_IOpin.

5. Block diagram

V

IO

5

CC

3

V

CC

TJA1042

TEMPERATURE

PROTECTION

(1)

7

6

V

IO

CANH

CANL

SLOPE

CONTROL

AND

1

TIME-OUT

DRIVER

TXD

(1)

V

IO

MODE

CONTROL

5

(1)

SPLIT

8

4

STB

RXD

MUX

AND

DRIVER

WAKE-UP

FILTER

2

015aaa017

GND

(1) In a transceiver with a SPLIT pin, the V_IOinput is internally connected to V_CC

.

Fig 1. Block diagram

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

3 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

6. Pinning information

6.1 Pinning

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a. TJA1042T: SO8

Fig 2. Pin configuration diagrams

b. TJA1042T/3: SO8

c. TJA1042TK/3: HVSON8

6.2 Pin description

Table 3.

Symbol

TXD

Pin description

Pin Description

1

transmit data input

GND

2^[1]ground supply

V_CC

3

4

5

supply voltage

RXD

receive data output; reads out data from the bus lines

SPLIT

V_IO

common-mode stabilization output; in TJA1042T version only

supply voltage for I/O level adapter; in TJA1042T/3 and TJA1042TK/3 versions

only

CANL

CANH

STB

6

7

8

LOW-level CAN bus line

HIGH-level CAN bus line

Standby mode control input

[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The

GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is

recommended that the exposed center pad also be soldered to board ground.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

4 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

7. Functional description

The TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the

functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved

EMC and ESD handling capability and quiescent current performance. Improved slope

control and high DC handling capability on the bus pins provide additional application

flexibility.

The TJA1042 is available in two versions, distinguished only by the function of pin 5:

• The TJA1042T is backwards compatible with the TJA1040 when used with a 5 V

microcontroller, and also covers existing PCA82C250 and PCA82C251 applications

• The TJA1042T/3 and TJA1042TK/3 allow for direct interfacing to microcontrollers with

supply voltages down to 3 V

7.1 Operating modes

The TJA1042 supports two operating modes, Normal and Standby, which are selected via

pin STB. See Table 4 for a description of the operating modes under normal supply

conditions.

Table 4.

Mode

Operating modes

Pin STB

Pin RXD

LOW

HIGH

Normal

LOW

HIGH

bus dominant

bus recessive

Standby

wake-up request

detected

no wake-up request

detected

7.1.1 Normal mode

A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit

and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).

The differential receiver converts the analog data on the bus lines into digital data which is

output to pin RXD. The slopes of the output signals on the bus lines are controlled

internally and are optimized in a way that guarantees the lowest possible EME.

7.1.2 Standby mode

A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not

able to transmit or correctly receive data via the bus lines. The transmitter and

Normal-mode receiver blocks are switched off to reduce supply current, and only a

low-power differential receiver monitors the bus lines for activity. The wake-up filter on the

output of the low-power receiver does not latch bus dominant states, but ensures that only

bus dominant and bus recessive states that persist longer than t_{fltr(wake)bus}are reflected on

pin RXD.

In Standby mode, the bus lines are biased to ground to minimize the system supply

current. The low-power receiver is supplied by V_IO, and is capable of detecting CAN bus

activity even if V_IOis the only supply voltage available. When pin RXD goes LOW to signal

a wake-up request, a transition to Normal mode will not be triggered until STB is forced

LOW.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

5 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

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Fig 3. Wake-up timing

7.2 Fail-safe features

7.2.1 TXD dominant time-out function

A ‘TXD dominant time-out’ timer is started when pin TXD is set LOW. If the LOW state on

pin TXD persists for longer than t_to(dom)TXD, the transmitter is disabled, releasing the bus

lines to recessive state. This function prevents a hardware and/or software application

failure from driving the bus lines to a permanent dominant state (blocking all network

communications). The TXD dominant time-out timer is reset when pin TXD is set to HIGH.

The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s.

7.2.2 Bus dominant time-out function

In Standby mode a 'bus dominant time-out' timer is started when the CAN bus changes

from recessive to dominant state. If the dominant state on the bus persists for longer than

t_to(dom)bus, the RXD pin is reset to HIGH. This function prevents a clamped dominant bus

(due to a bus short-circuit or a failure in one of the other nodes on the network) from

generating a permanent wake-up request. The bus dominant time-out timer is reset when

the CAN bus changes from dominant to recessive state.

7.2.3 Internal biasing of TXD and STB input pins

Pins TXD and STB have internal pull-ups to V_IOto ensure a safe, defined state in case

one or both of these pins are left floating. Pull-up currents flow in these pins in all states;

both pins should be held HIGH in Standby mode to minimize standby current.

7.2.4 Undervoltage detection on pins V_CCand V_IO

Should V_CCdrop below the V_CCundervoltage detection level, V_uvd(VCC), the transceiver

will switch to Standby mode. The logic state of pin STB will be ignored until V_CChas

recovered.

Should V_IOdrop below the V_IOundervoltage detection level, V_uvd(VIO), the transceiver will

switch off and disengage from the bus (zero load) until V_IOhas recovered.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

6 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

7.2.5 Overtemperature protection

The output drivers are protected against overtemperature conditions. If the virtual junction

temperature exceeds the shutdown junction temperature, T_j(sd), the output drivers will be

disabled until the virtual junction temperature falls below T_j(sd)and TXD becomes

recessive again. Including the TXD condition ensures that output driver oscillation due to

temperature drift is avoided.

7.3 SPLIT output pin and V_IOsupply pin

Two versions of the TJA1042 are available, only differing in the function of a single pin.

Pin 5 is either a SPLIT output pin or a V_IOsupply pin.

7.3.1 SPLIT pin

Using the SPLIT pin on the TJA1042T in conjunction with a split termination network (see

Figure 4 and Figure 7) can help to stabilize the recessive voltage level on the bus. This

will reduce EME in networks with DC leakage to ground (e.g. from deactivated nodes with

poor bus leakage performance). In Normal mode, pin SPLIT delivers a DC output voltage

of 0.5V_CC. In Standby mode or when V_CCis off, pin SPLIT is floating. When not used, the

SPLIT pin should be left open.

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Fig 4. Stabilization circuitry and application for version with SPLIT pin

7.3.2 V_IOsupply pin

Pin V_IOon the TTJA1042T/3 and TJA1042TK/3 should be connected to the

microcontroller supply voltage (see Figure 8). This will adjust the signal levels of

pins TXD, RXD and STB to the I/O levels of the microcontroller. Pin V_IOalso provides the

internal supply voltage for the low-power differential receiver of the transceiver. For

applications running in low-power mode, this allows the bus lines to be monitored for

activity even if there is no supply voltage on pin V_CC

.

For versions of the TJA1042 without a V_IOpin, the V_IOinput is internally connected to V_CC

This sets the signal levels of pins TXD, RXD and STB to levels compatible with 5 V

microcontrollers.

.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

7 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

8. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.

Symbol

Parameter

voltage on pin x^[1]

Conditions

Min

58

0.3

27

Max

+58

+7

Unit

V

V_x

on pins CANH, CANL and SPLIT

on any other pin

V

V_(CANH-CANL)voltage between pin CANH

and pin CANL

+27

V

[2]

V_trt

transient voltage

on pins CANH, CANL

pulse 1

100

-

V

pulse 2a

-

75

-

pulse 3a

150

pulse 3b

-

100

[3]

[4]

V_ESD

electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 )

at pins CANH and CANL

8

+8

kV

Human Body Model (HBM); 100 pF, 1.5 k

at pins CANH and CANL

at any other pin

8

4

+8

+4

kV

[5]

[6]

Machine Model (MM); 200 pF, 0.75 H, 10 

at any pin

300 +300

V

Charged Device Model (CDM); field Induced

charge; 4 pF

at corner pins

at any pin

750 +750

500 +500

V

[7]

T_vj

virtual junction temperature

storage temperature

40

55

+150

C

T_stg

[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)

never exceed these values.

[2] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.

[3] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.

[4] According to AEC-Q100-002.

[5] According to AEC-Q100-003.

[6] According to AEC-Q100-011 Rev-C1. The classification level is C4B.

[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T_vj= T_amb+ P  R_th(vj-a), where R_th(vj-a)is a

fixed value to be used for the calculation of T_vj. The rating for T_vjlimits the allowable combinations of power dissipation (P) and ambient

temperature (T_amb).

9. Thermal characteristics

Table 6.

Thermal characteristics

According to IEC 60747-1.

Symbol

Parameter

Conditions

Value

145

50

Unit

K/W

R_th(vj-a)

thermal resistance from virtual junction to ambient

SO8 package; in free air

HVSON8 package; in free air

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

8 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

10. Static characteristics

Table 7.

Static characteristics

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V^[1]; R_L= 60  unless specified otherwise; All voltages are

defined with respect to ground; Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply; pin V_CC

V_CC

supply voltage

4.5

3.5

-

5.5

4.5

V

V_uvd(VCC)

undervoltage detection

voltage on pin V_CC

I_CC

supply current

Standby mode

[3]

TJA1042T; includes I_IO; V_TXD= V_IO

TJA1042T/3 or TJA1042TK/3

Normal mode

-

10

-

15

5

A

[3]

recessive; V_TXD= V_IO

2.5

20

5

10

mA

dominant; V_TXD= 0 V

45

80

70

dominant; V_TXD= 0 V;

2.5

110

short circuit on bus lines;

3 V V_CANH= V_CANL)  +18 V

[1]

I/O level adapter supply; pin V_IO

V_IO

supply voltage on pin V_IO

2.8

1.3

-

5.5

2.7

V

V_uvd(VIO)

undervoltage detection

voltage on pin V_IO

2.0

[3]

I_IO

supply current on pin V_IO

Standby mode; V_TXD= V_IO

5

-

14

A

Normal mode

[3]

recessive; V_TXD= V_IO

15

-

80

200

A

dominant; V_TXD= 0 V

350

1000

Standby mode control input; pin STB

[4]

[3]

V_IH

HIGH-level input voltage

0.7V_IO

-

V_IO

+

V

0.3

[3]

V_IL

I_IH

I_IL

LOW-level input voltage

HIGH-level input current

LOW-level input current

0.3

1

-

0.3V_IO

+1

V

[3]

V_STB= V_IO

A

V_STB= 0 V

15

1

CAN transmit data input; pin TXD

[4]

[3]

V_IH

HIGH-level input voltage

0.7V_IO

-

V_IO

0.3

+

V

[3]

V_IL

I_IH

I_IL

LOW-level input voltage

HIGH-level input current

LOW-level input current

input capacitance

0.3

5

-

0.3V_IO

+5

V

[3]

V_TXD= V_IO

-

A

pF

V_TXD= 0 V

260

-

150

30

10

[5]

[3]

C_i

5

CAN receive data output; pin RXD

I_OH

I_OL

HIGH-level output current

LOW-level output current

V_RXD= V_IO 0.4 V

8

3

1

mA

V_RXD= 0.4 V; bus dominant

2

5

12

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

9 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V^[1]; R_L= 60  unless specified otherwise; All voltages are

defined with respect to ground; Positive currents flow into the IC.^[2]

Symbol

Bus lines; pins CANH and CANL

V_O(dom)dominant output voltage

Parameter

Conditions

Min

Typ

Max

Unit

V_TXD= 0 V; t < t_to(dom)TXD

pin CANH; R_L= 50  to 65 

pin CANL; R_L= 50  to 65 

2.75

0.5

3.5

1.5

-

4.5

V

2.25

+400

V

V_dom(TX)symtransmitter dominant voltage V_dom(TX)sym= V_CC V_CANH V_CANL

400

mV

symmetry

[5]

[6]

V_TXsym

transmitter voltage symmetry V_TXsym= V_CANH+ V_CANL

f_TXD= 250 kHz, 1 MHz and 2.5 MHz;

_SPLIT= 4.7 nF; V_CC= 4.75 V to 5.25 V

;

0.9V_CC

-

1.1V_CC

V

C

V_O(dif)

differential output voltage

dominant: Normal mode; V_TXD= 0 V;

t < t_to(dom)TXD; V_CC= 4.75 V to 5.25 V

R_L= 45  to 65 

R_L= 45  to 70 

R_L= 2240 

1.5

-

3

V

3.3

5

recessive; no load

[3]

Normal mode: V_TXD= V_IO

50

0.2

2

-

+50

+0.2

3

mV

V

Standby mode

-

V_O(rec)

recessive output voltage

Normal mode; V_TXD= V_IO^[3]; no load

0.5V_CC

-

V

Standby mode; no load

0.1

+0.1

V

V_th(RX)dif

differential receiver threshold 30 V  V_CANL +30 V;

voltage

30 V  V_CANH +30 V

Normal mode

0.5

0.4

0.7

0.9

V

[7]

Standby mode

1.15

V_rec(RX)

receiver recessive voltage

30 V  V_CANL +30 V;

30 V  V_CANH +30 V

Normal mode

Standby mode

4

-

0.5

0.4

V

V_dom(RX)

receiver dominant voltage

30 V  V_CANL +30 V;

30 V  V_CANH +30 V

Normal mode

Standby mode

0.9

1.15

50

-

9.0

200

V

-

V

V_hys(RX)difdifferential receiver hysteresis 30 V  V_CANL +30 V;

voltage 30 V  V_CANH +30 V

120

mV

I_O(sc)dom

dominant short-circuit output V_TXD= 0 V; t < t_to(dom)TXD; V_CC= 5 V

current

pin CANH; V_CANH= 15 V to +40 V

100

40

70

70

-

40

100

+5

mA

pin CANL; V_CANL= 15 V to +40 V

[3]

I_O(sc)rec

I_L

recessive short-circuit output Normal mode; V_TXD= V_IO

5

current

V_CANH= V_CANL= 27 V to +32 V

leakage current

V_CC= V_IO= 0 V or V_CC= V_IO= shorted

to ground via 47 k;

V_CANH= V_CANL= 5 V

5

-

+5

28

A

k

[5]

R_i

input resistance

2 V  V_CANL +7 V;

2 V  V_CANH +7 V

9

15

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

10 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V^[1]; R_L= 60  unless specified otherwise; All voltages are

defined with respect to ground; Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

[5]

R_i

input resistance deviation

0 V  V_CANL +5 V;

0 V  V_CANH +5 V

1

-

+1

%

R_i(dif)

C_i(cm)

C_i(dif)

differential input resistance

2 V  V_CANL +7 V;

2 V  V_CANH +7 V

19

-

30

-

52

20

10

k

pF

common-mode input

capacitance

differential input capacitance

-

Common mode stabilization output; pin SPLIT; only for TJA1042T

V_O

output voltage

Normal mode

_SPLIT= 500 A to +500 A

0.3V_CC0.5V_CC0.7V_CC

0.45V_CC0.5V_CC0.55V_CC

V

I

Normal mode; R_L= 1 M

V

I_L

leakage current

Standby mode

5

-

+5

A

V_SPLIT= 58 V to +58 V

Temperature detection

T_j(sd)shutdown junction

temperature

[5]

-

190

-

C

[1] Only TJA1042T/3 and TJA1042TK/3 have a V_IOpin. With TJA1042T, the V_IOinput is internally connected to V_CC

.

[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to

cover the specified temperature and power supply voltage range.

[3] V_IO= V_CCfor the non-V_IOproduct variant TJA1042T.

[4] Maximum value assumes V_CC< V_IO; if V_CC> V_IO, the maximum value will be V_CC+ 0.3 V.

[5] Not tested in production; guaranteed by design.

[6] The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 10.

[7] For TJA1042T/3 and TJA1042TK/3: values valid when V_IO= 4.5 V to 5.5 V; when V_IO= 2.8 V to 4.5 V, values valid when

12 V  V_CANL +12 V, 12 V  V_CANH +12 V.

11. Dynamic characteristics

Table 8.

Dynamic characteristics

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V^[1]; R_L= 60  unless specified otherwise. All voltages are

defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min Typ

Max

Unit

Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 5 and Figure 9

t_{d(TXD-busdom)}delay time from TXD to bus dominant

t_{d(TXD-busrec)}delay time from TXD to bus recessive

t_{d(busdom-RXD)}delay time from bus dominant to RXD

t_{d(busrec-RXD)}delay time from bus recessive to RXD

Normal mode

-

65

90

60

65

-

ns

-

t_d(TXDL-RXDL)delay time from TXD LOW to RXD LOW version with SPLIT pin;

Normal mode

60

220

versions with V_IOpin;

Normal mode

60

-

250

ns

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

11 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 8.

Dynamic characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.5 V to 5.5 V; V_IO= 2.8 V to 5.5 V^[1]; R_L= 60  unless specified otherwise. All voltages are

defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min Typ

Max

Unit

t_d(TXDH-RXDH)delay time from TXD HIGH to RXD HIGH version with SPLIT pin;

Normal mode

60

-

220

ns

versions with V_IOpin;

Normal mode

60

-

250

ns

[3]

t_bit(bus)

t_bit(RXD)

t_rec

transmitted recessive bit width

bit time on pin RXD

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

V_TXD= 0 V; Normal mode

Standby mode

435

155

400

120

65

45

0.3

-

530

210

550

220

+40

+15

5

ns

ms

s

-

receiver timing symmetry

-

[4]

t_to(dom)TXD

t_to(dom)bus

t_{fltr(wake)bus}

TXD dominant time-out time

bus dominant time-out time

bus wake-up filter time

2

1

0.3

5

version with SPLIT pin

Standby mode

0.5

3

versions with V_IOpin

Standby mode

0.5

7

1.5

25

5

s

t_d(stb-norm)

standby to normal mode delay time

47

[1] Only TJA1042T/3 and TJA1042TK/3 have a V_IOpin. With TJA1042T, the V_IOinput is internally connected to V_CC

.

[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to

cover the specified temperature and power supply voltage range.

[3] See Figure 6.

[4] Minimum value of 0.8 ms required according to SAE J2284; 0.3 ms is allowed according to ISO11898-2:2016 for legacy devices.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

12 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

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Fig 6. CAN FD timing definitions according to ISO 11898-2:2016

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

13 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

12. Application information

12.1 Application diagrams

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(2) Optional common mode stabilization by a voltage source of V_CC/2 at pin SPLIT.

Fig 7. Typical application with TJA1042T and a 5 V microcontroller.

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Fig 8. Typical application with TJA1042T/3 or TJA1042TK/3 and a 3 V microcontroller.

12.2 Application hints

Further information on the application of the TJA1042 can be found in NXP application

hints AH1014 ‘Application Hints - Standalone high speed CAN transceiver

TJA1042/TJA1043/TJA1048/TJA1051’.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

14 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

13. Test information

+5 V

47 μF

100 nF

(1)

V

CC

IO

TXD

CANH

TJA1042

R

L

100 pF

SPLIT

CANL

RXD

GND

STB

15 pF

015aaa024

(1) For versions with a V_IOpin (TJA1042T/3 and TJA1042TK/3), the V_IOpin is connected to pin V_CC

.

Fig 9. Timing test circuit for CAN transceiver

9

,2

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13.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for

integrated circuits, and is suitable for use in automotive applications.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

15 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

14. Package outline

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Fig 11. Package outline SOT96-1 (SO8)

TJA1042

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 10 — 24 November 2017

16 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

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Fig 12. Package outline SOT782-1 (HVSON8)

TJA1042

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 10 — 24 November 2017

17 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

15. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

16. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

16.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

16.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

16.3 Wave soldering

Key characteristics in wave soldering are:

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

18 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

16.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 13) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 9 and 10

Table 9.

SnPb eutectic process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

 350

220

< 2.5

235

220

 2.5

220

Table 10. Lead-free process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 13.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

19 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 13. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

17. Soldering of HVSON packages

Section 16 contains a brief introduction to the techniques most commonly used to solder

Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON

leadless package ICs can found in the following application notes:

• AN10365 ‘Surface mount reflow soldering description”

• AN10366 “HVQFN application information”

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Product data sheet

Rev. 10 — 24 November 2017

20 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

18. Appendix: ISO 11898-2:2016 parameter cross-reference list

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA dominant output characteristics

Single ended voltage on CAN_H

Single ended voltage on CAN_L

Differential voltage on normal bus load

Differential voltage on effective resistance during arbitration

Optional: Differential voltage on extended bus load range

HS-PMA driver symmetry

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(dom)

dominant output voltage

differential output voltage

V_O(dif)

Driver symmetry

V_SYM

V_TXsym

transmitter voltage symmetry

Maximum HS-PMA driver output current

Absolute current on CAN_H

I_{CAN_H}

I_{CAN_L}

I_O(sc)dom

dominant short-circuit output

current

Absolute current on CAN_L

HS-PMA recessive output characteristics, bus biasing active/inactive

Single ended output voltage on CAN_H

Single ended output voltage on CAN_L

Differential output voltage

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(rec)

recessive output voltage

differential output voltage

TXD dominant time-out time

V_O(dif)

Optional HS-PMA transmit dominant timeout

Transmit dominant timeout, long

t_dom

t_to(dom)TXD

Transmit dominant timeout, short

HS-PMA static receiver input characteristics, bus biasing active/inactive

Recessive state differential input voltage range

Dominant state differential input voltage range

V_Diff

V_th(RX)dif

differential receiver threshold

voltage

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

V_dom(RX)

HS-PMA receiver input resistance (matching)

Differential internal resistance

R_Diff

R_i(dif)

R_i

differential input resistance

input resistance

Single ended internal resistance

R_{CAN_H}

R_{CAN_L}

Matching of internal resistance

HS-PMA implementation loop delay requirement

Loop delay

MR

R_i

input resistance deviation

t_Loop

t_d(TXDH-RXDH)delay time from TXD HIGH to

RXD HIGH

t_d(TXDL-RXDL)

delay time from TXD LOW to RXD

LOW

Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to

2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s

Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,

intended

t_Bit(Bus)

t_bit(bus)

transmitted recessive bit width

Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s

Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s

t_Bit(RXD)

t_bit(RXD)

bit time on pin RXD

t_Rec

t_rec

receiver timing symmetry

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Product data sheet

Rev. 10 — 24 November 2017

21 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion …continued

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA maximum ratings of V_{CAN_H}, V_{CAN_L}and V_Diff

Maximum rating V_Diff

V_Diff

V_(CANH-CANL)voltage between pin CANH and

pin CANL

General maximum rating V_{CAN_H}and V_{CAN_L}

V_{CAN_H}

V_{CAN_L}

V_x

voltage on pin x

Optional: Extended maximum rating VCAN_H and VCAN_L

HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered

Leakage current on CAN_H, CAN_L

I_{CAN_H}

I_{CAN_L}

I_L

leakage current

HS-PMA bus biasing control timings

CAN activity filter time, long

CAN activity filter time, short

Wake-up timeout, short

[1]

t_Filter

t_wake(busdom)

bus dominant wake-up time

bus recessive wake-up time

bus wake-up time-out time

[1]

t_wake(busrec)

t_to(wake)bus

t_Wake

Wake-up timeout, long

Timeout for bus inactivity

Bus Bias reaction time

t_Silence

t_Bias

t_to(silence)

bus silence time-out time

t_{d(busact-bias)}

delay time from bus active to bias

[1] t_{fltr(wake)bus}- bus wake-up filter time, in devices with basic wake-up functionality

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Product data sheet

Rev. 10 — 24 November 2017

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TJA1042

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High-speed CAN transceiver with Standby mode

19. Revision history

Table 12. Revision history

Document ID

TJA1042 v.10

Modifications:

Release date

Data sheet status

Change notice

Supersedes

20171124

Product data sheet

-

TJA1042 v.9

• Updated to comply with ISO 11898-2:2016 and SAE J22884-1 through SAE J2284-5 specifications:

–

Section 1: text amended (2nd last paragraph)

Section 2.1: text amended (1st entry)

Table 7: values changed and/or measurements conditions amended/added for parameters I_CC

,

V

_TXsym, V_O(dif), V_rec(RX), V_dom(RX), I_O(sc)dom, R_i, R_iand R_i(dif)

–

Table 8: Table note 4 added

Figure 5: thresholds clarified

Figure 6: title changed

• Table 7: Table note 7 revised

• Figure 7, Figure 8, Figure 10: amended

TJA1042 v.9

TJA1042 v.8

TJA1042 v.7

TJA1042 v.6

TJA1042 v.5

TJA1042 v.4

TJA1042 v.3

TJA1042 v.2

TJA1042 v.1

20160523

20150115

20120508

20110323

20110118

20091006

20090825

20090708

20090309

Product data sheet

-

TJA1042 v.8

TJA1042 v.7

TJA1042 v.6

TJA1042 v.5

TJA1042 v.4

TJA1042 v.3

TJA1042 v.2

TJA1042 v.1

-

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

23 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

20. Legal information

20.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

20.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

20.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

24 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

20.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

21. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

TJA1042

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Product data sheet

Rev. 10 — 24 November 2017

25 of 26

TJA1042

NXP Semiconductors

High-speed CAN transceiver with Standby mode

22. Contents

1

General description. . . . . . . . . . . . . . . . . . . . . . 1

20

Legal information . . . . . . . . . . . . . . . . . . . . . . 24

20.1

20.2

20.3

20.4

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Predictable and fail-safe behavior . . . . . . . . . . 2

Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.1

2.2

2.3

21

22

Contact information . . . . . . . . . . . . . . . . . . . . 25

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3

4

5

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Ordering information. . . . . . . . . . . . . . . . . . . . . 3

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7

7.1

Functional description . . . . . . . . . . . . . . . . . . . 5

Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5

Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5

Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6

TXD dominant time-out function. . . . . . . . . . . . 6

Bus dominant time-out function . . . . . . . . . . . . 6

Internal biasing of TXD and STB input pins . . . 6

Undervoltage detection on pins V_CCand V_IO. . 6

Overtemperature protection . . . . . . . . . . . . . . . 7

SPLIT output pin and V_IOsupply pin . . . . . . . . 7

SPLIT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

V_IOsupply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.1.1

7.1.2

7.2

7.2.1

7.2.2

7.2.3

7.2.4

7.2.5

7.3

7.3.1

7.3.2

8

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8

Thermal characteristics . . . . . . . . . . . . . . . . . . 8

Static characteristics. . . . . . . . . . . . . . . . . . . . . 9

Dynamic characteristics . . . . . . . . . . . . . . . . . 11

9

10

11

12

12.1

12.2

Application information. . . . . . . . . . . . . . . . . . 14

Application diagrams . . . . . . . . . . . . . . . . . . . 14

Application hints . . . . . . . . . . . . . . . . . . . . . . . 14

13

13.1

14

Test information. . . . . . . . . . . . . . . . . . . . . . . . 15

Quality information . . . . . . . . . . . . . . . . . . . . . 15

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16

Handling information. . . . . . . . . . . . . . . . . . . . 18

15

16

Soldering of SMD packages . . . . . . . . . . . . . . 18

Introduction to soldering . . . . . . . . . . . . . . . . . 18

Wave and reflow soldering . . . . . . . . . . . . . . . 18

Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 18

Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 19

16.1

16.2

16.3

16.4

17

18

Soldering of HVSON packages. . . . . . . . . . . . 20

Appendix: ISO 11898-2:2016 parameter

cross-reference list . . . . . . . . . . . . . . . . . . . . . 21

19

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 23

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 24 November 2017

Document identifier: TJA1042


型号：	TJA1042TK/3,118
厂家：	NXP
描述：	TJA1042 - High-speed CAN transceiver with Standby mode SON 8-Pin PC 电信光电二极管电信集成电路
文件：	总26页 (文件大小：253K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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