TJA1044GT_技术文档

TJA1044

High-speed CAN transceiver with Standby mode

Rev. 6 — 24 August 2017

Product data sheet

1. General description

The TJA1044 is part of the Mantis family of high-speed CAN transceivers. It provides an

interface between a Controller Area Network (CAN) protocol controller and the physical

two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the

automotive industry, providing the differential transmit and receive capability to (a

microcontroller with) a CAN protocol controller.

The TJA1044 offers a feature set optimized for 12 V automotive applications, with

significant improvements over NXP's first- and second-generation CAN transceivers, such

as the TJA1040 and TJA1042, and excellent ElectroMagnetic Compatibility (EMC)

performance. Additionally, the TJA1044 features:

• Ideal passive behavior to the CAN bus when the supply voltage is off

• A very low-current Standby mode with bus wake-up capability

• Excellent EMC performance at speeds up to 500 kbit/s, even without a common mode

choke

• TJA1044GT/3 and TJA1044GTK/3 can be interfaced directly to microcontrollers with

supply voltages from 3 V to 5 V

These features make the TJA1044 an excellent choice for all types of HS-CAN networks,

in nodes that require a low-power mode with wake-up capability via the CAN bus.

The TJA1044 implements the CAN physical layer as defined in ISO 11898-2:2016 and

SAE J2284-1 to SAE J2284-5. The TJA1044T is specified for data rates up to 1 Mbit/s.

Additional timing parameters defining loop delay symmetry are specified for the other

variants. This implementation enables reliable communication in the CAN FD fast phase

at data rates up to 5 Mbit/s.

2. Features and benefits

2.1 General

 Fully ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant

 Very low-current Standby mode with host and bus wake-up capability

 Optimized for use in 12 V automotive systems

 EMC performance satisfies 'Hardware Requirements for LIN, CAN and FlexRay

Interfaces in Automotive Applications’, Version 1.3, May 2012.

 AEC-Q100 qualified

 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)

compliant)

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

 V_IOinput on TJA1044x/3 variants allows for direct interfacing with 3 V to 5 V

microcontrollers. Variants without a V_IOpin can interface with 3.3 V and 5 V-supplied

microcontrollers, provided the microcontroller I/Os are 5 V tolerant.

 Both V_IOand non-V_IOvariants are available in SO8 and leadless HVSON8 (3.0

mm  3.0 mm) packages; HVSON8 with improved Automated Optical Inspection (AOI)

capability.

2.2 Predictable and fail-safe behavior

 Functional behavior predictable under all supply conditions

 Transceiver disengages from bus when not powered (zero load)

 Transmit Data (TXD) and bus dominant time-out functions

 Internal biasing of TXD and STB input pins

2.3 Protection

 High ESD handling capability on the bus pins (8 kV IEC and HBM)

 Bus pins protected against transients in automotive environments

 Undervoltage detection on pins V_CCand V_IO

 Thermally protected

2.4 TJA1044 CAN FD (applicable to all product variants except TJA1044T)

 Timing guaranteed for CAN FD data rates up to 5 Mbit/s

 Improved TXD to RXD propagation delay of 210 ns

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

2 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

3. Quick reference data

Table 1.

Symbol

V_CC

Quick reference data

Parameter

Conditions

Min

4.75

-

Typ

-

Max Unit

supply voltage

supply current

5.25

15

5

V

I_CC

Standby mode; variants without a V_IOpin

Standby mode; variants with a V_IOpin

Normal mode; bus recessive

10

-

A

mA

V

-

2

5

10

70

4.3

Normal mode; bus dominant

20

3.5

45

4

V_{uvd(stb)(VCC)}

standby undervoltage detection

voltage on pin V_CC

V_{uvd(swoff)(VCC)}switch-off undervoltage

detection voltage on pin V_CC

valid for variants without a V_IOpin

1.3

2.4

3.4

V

V_IO

I_IO

supply voltage on pin V_IO

supply current on pin V_IO

2.95

-

5.25

V

Standby mode

10

80

350

2.6

16.5 A

200 A

1000 A

Normal mode; bus recessive

Normal mode; bus dominant

10

-

V_{uvd(swoff)(VIO)}switch-off undervoltage

detection voltage on pin V_IO

2.4

2.8

V

V_ESD

V_CANH

V_CANL

T_vj

electrostatic discharge voltage IEC 61000-4-2 at pins CANH and CANL

8

-

+8

kV

V

voltage on pin CANH

voltage on pin CANL

limiting value according to IEC60134

42

40

+42

V

virtual junction temperature

+150 C

4. Ordering information

Table 2.

Ordering information

Type number^[1]

Package

Name

SO8

Description

plastic small outline package; 8 leads; body width 3.9 mm

Version

TJA1044T

SOT96-1

TJA1044GT

TJA1044GT/3

TJA1044GTK

HVSON8

plastic thermal enhanced very thin small outline package; no leads;

SOT782-1

TJA1044GTK/3

8 terminals; body 3  3  0.85 mm

[1] TJA1044GT/3 and TJA1044GTK/3 with V_IOpin; all variants other than TJA1044T support CAN FD.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

3 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

5. Block diagram

9

,2

ꢋ

&&

ꢈ

7-$ꢀꢁꢂꢂ

9

&&

7(03(5$785(

3527(&7,21

ꢉꢁꢊ

ꢄ

ꢅ

9

,2

&$1+

&$1/

6/23(

&21752/ꢃ

$1'

ꢁ

7,0(ꢀ287

'5,9(5

7;'

ꢉꢁꢊ

9

,2

02'(

&21752/

ꢇ

ꢂ

67%

5;'

08;

$1'

'5,9(5

ꢉꢁꢊ

9

,2

:$.(ꢀ83

),/7(5

ꢆ

DDDꢀꢁꢂꢃꢄꢅꢅ

*1'

(1) V_IO= V_CCin non-V_IOproduct variants.

Fig 1. Block diagram

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

4 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

6. Pinning information

6.1 Pinning

7-$ꢀꢁꢂꢂ7

7-$ꢀꢁꢂꢂ*7

7-$ꢀꢁꢂꢂ*7ꢃꢄ

ꢁ

ꢆ

ꢈ

ꢂ

ꢇ

ꢄ

ꢅ

ꢋ

ꢁ

ꢆ

ꢈ

ꢂ

ꢇ

ꢄ

ꢅ

ꢋ

7;'

67%

7;'

67%

*1'

&$1+

&$1/

QꢌFꢌ

*1'

&$1+

&$1/

9

&&

5;'

9

,2

ꢁꢅꢆDDDꢃꢇꢂ

DDDꢀꢁꢂꢃꢄꢄꢁ

a. SO8

b. SO8 with V_IO

WHUPLQDOꢃꢁ

LQGH[ꢃDUHD

7-$ꢀꢁꢂꢂ*7.ꢃꢄ

WHUPLQDOꢃꢁ

LQGH[ꢃDUHD

7-$ꢀꢁꢂꢂ*7.

67%

ꢁ

ꢆ

ꢈ

ꢂ

ꢇ

ꢄ

ꢅ

ꢋ

7;'

ꢁ

ꢇ

ꢄ

ꢅ

ꢋ

67%

*1'

&$1+

&$1/

9

,2

*1'

ꢆ

ꢈ

ꢂ

&$1+

9

&&

9

&&

5;'

&$1/

QꢌFꢌ

5;'

DDDꢀꢁꢂꢃꢄꢄꢅ

DDDꢀꢁꢅꢈꢁꢃꢁ

7UDQVSDUHQWꢃWRSꢃYLHZ

c. HVSON8

Fig 2. Pin configuration diagrams

d. HVSON8 with V_IO

6.2 Pin description

Table 3.

Pin description

Pin Description

Symbol

TXD

1

2

3

4

5

6

7

8

transmit data input

GND^[1]

V_CC

ground supply

supply voltage

RXD

n.c.

receive data output; reads out data from the bus lines

not connected; TJA1044T, TJA1044GT and TJA1044GTK only

supply voltage for I/O level adapter; TJA1044x/3 variants only

LOW-level CAN bus line

V_IO

CANL

CANH

STB

HIGH-level CAN bus line

Standby mode control input

[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The

GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is

recommended that the exposed center pad also be soldered to board ground.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

5 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

7. Functional description

7.1 Operating modes

The TJA1044 supports two operating modes, Normal and Standby. The operating mode is

selected via pin STB. See Table 4 for a description of the operating modes under normal

supply conditions.

Table 4.

Mode

Operating modes

Inputs

Outputs

Pin STB

Pin TXD

CAN driver

dominant

recessive

Pin RXD

Normal

LOW

HIGH

LOW

LOW when bus dominant

HIGH when bus recessive

Standby

HIGH

x^[1]

biased to ground follows BUS when wake-up

detected

HIGH when no wake-up detected

[1] ‘x’ = don’t care.

7.1.1 Normal mode

A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit

and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).

The differential receiver converts the analog data on the bus lines into digital data which is

output on pin RXD. The slopes of the output signals on the bus lines are controlled

internally and are optimized in a way that guarantees the lowest possible EME.

7.1.2 Standby mode

A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not

able to transmit or correctly receive data via the bus lines. The transmitter and

Normal-mode receiver blocks are switched off to reduce supply current, and only a

low-power differential receiver monitors the bus lines for activity.

In Standby mode, the bus lines are biased to ground to minimize system supply current.

The low-power receiver is supplied from V_IO(V_CCin non-V_IOvariants) and can detect CAN

bus activity even if V_IOis the only available supply voltage. Pin RXD follows the bus after

a wake-up request has been detected. A transition to Normal mode is triggered when STB

is forced LOW.

7.2 Remote wake-up (via the CAN bus)

The TJA1044 wakes up from Standby mode when a dedicated wake-up pattern (specified

in ISO 11898-2:2016) is detected on the bus. This filtering helps avoid spurious wake-up

events. A spurious wake-up sequence could be triggered by, for example, a dominant

clamped bus or by dominant phases due to noise or spikes on the bus.

The wake-up pattern consists of:

• a dominant phase of at least t_wake(busdom)followed by

• a recessive phase of at least t_wake(busrec)followed by

• a dominant phase of at least t_wake(busdom)

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

6 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Dominant or recessive bits between the above mentioned phases that are shorter than

_wake(busdom)and t_wake(busrec)respectively are ignored.

t

The complete dominant-recessive-dominant pattern must be received within t_to(wake)busto

be recognized as a valid wake-up pattern (see Figure 3). Otherwise, the internal wake-up

logic is reset. The complete wake-up pattern will then need to be retransmitted to trigger a

wake-up event. Pin RXD remains HIGH until the wake-up event has been triggered.

After a wake-up sequence has been detected, the TJA1044 will remain in Standby mode

with the bus signals reflected on RXD. Note that dominant or recessive phases lasting

less than t_{fltr(wake)bus}will not be detected by the low-power differential receiver and will not

be reflected on RXD in Standby mode.

A wake-up event is not flagged on RXD if any of the following events occurs while a valid

wake-up pattern is being received:

• The TJA1044 switches to Normal mode

• The complete wake-up pattern was not received within t_to(wake)bus

• A V_CCor V_IOundervoltage is detected (V_CC< V_{uvd(swoff)(VCC)}or V_IO< V_{uvd(swoff)(VIO)}

;

see Section 7.3.3)

&$1+

&$1/

9

2ꢉGLIꢊ

W

WꢃꢍꢃW

W

WꢃꢍꢃW

IOWUꢉZDNHꢊEXV

ZDNHꢉEXVGRPꢊ

ZDNHꢉEXVUHFꢊ

ZDNHꢉEXVGRPꢊ

IOWUꢉZDNHꢊEXV

5;'

ꢃW

WRꢉZDNHꢊEXV

ꢁꢅꢆDDDꢃꢇꢃ

Fig 3. Wake-up timing

7.3 Fail-safe features

7.3.1 TXD dominant time-out function

A 'TXD dominant time-out' timer is started when pin TXD is set LOW. If the LOW state on

this pin persists for longer than t_to(dom)TXD, the transmitter is disabled, releasing the bus

lines to recessive state. This function prevents a hardware and/or software application

failure from driving the bus lines to a permanent dominant state (blocking all network

communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.

The TXD dominant time-out time also defines the minimum possible bit rate of

approximately 25 kbit/s.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

7 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

7.3.2 Internal biasing of TXD and STB input pins

Pins TXD and STB have internal pull-ups to V_CC(V_IOfor variants with a V_IOpin) to ensure

a safe, defined state in case one or both of these pins are left floating. Pull-up currents

flow in these pins in all states; both pins should be held HIGH in Standby mode to

minimize supply current.

7.3.3 Undervoltage detection on pins V_CCand V_IO

If V_CCdrops below the standby undervoltage detection level, V_{uvd(stb)(VCC)}, the transceiver

switches to Standby mode. The logic state of pin STB is ignored until V_CChas recovered.

In versions with a V_IOpin, if V_IOdrops below the switch-off undervoltage detection level

(V_{uvd(swoff)(VIO)}), the transceiver switches off and disengages from the bus (zero load) until

V

_IOhas recovered.

In versions without a V_IOpin, if V_CCdrops below the switch-off undervoltage detection

level (V_{uvd(swoff)(VCC)}), the transceiver switches off and disengages from the bus (zero

load) until V_CChas recovered.

7.3.4 Overtemperature protection

The output drivers are protected against overtemperature conditions. If the virtual junction

temperature exceeds the shutdown junction temperature, T_j(sd), both output drivers are

disabled. When the virtual junction temperature drops below T_j(sd)again, the output

drivers recover once TXD has been reset to HIGH. Including the TXD condition prevents

output driver oscillation due to small variations in temperature.

7.4 V_IOsupply pin (TJA1044x/3 variants)

Pin V_IOshould be connected to the microcontroller supply voltage (see Figure 7). This will

adjust the signal levels of pins TXD, RXD and STB to the I/O levels of the microcontroller.

Pin V_IOalso provides the internal supply voltage for the low-power differential receiver in

the transceiver. For applications running in low-power mode, this allows the bus lines to

be monitored for activity even if there is no supply voltage on pin V_CC

.

For variants of the TJA1044 without a V_IOpin, all circuitry is connected to V_CC(pin 5 is not

bonded). The signal levels of pins TXD, RXD and STB are then compatible with 5 V

microcontrollers. This allows the device to interface with both 3.3 V and 5 V-supplied

microcontrollers, provided the microcontroller I/Os are 5 V tolerant.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

8 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

8. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.

Symbol

Parameter

voltage on pin x^[1]

Conditions

Min

Max

Unit

V

V_x

on pins CANH, CANL

on pin V_CC, V_IO

on any other pin

42

+42

0.3 +7

0.3 V_IO+ 0.3^[3]

V

[2]

[4]

V

V_(CANH-CANL)voltage between pin CANH and

pin CANL

27

+27

V

V_trt

transient voltage

on pins CANH and CANL

pulse 1

100

-

V

pulse 2a

-

75

-

pulse 3a

150

pulse 3b

-

100

[5]

[6]

V_ESD

electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 )

on pins CANH and CANL

8

+8

kV

Human Body Model (HBM); 100 pF, 1.5 k

on pins CANH and CANL

on any other pin

8

4

+8

+4

kV

[7]

[8]

Machine Model (MM); 200 pF, 0.75 H, 10 

on any pin

200 +200

V

Charged Device Model (CDM); field Induced

charge; 4 pF

on corner pins

750 +750

500 +500

V

on any other pin

V

[9]

T_vj

virtual junction temperature

storage temperature

40

55

+150

C

T_stg

[1] The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)

never exceed these values.

[2] Maximum voltage should never exceed 7 V.

[3] V_CC+ 0.3 in the non-V_IOproduct variants TJA1044T/TJA1044GT/TJA1044GTK.

[4] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.

[5] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.

[6] According to AEC-Q100-002.

[7] According to AEC-Q100-003.

[8] According to AEC-Q100-011 Rev-C1. The classification level is C4B.

[9] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: T_vj= T_amb+ P  R_th(vj-a), where R_th(vj-a)is a

fixed value to be used for the calculation of T_vj. The rating for T_vjlimits the allowable combinations of power dissipation (P) and ambient

temperature (T_amb).

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

9 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

9. Thermal characteristics

Table 6.

Thermal characteristics

According to IEC 60747-1.

Symbol Parameter

Conditions

Value

Unit

R_th(vj-a)

thermal resistance from virtual junction SO8 package; in free air

97

K/W

to ambient

HVSON8 package; in free air

[1]

[2]

dual-layer board

four-layer board

91

52

K/W

[1] According to JEDEC JESD51-2, JESD51-3 and JESD51-5 at natural convection on 1s board with thermal via array under the exposed

pad connected to the second copper layer.

[2] According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers

(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer.

10. Static characteristics

Table 7.

Static characteristics

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise;

All voltages are defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply; pin V_CC

V_CC

supply voltage

4.75

3.5

-

5.25

4.3

V

V_{uvd(stb)(VCC)}

standby undervoltage

detection voltage on pin

V_CC

4

V_{uvd(swoff)(VCC)}switch-off undervoltage

detection voltage on pin

V_CC

for variants without a V_IOpin

Standby mode

1.3

2.4

3.4

V

I_CC

supply current

variants without a V_IOpin;

V_TXD= V_CC

-

10

-

15

5

A

variants with a V_IOpin;

V_TXD= V_IO

Normal mode

[3]

recessive; V_TXD= V_IO

2

5

10

mA

dominant; V_TXD= 0 V

20

2

45

80

70

dominant; V_TXD= 0 V;

110

short circuit on bus lines;

3 V V_CANH= V_CANL)  +18 V

[1]

I/O level adapter supply; pin V_IO

V_IO

I_IO

supply voltage on pin V_IO

supply current on pin V_IO

2.95

-

5.25

16.5

V

[3]

Standby mode; V_TXD= V_IO

10

A

Normal mode

[3]

recessive; V_TXD= V_IO

10

-

80

200

1000

2.8

A

V

dominant; V_TXD= 0 V

350

2.6

V_{uvd(swoff)(VIO)}switch-off undervoltage

detection voltage on pin V_IO

for variants with a V_IOpin

2.4

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

10 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise;

All voltages are defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Standby mode control input; pin STB

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

variants with a V_IOpin

variants without a V_IOpin

variants with a V_IOpin

variants without a V_IOpin

0.7V_IO

2

-

V_IO+ 0.3

V_CC+ 0.3

+0.3V_IO

+0.8

V

0.3V_IO

0.3

1

V

[3]

I_IH

I_IL

HIGH-level input current

LOW-level input current

V_STB= V_IO

+1

A

V_STB= 0 V

15

1

CAN transmit data input; pin TXD

V_IH

HIGH-level input voltage

variants with a V_IOpin

variants without a V_IOpin

variants with a V_IOpin

variants without a V_IOpin

0.7V_IO

2

-

V_IO+ 0.3

V_CC+ 0.3

+0.3V_IO

+0.8

V

-

V

V_IL

LOW-level input voltage

0.3V_IO

0.3

5

-

V

-

V

[3]

I_IH

I_IL

HIGH-level input current

LOW-level input current

V_TXD= V_IO

-

+5

A

V_TXD= 0 V; variants with a V_IOpin

260

150

60

V_TXD= 0 V;

70

variants without a V_IOpin

[4]

C_i

input capacitance

-

5

10

pF

CAN receive data output; pin RXD

I_OH

I_OL

HIGH-level output current

LOW-level output current

V_RXD= V_IO^[3] 0.4 V

8

3

1

mA

V_RXD= 0.4 V; bus dominant

1

-

12

Bus lines; pins CANH and CANL

V_O(dom)

dominant output voltage

V_TXD= 0 V; t < t_to(dom)TXD

pin CANH; R_L= 50  to 65 

pin CANL; R_L= 50  to 65 

V_dom(TX)sym= V_CC V_CANH V_CANL

2.75

0.5

3.5

1.5

-

4.5

V

2.25

+400

V

V_dom(TX)sym

V_TXsym

transmitter dominant

voltage symmetry

400

mV

[4]

[5]

transmitter voltage

symmetry

V_TXsym= V_CANH+ V_CANL

_TXD= 250 kHz, 1 MHz and 2.5 MHz;

C_SPLIT= 4.7 nF

;

0.9V_CC

-

1.1V_CC

V

f

V_O(dif)

differential output voltage

dominant; Normal mode;

V_TXD= 0 V; t < t_to(dom)TXD

;

R_L= 50 to 65 

R_L= 45 to 70 

R_L= 2240 

1.5

1.4

1.5

-

3

V

3.3

5

recessive

[3]

Normal mode: V_TXD= V_IO

no load

;

50

-

+50

mV

Standby mode; no load

Normal mode; V_TXD= V_IO^[3]; no load

0.2

2

-

+0.2

3

V

V_O(rec)

recessive output voltage

0.5V_CC

-

Standby mode; no load

0.1

+0.1

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

11 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 7.

Static characteristics …continued

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise;

All voltages are defined with respect to ground. Positive currents flow into the IC.^[2]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_th(RX)dif

differential receiver

threshold voltage

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

Normal mode

Standby mode

0.5

0.4

-

0.9

V

1.15

V_rec(RX)

receiver recessive voltage 12 V  V_CANL +12 V;

12 V  V_CANH +12 V

Normal mode

Standby mode

4

-

0.5

0.4

V

V_dom(RX)

receiver dominant voltage

12 V  V_CANL +12 V;

12 V  V_CANH +12 V

Normal mode

Standby mode

0.9

1.15

50

-

9.0

300

V

V_hys(RX)dif

I_O(sc)dom

differential receiver

hysteresis voltage

12 V  V_CANL +12 V;

mV

12 V  V_CANH +12 V; Normal mode

dominant short-circuit

output current

V_TXD= 0 V; t < t_to(dom)TXD; V_CC= 5 V

pin CANH; V_CANH= 15 V to +40 V

100

40

70

70

-

40

100

+5

mA

pin CANL; V_CANL= 15 V to +40 V

[3]

I_O(sc)rec

I_L

recessive short-circuit

output current

Normal mode; V_TXD= V_IO

;

5

V_CANH= V_CANL= 27 V to +32 V

leakage current

V_CC= V_IO= 0 V or

5

-

+5

A

V_CC= V_IO= shorted to GND via

47 k; V_CANH= V_CANL= 5 V

[4]

R_i

input resistance

2 V  V_CANL +7 V;

2 V  V_CANH +7 V

9

15

-

28

+3

52

20

10

k

%

R_i

input resistance deviation

0 V  V_CANL +5 V;

0 V  V_CANH +5 V

3

19

-

R_i(dif)

C_i(cm)

C_i(dif)

differential input resistance 2 V  V_CANL +7 V;

2 V  V_CANH +7 V

30

-

k

pF

common-mode input

capacitance

differential input

capacitance

-

Temperature detection

T_j(sd)shutdown junction

temperature

[4]

-

185

-

C

[1] Only TJA1044x/3 variants have a V_IOpin; all circuitry is connected to V_CCin the other variants.

[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.

[3] V_IO= V_CCin non-V_IOproduct variants..

[4] Not tested in production; guaranteed by design.

[5] The test circuit used to measure the bus output voltage symmetry (which includes C_SPLIT) is shown in Figure 9.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

12 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

11. Dynamic characteristics

Table 8.

Dynamic characteristics

T_vj= 40 C to +150 C; V_CC= 4.75 V to 5.25 V; V_IO= 2.95 V to 5.25 V^[1]; R_L= 60 ; C_L= 100 pF unless specified otherwise.

All voltages are defined with respect to ground.^[2]

Symbol

Parameter

Conditions

Min Typ Max Unit

Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 8 and Figure 4

t_{d(TXD-busdom)}delay time from TXD to bus dominant

t_{d(TXD-busrec)}delay time from TXD to bus recessive

t_{d(busdom-RXD)}delay time from bus dominant to RXD

t_{d(busrec-RXD)}delay time from bus recessive to RXD

Normal mode

-

65

90

60

65

-

ns

-

t_d(TXDL-RXDL)delay time from TXD LOW to RXD LOW TJA1044T; Normal mode

all other variants; Normal mode

50

230 ns

210 ns

230 ns

210 ns

-

t_d(TXDH-RXDH)delay time from TXD HIGH to RXD HIGH TJA1044T; Normal mode

all other variants; Normal mode

-

t_bit(bus)

t_bit(RXD)

t_rec

transmitted recessive bit width

bit time on pin RXD

TJA1044Gx

[3]

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

TJA1044Gx

435

155

-

530 ns

210 ns

[3]

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

TJA1044Gx

400

120

-

550 ns

220 ns

receiver timing symmetry

t_bit(TXD)= 500 ns

t_bit(TXD)= 200 ns

V_TXD= 0 V; Normal mode

65

45

0.8

7

-

+40 ns

+15 ns

-

t_to(dom)TXD

t_d(stb-norm)

TXD dominant time-out time

3

25

-

6.5

47

ms

s

standby to normal mode delay time

t_wake(busdom)bus dominant wake-up time

Standby mode;

0.5

1.8

variants with a V_IOpin

Standby mode;

variants without a V_IOpin

0.5

0.8

-

3.0

1.8

3.0

6.5

s

ms

t_wake(busrec)

bus recessive wake-up time

Standby mode;

variants with a V_IOpin

-

Standby mode;

variants without a V_IOpin

-

t_to(wake)bus

t_{fltr(wake)bus}

bus wake-up time-out time

bus wake-up filter time

Standby mode

3

Standby mode

variants without a V_IOpin

variants with a V_IOpin

0.5

1

-

3

s

1.8

[1] Only TJA1044x/3 variants have a V_IOpin; all circuitry is connected to V_CCin the other variants.

[2] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.

[3] See Figure 5.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

13 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

+,*+

ꢄꢎꢃꢐ

7;'

ꢈꢎꢃꢐ

/2:

&$1+

&$1/

GRPLQDQW

ꢎꢌꢏꢃ9

9

2ꢉGLIꢊ

ꢎꢌꢋꢃ9

UHFHVVLYH

+,*+

ꢄꢎꢃꢐ

5;'

W

ꢈꢎꢃꢐ

/2:

W

Gꢉ7;'ꢀEXVGRPꢊ

Gꢉ7;'ꢀEXVUHFꢊ

W

GꢉEXVGRPꢀ5;'ꢊ

GꢉEXVUHFꢀ5;'ꢊ

W

Gꢉ7;'+ꢀ5;'+ꢊ

Gꢉ7;'/ꢀ5;'/ꢊ

DDDꢀꢁꢂꢄꢇꢄꢉ

Fig 4. CAN transceiver timing diagram

ꢄꢎꢃꢐ

7;'

ꢈꢎꢃꢐ

ꢋꢃ[ꢃW

ELWꢉ7;'ꢊ

W

ELWꢉ7;'ꢊ

ꢎꢌꢏꢃ9

9

2ꢉGLIꢊ

ꢎꢌꢋꢃ9

W

ELWꢉEXVꢊ

ꢄꢎꢃꢐ

5;'

ꢈꢎꢃꢐ

W

ELWꢉ5;'ꢊ

DDDꢀꢁꢂꢅꢉꢄꢇ

Fig 5. CAN FD timing definitions according to ISO 11898-2:2016

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

14 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

12. Application information

12.1 Application diagram

ꢋꢃ9

%$7

&$1+

&$1/

ꢉꢁꢊ

9

&&

9

&$1+

''

3[[

3\\

7;ꢎ

5;ꢎ

67%

7;'

5;'

0,&52ꢀ

7-$ꢀꢁꢂꢂ

&21752//(5

&$1/

*1'

DDDꢀꢁꢂꢃꢄꢇꢈ

(1) Optional, depends on regulator.

Fig 6. Typical TJA1044 application with a 5 V microcontroller (non-V_IOvariants)

%$7

ꢈꢃ9

ꢋꢃ9

ꢉꢁꢊ

RQꢑRIIꢃFRQWURO

ꢉꢁꢊ

9

,2

&&

9

''

&$1+

3[[

3\\

7;ꢎ

&$1+

&$1/

67%

7;'

0,&52ꢀ

&21752//(5

7-$ꢀꢁꢂꢂ[ꢃꢄ

&$1/

5;'

5;ꢎ

*1'

DDDꢀꢁꢂꢃꢄꢇꢊ

(1) Optional, depends on regulator.

Fig 7. Typical application with a 3 V microcontroller for TJA1044x/3 V_IOvariants

12.2 Application hints

Further information on the application of the TJA1044 can be found in NXP application

hints AH1308 Application Hints - Standalone high-speed CAN transceivers Mantis

TJA1044/TJA1057 and Dual-Mantis TJA1046.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

15 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

13. Test information

ꢒꢋꢃ9

ꢂꢄꢃ)

ꢁꢎꢎꢃQ)

ꢉꢁꢊ

9

,2

&&

7;'

&$1+

5

&

/

7-$ꢀꢁꢂꢂ

ꢅꢎꢃȍ

ꢁꢎꢎꢃS)

5;'

*1'

&$1/

67%

ꢁꢋꢃS)

ꢁꢅꢆDDDꢃꢇꢉ

(1) The V_IOpin is internally connected to pin V_CCin the non-V_IOproduct variants TJA1044(G)T(K).

Fig 8. CAN transceiver timing test circuit

ꢒꢋꢃ9

ꢁꢎꢎꢃQ)

ꢉꢁꢊ

9

,2

&&

ꢋ

ꢈ

7;'

&$1+

ꢁ

ꢄ

ꢅ

ꢈꢎꢃȍ

Iꢃ ꢃꢆꢋꢎꢃN+]ꢓ

ꢁꢃ0+]ꢃRU

ꢆꢌꢋꢃ0+]

7-$ꢀꢁꢂꢂ

&

63/,7

ꢂꢌꢄꢃQ)

&$1/

5;'

ꢂ

ꢆ

*1'

DDDꢀꢁꢂꢃꢇꢉꢁ

(1) The V_IOpin is internally connected to pin V_CCin the non-V_IOproduct variants TJA1044(G)T(K).

Fig 9. Test circuit for measuring transceiver transmitter driver symmetry

13.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for

integrated circuits, and is suitable for use in automotive applications.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

16 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

14. Package outline

62ꢊꢋꢅSODVWLFꢅVPDOOꢅRXWOLQHꢅSDFNDJHꢌꢅꢊꢅOHDGVꢌꢅERG\ꢅZLGWKꢅꢄꢆꢍꢅPPꢅ

627ꢍꢎꢏꢀꢅ

'ꢃ

(ꢃ

$ꢃ

;ꢃ

Fꢃ

\ꢃ

+ꢃ

(ꢃ

Yꢃ 0ꢃ

$ꢃ

=ꢃ

ꢋꢃ

ꢇꢃ

4ꢃ

$ꢃ

ꢆꢃ

$ꢃ

ꢉ$ꢃꢃꢊꢃ

ꢈꢃ

$ꢃ

ꢁꢃ

SLQꢃꢁꢃLQGH[ꢃ

șꢃ

/ꢃ

Sꢃ

/ꢃ

ꢁꢃ

ꢂꢃ

ꢎꢃ

Hꢃ

GHWDLOꢃ;ꢃ

Zꢃ 0ꢃ

Eꢃ

Sꢃ

ꢆꢌꢋꢃ

ꢋꢃPPꢃ

VFDOHꢃ

',0(16,216ꢅꢈLQFKꢅGLPHQVLRQVꢅDUHꢅGHULYHGꢅIURPꢅWKHꢅRULJLQDOꢅPPꢅGLPHQVLRQVꢉꢅ

$ꢅ

ꢈꢀꢉꢅ

ꢈꢇꢉꢅ

81,7ꢅ

$ꢅ

ꢀꢅ

$ꢅ

ꢇꢅ

$ꢅ

ꢄꢅ

Eꢅ

Sꢅ

Fꢅ

'ꢅ

(ꢅ

Hꢅ

+ꢅ

(ꢅ

/ꢅ

Sꢅ

4ꢅ

Yꢅ

Zꢅ

\ꢅ

ꢎꢌꢁꢃ

=ꢅ

șꢃ

PD[ꢆꢅ

ꢎꢌꢆꢋꢃ ꢁꢌꢂꢋꢃ

ꢎꢌꢁꢎꢃ ꢁꢌꢆꢋꢃ

ꢎꢌꢂꢏꢃ ꢎꢌꢆꢋꢃ

ꢎꢌꢈꢅꢃ ꢎꢌꢁꢏꢃ

ꢋꢌꢎꢃ

ꢂꢌꢇꢃ

ꢂꢌꢎꢃ

ꢈꢌꢇꢃ

ꢅꢌꢆꢃ

ꢋꢌꢇꢃ

ꢁꢌꢎꢃ

ꢎꢌꢂꢃ

ꢎꢌꢄꢃ

ꢎꢌꢅꢃ

ꢎꢌꢄꢃ

ꢎꢌꢈꢃ

PPꢃ

ꢁꢌꢆꢄꢃ

ꢎꢌꢎꢋꢃ

ꢁꢌꢎꢋꢃ

ꢎꢌꢎꢂꢁꢃ

ꢎꢌꢆꢋꢃ ꢎꢌꢆꢋꢃ

ꢁꢌꢄꢋꢃ

ꢎꢌꢆꢋꢃ

ꢎꢌꢎꢁꢃ

Rꢃ

ꢇꢃ

Rꢃ

ꢎꢃ

ꢎꢌꢎꢁꢎꢃ ꢎꢌꢎꢋꢄꢃ

ꢎꢌꢎꢎꢂꢃ ꢎꢌꢎꢂꢏꢃ

ꢎꢌꢎꢁꢏꢃ ꢎꢌꢎꢁꢎꢎꢃ ꢎꢌꢆꢎꢃ ꢎꢌꢁꢅꢃ

ꢎꢌꢎꢁꢂꢃ ꢎꢌꢎꢎꢄꢋꢃ ꢎꢌꢁꢏꢃ ꢎꢌꢁꢋꢃ

ꢎꢌꢆꢂꢂꢃ

ꢎꢌꢆꢆꢇꢃ

ꢎꢌꢎꢈꢏꢃ ꢎꢌꢎꢆꢇꢃ

ꢎꢌꢎꢁꢅꢃ ꢎꢌꢎꢆꢂꢃ

ꢎꢌꢎꢆꢇꢃ

ꢎꢌꢎꢁꢆꢃ

LQFKHVꢃ ꢎꢌꢎꢅꢏꢃ

ꢎꢌꢎꢁꢃ ꢎꢌꢎꢁꢃ ꢎꢌꢎꢎꢂꢃ

1RWHVꢅ

ꢁꢌꢃ3ODVWLFꢃRUꢃPHWDOꢃSURWUXVLRQVꢃRIꢃꢎꢌꢁꢋꢃPPꢃꢉꢎꢌꢎꢎꢅꢃLQFKꢊꢃPD[LPXPꢃSHUꢃVLGHꢃDUHꢃQRWꢃLQFOXGHGꢌꢃ

ꢆꢌꢃ3ODVWLFꢃRUꢃPHWDOꢃSURWUXVLRQVꢃRIꢃꢎꢌꢆꢋꢃPPꢃꢉꢎꢌꢎꢁꢃLQFKꢊꢃPD[LPXPꢃSHUꢃVLGHꢃDUHꢃQRWꢃLQFOXGHGꢌꢃꢃ

ꢅ5()(5(1&(6ꢅ

ꢅ-('(&ꢅ ꢅ-(,7$ꢅ

ꢃ06ꢀꢎꢁꢆꢃ

287/,1(ꢅ

9(56,21ꢅ

(8523($1ꢅ

352-(&7,21ꢅ

,668(ꢅ'$7(ꢅ

ꢅ,(&ꢅ

ꢏꢏꢀꢁꢆꢀꢆꢄꢃ

ꢎꢈꢀꢎꢆꢀꢁꢇꢃ

ꢃ627ꢏꢅꢀꢁꢃ

ꢎꢄꢅ(ꢎꢈꢃ

Fig 10. Package outline SOT96-1 (SO8)

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

17 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

+9621ꢊꢋꢅSODVWLFꢅWKHUPDOꢅHQKDQFHGꢅYHU\ꢅWKLQꢅVPDOOꢅRXWOLQHꢅSDFNDJHꢌꢅQRꢅOHDGVꢌꢅ

ꢊꢅWHUPLQDOVꢌꢅERG\ꢅꢄꢅ[ꢅꢄꢅ[ꢅꢁꢆꢊꢐꢅPP

627ꢑꢊꢇꢏꢀ

;

%

$

(

'

$

ꢁ

F

GHWDLOꢃ;

WHUPLQDOꢃꢁꢃ

LQGH[ꢃDUHD

H

ꢁ

&

WHUPLQDOꢃꢁꢃ

LQGH[ꢃDUHD

%

$

Y

Z

&

H

E

\

&

ꢁ

ꢂ

/

.

(

K

ꢇ

ꢋ

'

K

ꢎ

ꢁ

ꢆꢃPP

/

VFDOH

'LPHQVLRQV

ꢉꢁꢊ

8QLW

$

E

F

'

K

(

H

ꢁ

.

Y

Z

\

ꢁ

K

PD[ꢃ ꢁꢌꢎꢎꢃ ꢎꢌꢎꢋꢃ ꢎꢌꢈꢋꢃ

PP QRPꢃ ꢎꢌꢇꢋꢃ ꢎꢌꢎꢈꢃ ꢎꢌꢈꢎꢃ ꢎꢌꢆ ꢈꢌꢎꢎꢃ ꢆꢌꢂꢎꢃ ꢈꢌꢎꢎꢃ ꢁꢌꢅꢎꢃ ꢎꢌꢅꢋ ꢁꢌꢏꢋ ꢎꢌꢈꢎꢃ ꢎꢌꢂꢎꢃ ꢎꢌꢁ ꢎꢌꢎꢋ ꢎꢌꢎꢋ ꢎꢌꢁ

PLQ ꢎꢌꢇꢎ ꢎꢌꢎꢎ ꢎꢌꢆꢋ ꢆꢌꢏꢎ ꢆꢌꢈꢋ ꢆꢌꢏꢎ ꢁꢌꢋꢋ ꢎꢌꢆꢋ ꢎꢌꢈꢋ

ꢈꢌꢁꢎꢃ ꢆꢌꢂꢋꢃ ꢈꢌꢁꢎꢃ ꢁꢌꢅꢋꢃ

ꢎꢌꢈꢋꢃ ꢎꢌꢂꢋꢃ

1RWHꢃ

ꢁꢌꢃ3ODVWLFꢃRUꢃPHWDOꢃSURWUXVLRQVꢃRIꢃꢎꢌꢎꢄꢋꢃPD[LPXPꢃSHUꢃVLGHꢃDUHꢃQRWꢃLQFOXGHGꢌ

VRWꢇꢊꢂꢀꢅBSR

5HIHUHQFHV

2XWOLQHꢃ

YHUVLRQ

(XURSHDQꢃ

SURMHFWLRQ

,VVXHꢃGDWH

,(&

ꢀꢃꢀꢃꢀ

-('(&

-(,7$

ꢀꢃꢀꢃꢀ

ꢎꢏꢀꢎꢇꢀꢆꢋꢃ

ꢎꢏꢀꢎꢇꢀꢆꢇ

627ꢄꢇꢆꢀꢁ

ꢃ

02ꢀꢆꢆꢏ

Fig 11. Package outline SOT782-1 (HVSON8)

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

18 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

15. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

16. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

16.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

16.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

16.3 Wave soldering

Key characteristics in wave soldering are:

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

19 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

16.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 12) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 9 and 10

Table 9.

SnPb eutectic process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

 350

220

< 2.5

235

220

 2.5

220

Table 10. Lead-free process (from J-STD-020D)

Package thickness (mm) Package reflow temperature (C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 12.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

20 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 12. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

21 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

17. Appendix: ISO 11898-2:2016 parameter cross-reference list

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA dominant output characteristics

Single ended voltage on CAN_H

Single ended voltage on CAN_L

Differential voltage on normal bus load

Differential voltage on effective resistance during arbitration

Optional: Differential voltage on extended bus load range

HS-PMA driver symmetry

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(dom)

dominant output voltage

differential output voltage

V_O(dif)

Driver symmetry

V_SYM

V_TXsym

transmitter voltage symmetry

Maximum HS-PMA driver output current

Absolute current on CAN_H

I_{CAN_H}

I_{CAN_L}

I_O(sc)dom

dominant short-circuit output

current

Absolute current on CAN_L

HS-PMA recessive output characteristics, bus biasing active/inactive

Single ended output voltage on CAN_H

Single ended output voltage on CAN_L

Differential output voltage

V_{CAN_H}

V_{CAN_L}

V_Diff

V_O(rec)

recessive output voltage

differential output voltage

TXD dominant time-out time

V_O(dif)

Optional HS-PMA transmit dominant timeout

Transmit dominant timeout, long

t_dom

t_to(dom)TXD

Transmit dominant timeout, short

HS-PMA static receiver input characteristics, bus biasing active/inactive

Recessive state differential input voltage range

Dominant state differential input voltage range

V_Diff

V_th(RX)dif

differential receiver threshold

voltage

V_rec(RX)

receiver recessive voltage

receiver dominant voltage

V_dom(RX)

HS-PMA receiver input resistance (matching)

Differential internal resistance

R_Diff

R_i(dif)

R_i

differential input resistance

input resistance

Single ended internal resistance

R_{CAN_H}

R_{CAN_L}

Matching of internal resistance

HS-PMA implementation loop delay requirement

Loop delay

MR

R_i

input resistance deviation

t_Loop

t_d(TXDH-RXDH)delay time from TXD HIGH to

RXD HIGH

t_d(TXDL-RXDL)

delay time from TXD LOW to RXD

LOW

Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to

2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s

Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,

intended

t_Bit(Bus)

t_bit(bus)

transmitted recessive bit width

Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s

Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s

t_Bit(RXD)

t_bit(RXD)

bit time on pin RXD

t_Rec

t_rec

receiver timing symmetry

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

22 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

Table 11. ISO 11898-2:2016 to NXP data sheet parameter conversion

ISO 11898-2:2016

NXP data sheet

Notation Symbol Parameter

Parameter

HS-PMA maximum ratings of V_{CAN_H}, V_{CAN_L}and V_Diff

Maximum rating V_Diff

V_Diff

V_(CANH-CANL)voltage between pin CANH and

pin CANL

General maximum rating V_{CAN_H}and V_{CAN_L}

V_{CAN_H}

V_{CAN_L}

V_x

voltage on pin x

Optional: Extended maximum rating VCAN_H and VCAN_L

HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered

Leakage current on CAN_H, CAN_L

I_{CAN_H}

I_{CAN_L}

I_L

leakage current

HS-PMA bus biasing control timings

CAN activity filter time, long

CAN activity filter time, short

Wake-up timeout, short

[1]

t_Filter

t_wake(busdom)

bus dominant wake-up time

bus recessive wake-up time

bus wake-up time-out time

[1]

t_wake(busrec)

t_to(wake)bus

t_Wake

Wake-up timeout, long

Timeout for bus inactivity

Bus Bias reaction time

t_Silence

t_Bias

t_to(silence)

bus silence time-out time

t_{d(busact-bias)}

delay time from bus active to bias

[1] t_{fltr(wake)bus}- bus wake-up filter time, in devices with basic wake-up functionality

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

23 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

18. Revision history

Table 12. Revision history

Document ID

TJA1044 v.6.1

Modifications:

Release date

Data sheet status

Change notice

Supersedes

20170824

Product data sheet

-

TJA1044 v.5.1

• Added variants TJA1044GT/3 and TJA1044GTK/3 with V_IOpin that interface directly with 3 V and

5 V microcontrollers.

–

Table 2: added parameters V_{uvd(swoff)(VCC)}, V_IO, I_IO, V_{uvd(swoff)(VIO)}; amended I_CC

Amended Figure 8 and Figure 9; added Figure 7

• No changes to product specifications of existing non-V_IOvariants

• Updated to comply with ISO 11898-2:2016 and SAE J22884-1 through SAE J2284-5 specifications:

–

Table 7: conditions added to parameters R_i, R_iand R_i(dif); values/conditions changed for

parameters I_CC, V_rec(RX), V_dom(RX), I_O(sc)dom

Additional measurement taken at f_TXD= 1 MHz and 2.5 MHz for parameter V_TXsym; see Table 7

and Figure 9

–

Table 8: values/conditions changed for parameter t_{fltr(wake)bus}

Figure 4: thresholds clarified

Figure 5: title changed

• Section 2.1: text of last entry amended

• Table 5, Table note 2 added

• Amended Figure 4 and Figure 6

• Section 12.2: reference updated

TJA1044 v.5.1

TJA1044 v.4

TJA1044 v.3

TJA1044 v.2

TJA1044 v.1

20160523

20150710

20141119

20131030

20130530

Product data sheet

Preliminary data sheet

-

TJA1044 v.4

TJA1044 v.3

TJA1044 v.2

TJA1044 v.1

-

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

24 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

19. Legal information

19.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

19.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

19.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

25 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

19.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Mantis — is a trademark of NXP B.V.

20. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

TJA1044

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 24 August 2017

26 of 27

TJA1044

NXP Semiconductors

High-speed CAN transceiver with Standby mode

21. Contents

1

General description. . . . . . . . . . . . . . . . . . . . . . 1

19.1

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 26

19.2

19.3

19.4

2

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Predictable and fail-safe behavior . . . . . . . . . . 2

Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

TJA1044 CAN FD (applicable to all product

2.1

2.2

2.3

2.4

20

21

Contact information . . . . . . . . . . . . . . . . . . . . 26

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

variants except TJA1044T). . . . . . . . . . . . . . . . 2

3

4

5

Quick reference data . . . . . . . . . . . . . . . . . . . . . 3

Ordering information. . . . . . . . . . . . . . . . . . . . . 3

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 5

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5

7

7.1

7.1.1

7.1.2

7.2

Functional description . . . . . . . . . . . . . . . . . . . 6

Operating modes . . . . . . . . . . . . . . . . . . . . . . . 6

Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6

Remote wake-up (via the CAN bus) . . . . . . . . . 6

Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 7

TXD dominant time-out function. . . . . . . . . . . . 7

Internal biasing of TXD and STB input pins . . . 8

Undervoltage detection on pins V_CCand V_IO. . 8

Overtemperature protection . . . . . . . . . . . . . . . 8

V_IOsupply pin (TJA1044x/3 variants) . . . . . . . . 8

7.3

7.3.1

7.3.2

7.3.3

7.3.4

7.4

8

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9

Thermal characteristics . . . . . . . . . . . . . . . . . 10

Static characteristics. . . . . . . . . . . . . . . . . . . . 10

Dynamic characteristics . . . . . . . . . . . . . . . . . 13

9

10

11

12

12.1

12.2

Application information. . . . . . . . . . . . . . . . . . 15

Application diagram . . . . . . . . . . . . . . . . . . . . 15

Application hints . . . . . . . . . . . . . . . . . . . . . . . 15

13

13.1

14

Test information. . . . . . . . . . . . . . . . . . . . . . . . 16

Quality information . . . . . . . . . . . . . . . . . . . . . 16

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17

Handling information. . . . . . . . . . . . . . . . . . . . 19

15

16

Soldering of SMD packages . . . . . . . . . . . . . . 19

Introduction to soldering . . . . . . . . . . . . . . . . . 19

Wave and reflow soldering . . . . . . . . . . . . . . . 19

Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 19

Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 20

16.1

16.2

16.3

16.4

17

Appendix: ISO 11898-2:2016 parameter

cross-reference list . . . . . . . . . . . . . . . . . . . . . 22

18

19

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 24

Legal information. . . . . . . . . . . . . . . . . . . . . . . 25

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 24 August 2017

Document identifier: TJA1044


型号：	TJA1044GT
厂家：	NXP
描述：	High-speed CAN transceiver with Standby mode 电信光电二极管电信集成电路
文件：	总27页 (文件大小：237K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TJA1044GT [NXP]

相关型号：

TJA1044GT3

TJA1044GTJ

TJA1044GTK

TJA1044GTK/3

TJA1044GTK3

TJA1044T

TJA1044T,118

TJA1044VTK/3

TJA1044VTZ

TJA1048

TJA1048T

TJA1048TK