TSA5523M [NXP]
1.4 GHz I2C-bus controlled multimedia synthesizer; 1.4 GHz的I2C总线控制的多媒体合成
| 型号： | TSA5523M |
| 厂家： | 
NXP |
| 描述： | 1.4 GHz I2C-bus controlled multimedia synthesizer |
| 文件： | 总20页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TSA5523M
1.4 GHz I2C-bus controlled
multimedia synthesizer
1996 Dec 17
Product specification
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
FEATURES
• Complete 1.4 GHz single-chip system
• Adaptive DC/DC converter driver output
• On-board tuning amplifier output
• Varicap drive disable
• Four NPN open-collector output ports (10 mA)
An output is provided to control a Philips mixer/oscillator IC
controlled by bits P7, P5 and P4. Depending on the
reference divider ratio (512, 640 or 1024), the phase
comparator operates at 3.90625, 6.25 or 7.8125 kHz with
a 4 MHz crystal.
• Four bus-controlled bidirectional ports
(NPN open-collector outputs)
• In-lock detector
• 5-step Analog-to-Digital Converter (ADC)
• Mixer/Oscillator (M/O) band-switch output
• 15-bit programmable divider
The lock detector bit FL is set to logic 1 when the loop is
locked and is read on the SDA line (status byte) during a
read operation. The ADC is available for digital AFC
control. The ADC code is read during a read operation on
the I2C-bus. The ADC input is combined with the port P6.
In the test mode, this port is also used as a test output for
• Programmable reference divider ratio
(512, 640 or 1024)
• Programmable charge-pump current (50 or 250 µA)
• I2C-bus format
fref and fdiv/2 (see Table 4). In addition, the circuit includes
a DC/DC converter driver connected to the IDC pin to
control the amplitude of an external oscillator followed by
a voltage rectifier.
– Address plus four data bytes transmission
(write mode)
– Address plus one status byte transmission
(read mode)
The voltage rectifier is used to generate the correct tuning
supply voltage to maintain a constant current into the
tuning amplifier. The DC/DC converter driver can be
disabled by setting the IDC pin to VCC1 in this event the
tuning supply voltage is delivered by a fixed 33 V supply.
– Four independent addresses
• Low power, low radiation.
Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the ports, set the charge-pump current and set the
reference divider ratio. The device has four independent
I2C-bus addresses which can be selected by applying a
specific voltage on the AS input (see Table 3).
GENERAL DESCRIPTION
The device is a single chip PLL frequency synthesizer
designed for TV and VCR tuning systems. The circuit
consists of a divide-by-eight prescaler with its own
preamplifier, a 15-bit programmable divider, a crystal
oscillator and its programmable reference divider, a
phase/frequency detector combined with a charge-pump
which drives the tuning amplifier, including 33 V output.
Three NPN open-collector outputs are provided for band
switching together with five open-collector NPN outputs.
Four of these ports can also be used as input ports
(one ADC and three general purpose I/O ports).
APPLICATIONS
• Multimedia TV tuners and front-ends
• VCR tuners.
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TSA5523M/C1
SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm
SOT266-1
1996 Dec 17
2
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
QUICK REFERENCE DATA
SYMBOL
VCC1
ICC1
fRF
PARAMETER
supply voltage
CONDITIONS
MIN.
4.5
TYP.
MAX.
5.5
UNIT
−
V
supply current
−
22
−
30
1400
+3
+3
+3
−
mA
RF frequency range
RF input voltage level
64
−25
−28
−26
−
MHz
dBm
dBm
dBm
MHz
mA
ViRF
80 to 150 MHz
150 MHz to 1 GHz
1 to 1.4 GHz
−
−
−
fXTAL
INPN
crystal oscillator frequency
4
NPN open-collector output
current
−
10
15
Tamb
Tstg
operating ambient temperature
IC storage temperature
−20
−40
−
−
+85
°C
°C
+150
1996 Dec 17
3
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
BLOCK DIAGRAM
GM47
1996 Dec 17
4
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
PINNING
SYMBOL
PIN
DESCRIPTION
XTAL
AS
1
2
3
4
5
crystal oscillator input
address selection input
serial data input/output
serial clock input
SDA
SCL
P4
Port 4 NPN open-collector
band-switch output
handbook, halfpage
V
P5
6
7
8
Port 5 NPN open-collector
band-switch output
XTAL
AS
20
19
1
2
CC1
RF1
18 RF2
17
P7
Port 7 NPN open-collector
band-switch output
SDA
SCL
P4
3
BS
4
IDC
DC/DC converter control I/O
terminal
16 GND
15 P6
5
TSA5523M
Vtune
CP
P0
9
tuning voltage output
P5
6
10
11
12
13
14
15
NPN open-collector I/O port
P7
P3
7
14
Port 0 NPN open-collector I/O port
Port 1 NPN open-collector I/O port
Port 2 NPN open-collector I/O port
Port 3 NPN open-collector output
IDC
8
13 P2
P1
V
P1
P0
9
12
11
tune
P2
CP
10
P3
P6
Port 6 NPN open-collector
output/ADC input
MGG746
GND
BS
16
17
ground
band-switch output to
mixer/oscillator driver
RF2
RF1
VCC1
18
19
20
RF signal input 2
RF signal input 1
supply voltage (+5 V)
Fig.2 Pin configuration.
1996 Dec 17
5
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
The first bit of the first data byte transmitted indicates
whether frequency data (first bit = 0) or control and ports
data (first bit = 1) will follow. Until an I2C-bus STOP
condition is sent by the controller, additional data bytes
can be entered without the need to re-address the device.
The frequency register is loaded after the 8th clock pulse
of the second Divider Byte (DB2), the control register is
loaded after the 8th clock pulse of the control byte and the
ports register is loaded after the 8th clock pulse of the
Ports Byte (PB).
FUNCTIONAL DESCRIPTION
The device is controlled via the two-wire I2C-bus.
For programming, there is one module address (7 bits)
and the R/W bit for selecting the read or the write mode.
Write mode: R/W = 0 (see Table 1)
After the address transmission (first byte), data bytes can
be sent to the device. Four data bytes are needed to fully
program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
I2C-bus address selection
(address + 4 data bytes).
The module address contains programmable address bits
(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 4) in one system by applying a
specific voltage to the AS input. The relationship between
MA1 and MA0 and the input voltage on the AS input is
given in Table 2.
The device can also be partially programmed providing
that the first data byte following the address is Divider
Byte 1 (DB1) or Control Byte (CB). The meaning of the bits
in the data bytes is given in Table 1.
Table 1 I2C-bus data format
DATA BYTES
Address Byte (ADR)
Divider Byte 1 (DB1)
Divider Byte 2 (DB2)
Control Byte (CB)
Ports Byte (PB)
MSB
1
LSB
0
ACK
A(1)
A(1)
A(1)
A(1)
A(1)
1
0
0
0
MA1
N10
N2
MA0
N9
0
N14
N6
CP
P6
N13
N5
T2
N12
N4
T1
N11
N3
T0
N8
N0
OS
P0
N7
1
N1
RSA
P2
RSB
P1
P7
P5
P4
P3
Note
1. A = Acknowledge.
Table 2 Explanation to Table 1
SYMBOL
DESCRIPTION
MA1 and MA0
N14 to N0
CP
programmable address bits (see Table 3)
programmable divider bits N = N14 × 214 + 213 + ... + N1 × 2 + N0
charge-pump current
CP = 0
50 µA
CP = 1
250 µA
T2, T1 and T0
RSA and RSB
OS
test bits; normal operation; T2 = 0, T1 = 0, T0 = 1 (see Table 4)
reference divider ratio select bits (see Table 5)
tuning amplifier control bit
OS = 0
normal operation; tuning voltage is ON
tuning voltage is OFF (high impedance), IDC output voltage is LOW
NPN open-collector control bits
output n is OFF
OS = 1
P7 to P0
Pn = 0
Pn = 1
output n is ON
1996 Dec 17
6
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
Table 3 Address selection
INPUT VOLTAGE APPLIED TO PIN AS
MA1
MA0
0 V to 0.1VCC1
0
0
1
1
0
1
0
1
open-circuit or 0.2VCC1 to 0.3VCC1
0.4VCC1 to 0.6VCC1
0.9VCC1 to VCC1
Table 4 Test bits
Read mode: R/W = 1 (see Table 7)
Data can be read out of the device by setting the R/W bit
to logic 1. After the slave address has been recognized,
the device generates an acknowledge pulse and the first
data byte (status byte) is transferred on the SDA line
(MSB first). Data is valid on the SDA line during a HIGH
level of the SCL clock signal. A second data byte can be
read out of the device if the processor generates an
acknowledge on the SDA line (master acknowledge).
T2
0
T1
0
T0
1
DEVICE OPERATION
normal mode
0
1
X
charge-pump is OFF
1
1
0
charge-pump is sinking
current
1
1
1
charge-pump is sourcing
current
1
1
0
0
0
1
fref is available on P6 output
fdiv/2 is available on P6 output
End of transmission will occur if no master acknowledge
occurs. The device will then release the data line to allow
the processor to generate a STOP condition. When Ports
P0 to P2 are used as inputs, the corresponding bits must
be logic 0 (high-impedance state). The Power-On Reset
flag (POR) is set to logic 1 at power-on. It is reset when an
end-of-data is detected by the device (end of a read
sequence). Control of the loop is made possible with the
in-lock flag FL (FL = 1) which indicates when the loop is
locked. The bits I2, I1 and I0 represent the status of the I/O
Ports P2, P1 and P0 respectively.
Table 5 Ratio select bits
RSA
RSB
REFERENCE DIVIDER
X
0
1
0
1
1
640
1024
512
Table 6 Band-switch output levels
OUTPUT
A logic 0 indicates a LOW level and a logic 1 indicates a
HIGH level (see threshold level in the “Characteristics”).
A built-in ADC is available on pin P6. This converter can be
used to feed AFC information to the controller from the IF
section of the television. The relationship between bits
A2, A1 and A0 is given in Table 9.
PHILIPS M/O
IC’s BAND
P7
P5
P4
VOLTAGE
ON PIN BS
1
1
0
1
1
0
1
1
0
1
1
1
0.25 V
0.4VCC1
0.8VCC1
VCC1
band A
band B
band C
band C
band C
At power-on, the device is reset as follows: all ports are set
to the high-impedance state, except P4, P5 and P7 which
are set to logic 1. The tuning amplifier is in the
high-impedance state (OS = 1). The POR level is fixed to
3 × VBE (2.1 V typ.). If VCC1 goes below the POR level the
circuit is reset.
all other codes
VCC1
1996 Dec 17
7
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
Table 7 Read data format
BYTE
MSB (1)
LSB
ACK
Address Byte (ADB)
Status Byte (SB)
1
1
0
0
0
MA1
A2
MA0
A1
1
A(2)
POR
FL
I2
I1
I0
A0
−
Notes
1. MSB is transmitted first.
2. A: Acknowledge.
Table 8 Explanation to Table 7
SYMBOL
DESCRIPTION
POR
power-on reset flag (POR = 1 at power-on)
FL
in-lock flag (FL = 1 when the loop is phase-locked)
I2, I1 and I0
A2, A1 and A0
digital levels for I/O ports P2, P1 and P0 respectively
digital outputs of the 5-level ADC
Table 9 Analog-to-digital converter levels; note 1
VOLTAGE APPLIED ON PORT P6
A2
1
A1
0
A0
0.6VCC1 to VCC1
0
1
0
1
0
0.45VCC1 to 0.6VCC1
0.3VCC1 to 0.45VCC1
0.15VCC1 to 0.3VCC1
0 to 0.15VCC1
0
1
0
1
0
0
0
0
Note
1. Accuracy is 0.03VCC1
.
1996 Dec 17
8
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
LIMITING VALUES
In according with the Absolute Maximum Rating System (IEC 134).
SYMBOL
ViRF
PARAMETER
prescaler input voltage
CONDITIONS
MIN.
−0.3
MAX.
VCC1
UNIT
V
V
V
V
VCC1
VoIDC
VoNPN
IoNPN
VoCP
Vo(tune)
VoBS
ViSCL
Vi/oSDA
IoSDA
ViAS
supply voltage (+5 V)
−0.3
−0.3
−0.3
−1
+6
IDC output voltage
VCC1
+16
+15
VCC1
+40
VCC1
+6
NPN open-collector output voltage
NPN open-collector output current
charge-pump output voltage
tuning voltage output
mA
V
−0.3
−0.3
−0.3
−0.3
−0.3
−1
see Fig.3
V
band-switch output voltage
serial clock input voltage
V
V
serial data input/output voltage
data output current
+6
V
+5
mA
V
address selection input voltage
crystal input voltage
−0.3
−0.3
−40
−
VCC1
VCC1
+150
+150
10
ViXTAL
Tstg
V
IC storage temperature
°C
°C
s
Tj(max)
tsc
maximum junction temperature
short-circuit time every pin to VCC1 or GND
−
MGG751
3
handbook, halfpage
I
max
(mA)
2
1
0
0
20
40
60
80
V
(V)
tune
Fig.3 Rating power on Vtune output pin.
1996 Dec 17
9
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling bipolar devices.
Every pin withstands the ESD test in accordance with “MIL-STD-883C category B” (2000 V).
Every pin withstands the EDS test in accordance with Philips Semiconductors Machine Model 0 Ω, 200 pF (200 V).
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
120
K/W
CHARACTERISTICS
VCC1 = 4.5 to 5.5 V; Tamb = −20 to +85 °C; see note 1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
General
VCC1
supply voltage
4.5
−
5.5
V
ICC1
supply current
VCC1 = 5 V
−
22
2.0
30
mA
V
VPORth
power-on reset threshold
voltage
Tamb = 25 °C
slope is −6 mV/°C
1.5
−
Tamb
operating ambient
temperature
−20
−
+85
°C
fiRF
N
RF input frequency
divider ratio
64
−
−
1400
MHz
15-bit frequency word
256
32767
−
XTAL oscillator
fXTAL
frequency range
RXTAL = 25 to 200 Ω
3.2
600
−
4.0
4.48
−
MHz
Ω
ZXTAL
input impedance
f = 4 MHz
1200
110
DLXTAL(p-p)
drive level on pin XTAL
(peak-to-peak value)
series capacitor = 18 pF;
crystal Philips
−
mV
4333 1430 4881
Prescaler
VRFin
input level
VCC1 = 4.5 to 5.5 V;
Tamb = −20 to +85 °C;
see Fig.4
f = 80 to 150 MHz
f = 150 to 1000 MHz
f = 1000 to 1400 MHz
see Fig.5
−25
−28
−26
−
−
−
−
−
+3
+3
+3
−
dBm
dBm
dBm
ZiRF
input impedance
1996 Dec 17
10
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
NPN open-collector outputs P7 to P0; note 2
ILI
leakage current
VCC1 = 5.5 V; Vo = 13.5 V
VCC1 = 5.5 V; Vo = 1.5 V
−
−
−
−
−
−
10
1
µA
µA
V
leakage current P4, P5, P7
VcesatN
output saturation voltage on Isink = 100 µA
0.2
Ports P4, P5 and P7
output saturation voltage
I
sink = 10 mA
−
−
−
0.2
0.2
−
0.4
0.3
10
V
Isink = 2 mA
V
CPn
allowed capacitive loading on VPn = 5.5 V
output pins
nF
Input ports P2, P1 and P0; note 3
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
−
−
−
−
−
1.5
−
V
3
V
Vi = 0 V
−10
−
µA
µA
IIH
VCC1 = 5.5 V; Vo = 13.5 V
−
10
AS input (Address Selection)
IIH
IIL
HIGH level input current
LOW level input current
VIH = VCC1
VIL = 0 V
−
−
−
50
µA
µA
−50
−
SCL and SDA inputs
VIL
VIH
IIH
LOW level input voltage
−
−
−
−
−
−
1.5
5.5
10
10
−
V
HIGH level input voltage
HIGH level input current
3.0
−
V
VIH = 5.5 V; VCC1 = 0 V
VIH = 5.5 V; VCC1 = 5.5 V
VIL = 0 V; VCC1 = 5.5 V
µA
µA
µA
kHz
−
IIL
LOW level input current
clock frequency
−10
−
fCLK
100
400
SDA output (I2C-bus mode)
ILI
leakage current
output voltage
VSDA = 5.5 V
Isink = 3 mA
−
−
−
−
10
µA
VoSDA
0.4
V
BS output (mixer/oscillator IC band selection)
VoBSA
VoBSB
VoBSC
output voltage for band A
output voltage for band B
output voltage for band C
IL = 20 µA
IL = 20 µA
IL = 20 µA
IL = 50 µA
−
0.25
0.5
V
V
V
V
0.36VCC1 0.4VCC1
0.43VCC1
0.9VCC1
−
0.7VCC1
3.1
0.8VCC1
−
IDC output
VIDCoff
voltage to switch-off DC/DC
converter driver
VCC1 − 0.5
−
VCC1
V
IoIDC
Gt
IDC output current
transfer gain
Rext = 100 kΩ
I9 = 100 µA
−10
−
+100
µA
−
1000
−
µA/V
1996 Dec 17
11
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
SYMBOL
Charge-pump output CP
IIH HIGH level input current
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
CP = 1
−
−
250
−
−
−
µA
µA
(absolute value)
IIL
LOW level input current
(absolute value)
CP = 0
50
VoCP
ILIos
output voltage
in-lock; Tamb = 25 °C
−
1.95
+1
V
off-state leakage current
T2 = 0; T1 = 1
−5
+15
nA
Tuning voltage output; Vtune
I9(off) leakage current when
switched-off
output voltage when the loop OS = 0; T2 = 0; T1 = 0;
OS = 1; Vtune = 33 V
−
−
−
10
µA
Vo9
0.3
32.7
V
is closed
T0 = 1; RL = 27 kΩ;
Vtune = 33 V
Ibias
tuning amplifier bias current DC/DC converter loop is
active
70
100
130
30
µA
Vripple(p-p)
acceptable ripple voltage on fripple = 20 Hz to 500 kHz;
−
−
mV
VCC1 (peak-to-peak value)
note 4
Notes
1. When a port is active, the collector voltage must not exceed 6 V.
2. All other ports are switched ON with 10 mA during test.
3. When a port is used as input port, the corresponding bit must be programmed to the high-impedance state.
4. FM deviation is 2 kHz (max).
MGG752
12
handbook, halfpage
P
tot
(dBm)
0
−12
−24
−36
−48
0
0.5
1.0
1.5
f (GHz)
Fig.4 Prescaler typical input sensitivity curve (pin 2).
12
1996 Dec 17
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
1
0.5
2
0.2
5
10
+ j
0.2
0.5
1
2
5
10
0
∞
100 MHz
10
− j
500 MHz
5
0.2
1 GHz
1.3 GHz
2
0.5
MGG753
1
Fig.5 Prescaler Smith chart (S11) of typical input impedance (ZL = 50 Ω; pin 2).
APPLICATION INFORMATION
Crystal oscillator
The crystal oscillator uses a 4.0 MHz crystal in series with
an 18 pF capacitor. The crystal operates in the series
resonance mode. The connection to VCC1 is preferred, but
it can also be connected to GND.
Tuning amplifier
The tuning amplifier is able to drive the varicap voltage
without an external transistor. The Vtune output must be
connected to an external load of 27 kΩ connected to the
tuning voltage supply. Figures 6 and 7 illustrate a possible
loop filter. The component values depend on the oscillator
characteristics and the selected reference frequency.
1996 Dec 17
13
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
27 kΩ
V
tune
10 nF
2.2 nF
100 nF
CP
P0
P1
10 nF
11
12
13
14
15
16
17
18
19
20
10
9
8
7
6
5
4
3
2
1
P0
P1
P2
P3
P6
22 kΩ
V
27 kΩ
tune
33 nF
IDC
P7
P2
BAV99
P3
UHF
220 pF
4.7 nF
2 nF
P5
P6
VHFH
VHFL
SCL
SDA
AS
TSA5523M
P4
GND
BS
1 mH
SCL
SDA
AS
BS
RF
RF2
RF1
1 nF
1 nF
RF
1 mH
56 Ω
V
+5 V
XTAL
CC1
+5 V
200 kΩ
10 nF
33 nF
10 nF
BC847
18 pF
MGG749
4 MHz
Fig.6 Typical application with DC/DC converter.
27 kΩ
V
tune
10 nF
2.2 nF
100 nF
CP
V
P0
P1
11
12
13
14
15
16
17
18
19
20
10
9
8
7
6
5
4
3
2
1
P0
P1
P2
P3
P6
27 kΩ
+33 V
tune
IDC
P7
P2
+5 V
UHF
VHFH
VHFL
SCL
SDA
AS
P3
P5
P6
TSA5523M
P4
GND
BS
SCL
SDA
AS
BS
RF
RF2
RF1
1 nF
1 nF
RF
V
XTAL
CC1
+5 V
10 nF
18 pF
MGG750
4 MHz
Fig.7 Standard application.
14
1996 Dec 17
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
V
20
CC1
V
CC1
3 kΩ
1
XTAL
V
CC1
19
V
CC1
to prescaler
RF1
1 kΩ
2
V
ref
AS
V
CC1
18
AS
RF2
V
CC
1 kΩ
3
SDA
V
V
CC1
17
CC1
TSA5523M
V
V
BS
CC
1 kΩ
4
5
SCL
P4
CC1
16
15
GND
P6
V
V
CC1
CC1
V
CC1
6
P5
×4
V
CC1
14
13
12
11
V
CC1
P3
P2
P1
P0
7
P7
V
CC1
V
V
CC1
CC1
CC1
CC1
8
9
IDC
V
CC1
V
tune
V
V
CC1
CONTROL
V
CC1
V
V
CC1
DOWN
UP
10
CP
MGG748
Fig.8 Input/output pin schematic.
15
1996 Dec 17
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
PACKAGE OUTLINE
SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
SOT266-1
D
E
A
X
c
y
H
v
M
A
E
Z
11
20
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
10o
0o
0.15
0
1.4
1.2
0.32
0.20
0.20
0.13
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.45
0.65
0.45
0.48
0.18
mm
1.5
0.65
1.0
0.2
0.25
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
90-04-05
95-02-25
SOT266-1
1996 Dec 17
16
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
If wave soldering cannot be avoided, the following
conditions must be observed:
SOLDERING
Introduction
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate
solder thieves at the downstream end.
Even with these conditions, only consider wave
soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all SSOP
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
1996 Dec 17
17
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Dec 17
18
Philips Semiconductors
Product specification
1.4 GHz I2C-bus controlled multimedia
synthesizer
TSA5523M
NOTES
1996 Dec 17
19
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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/01/pp20
Date of release: 1996 Dec 17
Document order number: 9397 750 01313
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