TZA3000HL [NXP]
SDH/SONET STM4/OC12 optical receiver; SDH / SONET STM4 / OC12光接收机
| 型号： | TZA3000HL |
| 厂家： | 
NXP |
| 描述： | SDH/SONET STM4/OC12 optical receiver |
| 文件： | 总20页 (文件大小：483K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TZA3000
SDH/SONET STM4/OC12 optical
receiver
1997 Oct 17
Objective specification
File under Integrated Circuits, IC19
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
FEATURES
APPLICATIONS
• Low equivalent input noise, typically 3.5 pA/√Hz
• Wide dynamic range, typically 1 µA to 1.5 mA
• Digital fibre optic receiver in short, medium and long
haul optical telecommunications transmission systems
or in high speed data networks
• On-chip low-pass filter. The bandwidth can be varied
between 370 and 600 MHz using an external resistor.
Default value is 470 MHz.
• Wideband RF gain block.
DESCRIPTION
• Differential transimpedance of 1.8 MΩ
• On-chip AGC (Automatic Gain Control)
The TZA3000 optical receiver is a low-noise
transimpedance amplifier with AGC plus a limiting
amplifier designed to be used in SDH/SONET fibre optic
links. The TZA3000 amplifies the current generated by a
photo detector (PIN diode or avalanche photodiode) and
converts it to a differential output voltage.
• PECL (Positive Emitter-Coupled Logic) or CML
(Current-Mode Logic) compatible data outputs
• LOS (Loss-Of-Signal) detection
• LOS threshold level can be adjusted using a single
external resistor
• On-chip DC offset compensation
• Single supply voltage from 3.0 to 5.5 V
• Bias voltage for PIN diode.
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm
VERSION
TZA3000HL
TZA3000U
LQFP32
SOT401-1
naked die die in waffle pack carriers; die dimensions 1.58 × 1.58 mm
−
1997 Oct 17
2
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
BLOCK DIAGRAM
V
AGC
V
CCA
2
CCD
2
2, 5
31
17, 20
LOS DETECTION
29 LOSTH
TTL
LOSTTL
28
PECL
26 LOS
LOSQ
27
peak detector
2
kΩ
GAIN-
CONTROL
DREF
IPhoto
4
7
CML 18 OUTCML
19 OUTQCML
A1
A2
OUTSEL
15
PECL
22 OUTPECL
PREAMPLIFIER
LIMITING
OUTQPECL
23
AMPLIFIER
DC-OFFSET
COMPENSATION
BIASING
11
TESTING
14
TZA3000
1, 3, 6, 8
9, 30, 32
13, 16, 21
24, 25
10
7
5
MGK881
V
BWC
AGND
RFTEST
DGND
ref
Fig.1 Block diagram.
3
1997 Oct 17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
PINNING
SYMBOL
PIN
TYPE
ground
DESCRIPTION
AGND
VCCA
1
2
3
4
5
6
7
analog ground
supply
ground
analog supply voltage
analog ground
AGND
DREF
VCCA
analog output bias voltage for PIN diode (VCCA); cathode should be connected to this pin
supply
ground
analog supply voltage
analog ground
AGND
IPhoto
analog input current input; connect the anode of PIN diode to this pin; DC bias level is
800 mV, one diode voltage above ground
AGND
AGND
BWC
8
9
ground
ground
analog ground
analog ground
10
analog input bandwidth control pin; default bandwidth is 470 MHz; a resistor should be
connected between Vref (pin 11) and BWC (pin 10) to decrease bandwidth, or
between BWC (pin 10) and AGND to increase bandwidth
Vref
11
12
13
14
15
analog output band gap reference voltage; nominal value approximately 1.2 V
SUB
substrate
ground
substrate pin; to be connected to AGND
digital ground
DGND
RFTEST
OUTSEL
analog input test pin; not used in application; not connected
CMOS input output select pin; when OUTSEL is HIGH, CML data outputs are active and
PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected,
PECL data outputs will then be active and CML data outputs disabled
DGND
16
17
18
19
20
21
22
23
24
25
26
ground
digital ground
VCCD
supply
digital supply voltage
OUTCML
OUTQCML
VCCD
CML output
CML output
supply
CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7)
CML compliment of OUTCML (pin 18)
digital supply voltage
DGND
ground
digital ground
OUTPECL
OUTQPECL
DGND
PECL output PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7)
PECL output PECL compliment of OUTPECL (pin 22)
ground
ground
digital ground
digital ground
DGND
LOS
PECL output PECL-compatible LOS detection pin; LOS output is HIGH when the input signal
is below the user programmable threshold level
LOSQ
27
28
PECL output PECL compliment of LOS
LOSTTL
TTL output
CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the
input signal is below the user programmable threshold level
LOSTH
29
analog I/O
pin for setting input threshold level; nominal DC voltage is VCCA − 1.5 V;
threshold level set by connecting an external resistor between LOSTH and
VCCA or by forcing a current into LOSTH; default value for this resistor is 86 kΩ
AGND
AGC
30
31
ground
analog ground
analog I/O
AGC monitor voltage; the internal AGC circuit can be disabled by applying an
external voltage to this pin
AGND
32
ground
analog ground
1997 Oct 17
4
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
DGND
24
AGND
1
2
3
4
5
6
7
8
V
23 OUTQPECL
22 OUTPECL
21 DGND
CCA
AGND
DREF
TZA3000HL
V
V
CCD
20
19
18
17
CCA
AGND
IPhoto
AGND
OUTQCML
OUTCML
V
CCD
MGK880
Fig.2 Pin configuration.
1997 Oct 17
5
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
CHIP DIMENSIONS AND BONDING PAD LOCATIONS
COORDINATES(1)
COORDINATES(1)
SYMBOL
PAD
SYMBOL
PAD
x
y
x
y
OUTQCML
VCCD
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1398
1398
1398
1398
1398
1398
1283
1143
986
543
683
AGND
1
2
102
102
102
102
102
102
102
102
243
383
523
663
803
943
1100
1257
1398
1398
1251
1111
971
814
674
534
395
254
105
105
105
105
105
105
105
105
263
403
VCCA
DGND
823
AGND
DREF
VCCA
3
OUTPECL
OUTQPECL
DGND
963
4
1103
1243
1400
1400
1400
1400
1400
1400
1400
1400
5
AGND
IPhoto
AGND
AGND
BWC
6
DGND
7
LOS
8
LOSQ
9
LOSTTL
LOSTH
AGND
829
10
11
12
13
14
15
16
17
18
671
Vref
514
SUB
AGC
357
DGND
RFTEST
OUTSEL
DGND
VCCD
AGND
217
Note
1. All coordinates are referenced, in µm, to the bottom
left-hand corner of the die.
OUTCML
32 31
30
29
28
27
26 25
AGND
1
2
3
DGND
24
23
V
OUTQPECL
CCA
AGND
DREF
22
21
20
19
18
17
OUTPECL
DGND
4
5
6
7
8
1.58
mm
TZA3000U
V
V
CCD
CCA
OUTQCML
OUTCML
AGND
IPhoto
AGND
V
CCD
9
10 11 12 13 14
15
16
0
x
0
y
MGK882
1.58 mm
Fig.3 Bonding pad locations: TZA3000U.
6
1997 Oct 17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
FUNCTIONAL DESCRIPTION
Limiting amplifier
The TZA3000 contains five functional blocks:
• Preamplifier input stage
A limiting amplifier boosts the signal up to PECL levels.
The output can be either CML or PECL compatible,
selected by means of pin OUTSEL. When OUTSEL is
HIGH, CML data outputs are active and PECL data
outputs are disabled. If OUTSEL is left unconnected, it is
pulled LOW and PECL data outputs are active while CML
data outputs are disabled.
• Low-pass filter
• Limiting amplifier stage
• Offset compensation loop
• Loss-of-signal detection unit.
Offset cancellation loop
Preamplifier
A control loop connected between the limiting amplifier
output and the differential amplifier input cancels the DC
offset. The loop bandwidth is fixed internally at 30 kHz.
The preamplifier provides low-noise amplification of the
current generated by a photodiode connected to the
IPhoto pin.
A differential amplifier converts the output of the
preamplifier to a differential voltage. An AGC loop
increases the dynamic range of the receiver by reducing
the feedback resistance of the preamplifier. The AGC loop
hold capacitor is integrated on-chip, so an external
capacitor is not needed for AGC. The AGC voltage can be
monitored at pin 31. This pin can be left unconnected for
normal operation. It can also be used to force an external
AGC voltage. If pin 31 (AGC) is connected to AGND, the
internal AGC loop is disabled and the receiver gain is at a
maximum. In this case, the maximum input current is about
50 µA.
Loss-of-signal detection (LOS)
The LOS section detects an input signal level below a fixed
threshold. The threshold is determined by the current
through pin LOSTH. If this current is increased, the
threshold level will rise. An external resistor between
LOSTH and VCCA can be used, or a current can be forced
into LOSTH. The default value for the external resistor is
86 kΩ. In this case, the current through LOSTH will be
approximately 17.4 µA since the voltage at pin LOSTH is
regulated at 1.5 V below the supply voltage. This threshold
corresponds to an input current of 0.96 µA. The ratio of
LOSTH current to input current is thus approximately
18 : 1. When the input signal level falls below this
threshold, the LOS (PECL compatible) and LOSTTL (TTL
compatible) outputs go HIGH. The hysteresis is fixed
internally at 3 dB. Response time is typically less than
20 µs.
Low-pass filter
A low-pass filter controls the bandwidth of the receiver,
which can be varied between 300 and 600 MHz.
The bandwidth is set to 470 MHz by default. It can be
decreased by connecting a resistor between BWC (pin 10)
and Vref (pin 11) or increased by connecting a resistor
between BWC and AGND.
1997 Oct 17
7
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCC
Vn
PARAMETER
MIN.
−0.5
MAX.
+6
UNIT
supply voltage
DC voltage
V
pin 7: IPhoto
pin 14: RFTEST
−0.5
−0.5
+1
V
V
V
V
V
V
V
V
V
V
V
VCC + 0.5
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ
V
CC − 2
CC − 2
VCC + 0.5
VCC + 0.5
pins 18 and 19: OUTCML and OUTQCML
pin 29: LOSTH
pin 10: BWC
V
−0.5
−0.5
−0.5
−0.5
−0.5
−0.5
−0.5
VCC + 0.5
+3.2
pin 31: AGC
VCC + 0.5
pin 11: Vref
+3.2
pin 4: DREF
V
V
V
CC + 0.5
pin 15: OUTSEL
pin 28: LOSTTL
DC current
CC + 0.5
CC + 0.5
In
pin 7: IPhoto
−1
−2
+2.5
+2
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mW
°C
pin 14: RFTEST
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ −25
+10
+15
+2
pins 18,19: OUTCML and OUTQCML
pin 29: LOSTH
−15
−2
pin 10: BWC
−1
+1
pin 31: AGC
−0.2
−2
+0.2
+2.5
+2.5
+0.5
+16
600
+150
150
+85
pin 11: Vref
pin 4: DREF
−2.5
−0.5
−16
−
pin 15: OUTSEL
pin 28: LOSTTL
Ptot
Tstg
Tj
total power dissipation
storage temperature
junction temperature
ambient temperature
−65
−
°C
Tamb
−40
°C
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
VALUE
tbf
UNIT
K/W
K/W
Rth(j-s)
Rth(j-a)
thermal resistance from junction to solder point
thermal resistance from junction to ambient
tbf
1997 Oct 17
8
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
CHARACTERISTICS
For typical values Tamb = 25 °C and VCC = 5 V; minimum and maximum values are valid over the entire ambient
temperature range and process spread.
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
ICCD
3
5
5.5
28
−
V
digital supply current
note 1
13
−
20
47
17
36
−
mA
mA
mA
mA
mW
°C
note 2
note 3
11
24
−
24
51
ICCA
Ptot
Tj
analog supply current
total power dissipation
junction temperature
ambient temperature
525
+110
+85
−
−40
−40
−
−
Tamb
Rtr
+25
°C
small-signal transresistance
of the receiver
measured differentially at
PECL outputs
1800
kΩ
measured differentially at
CML outputs
−
−
1100
470
−
−
kΩ
f−3dB(h)
f−3dB(l)
high frequency −3dB point
low frequency −3dB point
pin BWC left
MHz
unconnected; note 4
20
30
40
kHz
µA
Ii(IPhoto)(p-p) input current on pin IPhoto
(peak-to-peak value)
VCC = 5 V
−400
−400
720
+4
+1500
+500
970
VCC = 3.3 V
+4
µA
Vbias(IPhoto) input bias voltage on pin
IPhoto
800
mV
In(tot)
total integrated RMS noise
current over bandwidth
(referenced to input)
Ci = 1.2 pF; note 5
∆f = 311 MHz
∆f = 450 MHz
∆f = 622 MHz
−
−
−
55
−
−
−
nA
nA
nA
80
120
PSRR
power supply rejection ratio
at VCC
measured differentially;
note 6
f = 100 kHz to 10 MHz
f = 10 MHz to 100 MHz
f = 100 MHz to 1 GHz
−
−
−
−
1
2
5
1
2
µA/V
µA/V
µA/V
dB/ms
5
100
−
∆Rtr/∆t
AGC loop constant
PECL outputs: OUTPECL and OUTQPECL
VOL
VOH
VOO
LOW-level output voltage
HIGH-level output voltage
50 Ω to VCC − 2 V
50 Ω to VCC − 2 V
V
CC − 1100
CC − 1840
−
−
−
V
V
CC − 900
mV
V
CC − 1620 mV
differential output offset
voltage
−10
+10
mV
tr
tf
rise time
fall time
20% to 80%
80% to 20%
−
−
200
140
300
250
ps
ps
1997 Oct 17
9
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PECL outputs: LOS and LOSQ
VOL
VOH
VOO
LOW-level output voltage
HIGH-level output voltage
50 Ω to VCC − 2 V
50 Ω to VCC − 2 V
V
CC − 1100
CC − 1840
−
−
−
V
V
CC − 900
mV
V
CC − 1620 mV
differential output offset
voltage
−10
+10
mV
tr
tf
rise time
fall time
20% to 80%
80% to 20%
−
−
−
−
600
200
ns
ns
CML outputs: OUTCML and OUTQCML
VO
single ended output voltage
50 Ω to VCC
50 Ω to VCC
V
CC − 260
−
VCC
260
mV
mV
Vo(se)(p-p)
single-ended output voltage
(peak-to-peak value)
150
200
VOO
Ro
tr
differential output offset
voltage
50 Ω to VCC
−10
80
−
−
+10
120
−
mV
Ω
single ended output
resistance
100
92
rise time
20% to 80%;
50 Ω, 1 pF load
ps
ps
tf
fall time
80% to 20%;
−
62
−
50 Ω, 1 pF load
CMOS input: OUTSEL
VIL
VIH
LOW-level input voltage
HIGH-level input voltage
−
0.4
0.8
V
V
V
CC − 1
VCC − 0.5
−
CMOS output: LOSTTL
VOL
VOH
LOW-level output voltage
HIGH-level output voltage
0
−
−
0.2
V
V
V
CC − 0.2
VCC
Notes
1. OUTPECL, OUTQPECL, OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. OUTPECL and
OUTQPECL outputs are active.
2. OUTPECL and OUTQPECL outputs are terminated with 50 Ω to VT. VT is an external termination voltage for PECL
outputs and is 2 V below the supply voltage. OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected
3. OUTCML and OUTQCML outputs are terminated with 50 Ω to VCCD; CML outputs are active. OUTPECL,
OUTQPECL, LOS and LOSQ outputs are left unconnected
4. The bandwidth is set to 470 MHz by default. It can be varied between 300 and 600 MHz by adjusting the voltage at
pin BWC.
5. All In(tot) measurements were made with an input capacitance of Ci = 1.2 pF. This was comprised of 0.7 pF for the
photodiode itself, with 0.3 pF allowed for the PCB layout and 0.2 pF intrinsic to the package.
6. PSRR is defined as the ratio of the equivalent current change at the input (∆IIPhoto) to a change in supply voltage:
∆IIPhoto
PSRR =
--------------------
∆VCC
For example, a 1 mV disturbance on VCC at 10 MHz will typically generate the equivalent of 2 nA extra photodiode
current.
1997 Oct 17
10
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
APPLICATION INFORMATION
V
CC
680 nF
10 µH
10 µH
22 nF
22 nF
86 kΩ
2
2
V
V
LOSTH
CCA
CCD
2, 5
29
17, 20
LOSQ
LOS
27
26
28
LOSTTL
R1
R1
DREF
IPhoto
Z
Z
= 50 Ω
= 50 Ω
o
o
4
7
OUTQPECL
OUTPECL
23
22
TZA3000
OUTQCML
OUTCML
19
18
R2
R2
1, 3, 6, 8
9, 30, 32
13, 16, 21
24, 25
31
10
14
11
15
AGND AGC BWC RFTEST
7
V
OUTSEL
DGND
ref
MGK883
5
Fig.4 Application diagram: PECL data outputs active.
V
CC
680 nF
10 µH
10 µH
22 nF
22 nF
86 kΩ
2
2
V
V
LOSTH
CCA
CCD
2, 5
29
17, 20
LOSQ
LOS
27
26
28
LOSTTL
DREF
IPhoto
4
7
OUTQPECL
OUTPECL
23
22
TZA3000
50
Ω
50
Ω
Z
= 50 Ω
o
OUTQCML
OUTCML
19
18
1, 3, 6, 8
9, 30, 32
13, 16, 21
24, 25
31
10
14
11
15
Z
= 50 Ω
o
AGND AGC BWC RFTEST
7
V
OUTSEL
DGND
ref
MGK884
5
Fig.5 Application diagram: CML data outputs active.
11
1997 Oct 17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
CML/PECL OUTPUT
V
CC
V
O(max)
V
OQH
V
OH
V
o (p-p)
V
OQL
V
OO
V
OL
V
O(min)
MGK885
Fig.6 Logic level symbol definitions for CML and PECL.
V
V
CC
CC
105 Ω
105 Ω
100 Ω
100 Ω
OUTQCML
OUTCML
OUTPECL
OUTQPECL
0.5 mA
9 mA
0.5 mA
6 mA
MGK886
a. CML.
b. PECL.
Fig.7 Output circuits.
12
1997 Oct 17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
PECL outputs: OUTPECL (22), OUTQPECL (23), LOS (26) and LOSQ (27)
V
= 3.3 V
CC
R1 = 127 Ω
R1 = 127 Ω
V
OQ
V
IQ
V
I
V
O
R2 = 82.5 Ω
R2 = 82.5 Ω
GND
V
= 5 V
CC
R1 = 83.3 Ω
R1 = 83.3 Ω
V
OQ
V
IQ
V
I
V
O
R2 = 125 Ω
R2 = 125 Ω
GND
MGK887
Fig.8 PECL termination schemes.
13
1997 Oct 17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
100 Ω, an 8 mA tail current would be needed to generate
the same voltage swing. This would increase power
dissipation by 33%.
CML outputs: OUTCML (18) and OUTQCML (19)
The output impedance of the CML output driver is 100 Ω
(see Figs 7 and 9), which doesn’t match the characteristic
impedance of the strip line. While this means that the
reflections of some incident edges will arrive at the driver
output on the PCB, this value was selected to reduce
power dissipation inside the IC. The parallel combination
of 100 Ω and 50 Ω (33 Ω) will generate a signal swing of
200 mV peak-to-peak (single sided) with a tail current of
6 mA. If the output impedance was 50 Ω rather than
If necessary, the output impedance of the generator can
be matched to the line impedance by connecting an
external 100 Ω resistor in parallel with the output as shown
in Fig.10. The magnitude of the output voltage swing will
not change due to adaptive regulation. However, power
dissipation will increase by 33%.
generator
inside TZA3000
interconnect
PCB
receiver
inside TZA3004
V
CC
V
CC
100 100
Z
Z
= 50 Ω
o
o
Ω
Ω
50 Ω
50 Ω
V
V
I
O
= 50 Ω
V
V
IQ
OQ
MGK888
Fig.9 CML interface circuit without matched impedance; low power dissipation.
generator
inside TZA3000
interconnect
PCB
receiver
inside TZA3004
V
CC
V
CC
100 100
Ω
Ω
100 100
Z
Z
= 50 Ω
= 50 Ω
o
o
Ω
Ω
50 Ω
50 Ω
V
V
I
O
V
V
IQ
OQ
MGK889
Fig.10 CML interface circuit with matched impedance; higher power dissipation.
14
1997 Oct 17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
PACKAGE OUTLINE
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c
y
X
A
E
17
24
Z
16
25
E
e
A
H
2
E
A
(A )
3
A
1
w M
p
θ
pin 1 index
b
L
p
32
9
L
1
8
detail X
Z
v M
D
A
e
w M
b
p
D
B
H
v M
B
D
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.15 1.5
0.05 1.3
0.27 0.18 5.1
0.17 0.12 4.9
5.1
4.9
7.15 7.15
6.85 6.85
0.75
0.45
0.95 0.95
0.55 0.55
mm
1.60
0.25
0.5
1.0
0.2 0.12 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-12-19
97-08-04
SOT401-1
1997 Oct 17
15
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
If wave soldering cannot be avoided, the following
conditions must be observed:
SOLDERING
Introduction
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all LQFP
packages.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
1997 Oct 17
16
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Oct 17
17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
NOTES
1997 Oct 17
18
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
NOTES
1997 Oct 17
19
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© Philips Electronics N.V. 1997
SCA55
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands
427027/300/01/pp20
Date of release: 1997 Oct 17
Document order number: 9397 750 01679
相关型号：
TZA3001BHL/C4
IC SPECIALTY INTERFACE CIRCUIT, PQFP32, PLASTIC, SOT-401, LQFP-32, Interface IC:Other
NXP
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