UAA2080HB-T [NXP]
IC TELECOM, PAGING RECEIVER, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32, Paging Circuit;
| 型号： | UAA2080HB-T |
| 厂家： | 
NXP |
| 描述： | IC TELECOM, PAGING RECEIVER, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32, Paging Circuit 电信 寻呼；传讯 电信集成电路 |
| 文件： | 总46页 (文件大小：578K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
UAA2080
Advanced pager receiver
1996 Jan 15
Product specification
Supersedes data of 1995 Nov 27
File under Integrated Circuits, IC03
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
FEATURES
GENERAL DESCRIPTION
• Wide frequency range: VHF, UHF and 900 MHz bands
• High sensitivity
The UAA2080 is a high-performance low-power radio
receiver circuit primarily intended for VHF, UHF and
900 MHz pager receivers for wide area digital paging
systems, employing direct FM non-return-to-zero (NRZ)
frequency shift keying (FSK).
• High dynamic range
• Electronically adjustable filters on chip
• Suitable for data rates up to 2400 bits/s
• Wide frequency offset and deviation range
• Fully POCSAG compatible FSK receiver
• Power on/off mode selectable by the chip enable input
• Low supply voltage; low power consumption
• High integration level
The receiver design is based on the direct conversion
principle where the input signal is mixed directly down to
the baseband by a local oscillator on the signal frequency.
Two complete signal paths with signals of 90° phase
difference are required to demodulate the signal.
All channel selectivity is provided by the built-in IF filters.
The circuit makes extensive use of on-chip capacitors to
minimize the number of external components.
• Interfaces directly to the PCA5000A, PCF5001 and
PCD5003 POCSAG decoders.
The UAA2080 was designed to operate together with the
PCA5000A, PCF5001 or PCD5003 POCSAG decoders,
which contain a digital input filter for optimum call success
rate.
APPLICATIONS
• Wide area paging
• On-site paging
• Telemetry
• RF security systems
• Low bit-rate wireless data links.
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
UAA2080H
UAA2080T
UAA2080U
LQFP32
SO28
plastic low profile quad flat package; 32 leads; body 7 × 7 × 1.4 mm
plastic small outline package; 28 leads; body width 7.5 mm
naked die; see Fig.9
SOT358-1
SOT136-1
28 pads
1996 Jan 15
2
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
QUICK REFERENCE DATA
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
1.9
TYP.
MAX. UNIT
VP
2.05
2.7
−
3.5
3.2
3
V
IP
supply current
2.3
mA
µA
IP(off)
Pi(ref)
stand-by current
RF input sensitivity
−
BER ≤ 3⁄100; ±4 kHz deviation;
data rate 1200 bits/s; Tamb = 25 °C
fi(RF) = 173 MHz
−
−
−
−
−126.5 −123.5 dBm
−124.5 −121.5 dBm
−120.0 −114.0 dBm
−115.0 −110.0 dBm
fi(RF) = 470 MHz
fi(RF) = 930 MHz
Pi(mix)
mixer input sensitivity
BER ≤ 3⁄100; fi(RF) = 470 MHz;
±4 kHz deviation;
data rate 1200 bits/s; Tamb = 25 °C
Vth
detection threshold for battery
LOW indicator
1.95
2.05
2.15
+70
V
Tamb
operating ambient temperature
−10
−
°C
1996 Jan 15
3
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
BLOCK AND TEST DIAGRAMS (173 MHz)
LM7C0
n d b o o a g e w i d t h
1996 Jan 15
4
V
C18
1 nF
R5
1.8 kΩ
P
C15
27
pF
L8
27
nH
C13
10 µF
R3
1.5 kΩ
L6
R7
C14
1 nF
C 19
1 nF
C16
13 to
50 pF
100 Ω
L9
560 nH
L7
XTAL
C17
BLI
DO
RE
33 nH 33 nH
R2
decoder
R 4
2.2 kΩ
TDC
20
C12
5 to 20 pF
47 kΩ
16
15 pF
TS
25
GND3
22
28
27
26
24
23
21
19
18
17
15
BAND GAP
REFERENCE
CRYSTAL
OSCILLATOR
FREQUENCY
MULTIPLIER
BATTERY
LOW
INDICATOR
V
V
UAA2080T
UAA2080U
ref
V
P
low noise
amplifier
Q
P
GYRATOR
ACTIVE
LIMITER
DEMODULATOR
Q
FILTER
FILTER
GYRATOR
FILTER
ACTIVE
FILTER
LIMITER
I
low noise
amplifier
I
RF pre-amplifier
MIXER I
10 11
MIXER Q
1
2
3
4
5
6
7
8
9
12
L4
13
14
TPI
TPQ
GND2
C3
10 pF
8.2 pF
10 pF
C10 C11
330
Ω
L3
22 nH
L2
22 nH
150
nH
R1
C5 1 nF
GND1
L5
150
nH
IF testpoints
5 to 20 pF
C7
C8
C9
8.2 pF
C6
5 to 20 pF
L1
43 nH
C1
8.2 pF
C2
8.2 pF
C4 1 nF
MLC701
V
V
8.2 pF
i(RF)
P
ahdnbok,uflapegwidt
Fig.2 Block, test and application diagram drawn for SO28 and naked die; fi(RF) = 172.941 MHz.
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
Table 1 Tolerances of components shown in Figs 1 and 2 (notes 1 and 2)
TOLERANCE
COMPONENT
(%)
REMARK
Inductances
L1
±5
Qmin = 100 at 173 MHz
L2, L3, L6, L7
±20
±10
±20
±10
Qmin = 50 at 173 MHz; TC = (+25 to +125) × 10−6/K
L4, L5
L8
Q
Q
min = 30 at 173 MHz; TC = (+25 to +125) × 10−6/K
min = 30 at 173 MHz; TC = (+25 to +125) × 10−6/K
L9
Qmin = 30 at 57 MHz; TC = (+25 to +125) × 10−6/K
Resistors
R1 to R7
±2
TC = +50 × 10−6/K
Capacitors
C1, C2, C7, C8, C9, C15
±5
−
TC = (0 ±30) × 10−6/K; tan δ ≤ 30 × 10−4 at 1 MHz
TC = (−750 ±300) × 10−6/K; tan δ ≤ 50 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 10 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 21 × 10−4 at 1 MHz
C3, C6, C12
C4, C5, C14, C18, C19
±10
±5
±20
−
C10, C11
C13
C16
TC = (−1700 ±500) × 10−6/K; tan δ ≤ 50 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 26 × 10−4 at 1 MHz
C17
±5
Notes
1. Recommended crystal: fXTAL = 57.647 MHz (crystal with 8 pF load), 3rd overtone, pullability >2.75 × 10−6/pF
(change in frequency between series resonance and resonance with 8 pF series capacitor at 25 °C), dynamic
resistance R1 < 40 Ω, ∆f = ±5 × 10−6 for Tamb = −10 to +55 °C with 25 °C reference, calibration plus aging tolerance:
−5 × 10−6 to +15 × 10−6.
2. This crystal recommendation is based on economic aspects and practical experience. Normally the spreads for R1,
pullability and calibration do not show their worst case limits simultaneously in one crystal. In such a rare event, the
tuning range will be reduced to an insufficient level.
1996 Jan 15
6
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
BLOCK AND TEST DIAGRAMS (470 MHz)
LM7C02
a n d l l p a g e w i d t h
1996 Jan 15
7
V
C18
1 nF
R5
1.8 kΩ
P
L8
100
nH
R3
820 Ω
L6
C13
10 µF
C14
1 nF
C 19
1 nF
C15
3 to
10 pF
C16
13 to
50 pF
L9
560 nH
L7
XTAL
C17
BLI
DO
RE
8 nH
8 nH
R2
decoder
R 4
1.2 kΩ
TDC
20
C12
2.5 to 6 pF
47 kΩ
16
15 pF
TS
25
GND3
22
28
27
26
24
23
21
19
18
17
15
BAND GAP
REFERENCE
CRYSTAL
OSCILLATOR
FREQUENCY
MULTIPLIER
BATTERY
LOW
INDICATOR
V
V
ref
UAA2080T
UAA2080U
V
low noise
amplifier
Q
P
P
GYRATOR
FILTER
ACTIVE
FILTER
LIMITER
DEMODULATOR
Q
GYRATOR
FILTER
ACTIVE
FILTER
LIMITER
I
low noise
amplifier
I
RF pre-amplifier
MIXER I
MIXER Q
1
2
3
4
5
6
7
8
9
10 11
22 pF
C10 C11
12
L4
40
nH
13
14
TPI
TPQ
GND2
C3
22 pF
2.7 pF
330
Ω
L3
8 nH
L2
8 nH
R1
C5 1 nF
GND1
L5
40
nH
IF testpoints
2.5 to 6 pF
C7
C8
C9
2.7 pF
C6
2.5 to 6 pF
L1
12.5 nH
C1
2.7 pF
C2
2.7 pF
C4 1 nF
MLC703
V
V
2.7 pF
i(RF)
P
ahdnbok,uflapegwidt
Fig.4 Block, test and application diagram drawn for SO28 and naked die; fi(RF) = 469.95 MHz.
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
LM7C04
a n f u l l p a g e w i d t h
1996 Jan 15
9
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
Table 2 Tolerances of components shown in Figs 3, 4 and 5 (notes 1 and 2)
TOLERANCE
COMPONENT
(%)
REMARK
Inductances
L1, L10
L2, L3, L6, L7
L4, L5
L8
±5
Q
min = 145 at 470 MHz
±20
±10
±10
±10
Qmin = 50 at 470 MHz; TC = (+25 to +125) × 10−6/K
Q
Q
min = 40 at 470 MHz; TC = (+25 to +125) × 10−6/K
min = 30 at 156 MHz; TC = (+25 to +125) × 10−6/K
L9
Qmin = 40 at 78 MHz; TC = (+25 to +125) × 10−6/K
Resistors
R1 to R5
±2
TC = +50 × 10−6/K
Capacitors
C1, C2, C7, C8, C9
±5
−
TC = (0 ±30) × 10−6/K; tan δ ≤ 30 × 10−4 at 1 MHz
TC = (−750 ±300) × 10−6/K; tan δ ≤ 50 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 10 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 21 × 10−4 at 1 MHz
C3, C6, C12, C23
C4, C5, C14, C18 to C22
±10
±5
±20
−
C10, C11
C13
C16
TC = (−1700 ±500) × 10−6/K; tan δ ≤ 50 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 26 × 10−4 at 1 MHz
C17
±5
Notes
1. Recommended crystal: fXTAL = 78.325 MHz (crystal with 8 pF load), 3rd overtone, pullability >2.75 × 10−6/pF
(change in frequency between series resonance and resonance with 8 pF capacitor at 25 °C), dynamic resistance
R1 < 30 Ω, ∆f = ±5 × 10−6 for Tamb = −10 to +55 °C with 25 °C reference, calibration plus aging tolerance:
−5 × 10−6 to +15 × 10−6.
2. This crystal recommendation is based on economic aspects and practical experience. Normally the spreads for R1,
pullability and calibration do not show their worst case limits simultaneously in one crystal. In such a rare event, the
tuning range will be reduced to an insufficient level.
1996 Jan 15
10
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
BLOCK AND TEST DIAGRAM (930 MHz)
LM7C05
o k , f u l l p a g e w i d t h
1996 Jan 15
11
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
Table 3 Tolerances of components shown in Fig.6 (note 1)
TOLERANCE
COMPONENT
(%)
REMARK
Inductances
L1
±10
−
Qtyp = 150 at 930 MHz
microstrip inductor
L2, L3, L6, L7
L4, L5
L8
±5
Qtyp = 100 at 930 MHz
±10
±10
Qtyp = 65 at 310 MHz
L10, L11
Qtyp = 150 at 930 MHz
Resistors
R1 to R4
±2
TC = (0 ±200) × 10−6/K;
Capacitors
C1, C2, C7, C8, C9, C15
C3, C6, C12
±5
−
TC = (0 ±30) × 10−6/K; tan δ ≤ 30 × 10−4 at 1 MHz
TC = (0 ±200) × 10−6/K; tan δ ≤ 30 × 10−4 at 1 MHz
TC = (0 ±30) × 10−6/K; tan δ ≤ 10 × 10−4 at 1 MHz
C4, C5, C14, C19
C13
±10
±20
Note
1. The external oscillator signal Vi(OSC) has a frequency of fOSC = 310.1667 MHz.
1996 Jan 15
12
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
PINNING (LQFP32)
SYMBOL
TS
PIN
DESCRIPTION
1
test switch; connection to ground
for normal operation
BLI
2
3
4
5
6
7
8
9
battery LOW indicator output
data output
handbook, halfpage
DO
RE
receiver enable input
IF test point; I channel
IF test point; Q channel
pre-amplifier RF input 1
pre-amplifier RF input 2
not connected
TPI
1
2
3
4
5
6
7
8
TS
BLI
24
23
22
VO1MUL
n.c.
TPQ
VI1RF
VI2RF
n.c.
DO
RGYR
RE
21 COM
20 GND2
19 VI2MQ
UAA2080H
TPI
RRFA
10 external emitter resistor for
pre-amplifier
TPQ
VI1RF
VI2RF
VI1MQ
n.c.
18
17
GND1
VO2RF
VO1RF
VP
11 ground 1 (0 V)
12 pre-amplifier RF output 2
13 pre-amplifier RF output 1
14 supply voltage
MLC706
VI2MI
VI1MI
n.c.
15 I channel mixer input 2
16 I channel mixer input 1
17 not connected
VI1MQ
VI2MQ
GND2
COM
18 Q channel mixer input 1
19 Q channel mixer input 2
20 ground 2 (0 V)
Fig.7 Pin configuration; LQFP32.
21 gyrator filter resistor; common line
22 gyrator filter resistor
23 not connected
RGYR
n.c.
VO1MUL
VO2MUL
RMUL
24 frequency multiplier output 1
25 frequency multiplier output 2
26 external emitter resistor for
frequency multiplier
TDC
27 DC test point; no external
connection for normal operation
OSC
n.c.
28 oscillator collector
29 not connected
GND3
OSB
OSE
30 ground 3 (0 V)
31 oscillator base; crystal input
32 oscillator emitter
1996 Jan 15
13
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
PINNING (SO28)
SYMBOL PIN
DESCRIPTION
TPI
1
2
3
4
5
IF test point; I channel
IF test point; Q channel
pre-amplifier RF input 1
pre-amplifier RF input 2
TPQ
VI1RF
VI2RF
RRFA
external emitter resistor for
pre-amplifier
TPI
TPQ
1
2
RE
28
GND1
VO2RF
VO1RF
VP
6
7
8
9
ground 1 (0 V)
27 DO
26 BLI
25 TS
24 OSE
pre-amplifier RF output 2
pre-amplifier RF output 1
supply voltage
3
VI1RF
VI2RF
RRFA
GND1
VO2RF
VO1RF
4
VI2MI
VI1MI
VI1MQ
VI2MQ
GND2
COM
10 I channel mixer input 2
11 I channel mixer input 1
12 Q channel mixer input 1
13 Q channel mixer input 2
14 ground 2 (0 V)
5
6
23
OSB
7
22 GND3
UAA2080T
8
21
20
OSC
TDC
V
P
9
15 gyrator filter resistor; common line
16 gyrator filter resistor
VI2MI
VI1MI
10
11
19 RMUL
RGYR
VO1MUL 17 frequency multiplier output 1
VO2MUL 18 frequency multiplier output 2
18 VO2MUL
VI1MQ 12
VI2MQ 13
17
16 RGYR
15
VO1MUL
RMUL
19 external emitter resistor for frequency
multiplier
14
GND2
COM
TDC
20 DC test point; no external connection
for normal operation
MBB972
OSC
GND3
OSB
OSE
TS
21 oscillator collector
22 ground 3 (0 V)
23 oscillator base; crystal input
24 oscillator emitter
25 test switch; connection to ground for
normal operation
BLI
DO
RE
26 battery LOW indicator output
27 data output
Fig.8 Pin configuration; SO28.
28 receiver enable input
1996 Jan 15
14
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
CHIP DIMENSIONS AND BONDING PAD LOCATIONS
See Table 4 for bonding pad description and locations for x/y co-ordinates.
y
24
23
22
21
20
19
25
26
18
17
27
28
16
15
3.83
mm
UAA2080U
14
13
1
2
3
4
12
x
0
0
5
6
7
8
9
10
11
4.74 mm
MLC707
Where:
Pad number 1 (diameter 124 µm)
Pad 124 µm x 124 µm
Pad not used
Pad 100 µm x 100 µm
Pad 100 µm x 100 µm with reference point
Chip area: 18.15 mm2.
Chip thickness: 380 ±20 µm.
Drawing not to scale.
Fig.9 Bonding pad locations.
1996 Jan 15
15
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
Table 4 Bonding pad centre locations (dimensions in µm)
SYMBOL
PAD
DESCRIPTION
x
y
TPI
1
IF test point; I channel
−32
−32
−32
0
1296
1000
360
0
TPQ
2
IF test point; Q channel
VI1RF
VI2RF
RRFA
GND1
VO2RF
VO1RF
VP
3
pre-amplifier RF input 1
4
pre-amplifier RF input 2; note 1
external emitter resistor for pre-amplifier
ground 1 (0 V)
5
472
0
6
1160
1688
2232
2760
3608
4216
4216
4216
4216
4216
4216
4216
4176
3668
2952
2312
1832
1328
432
0
7
pre-amplifier RF output 2
pre-amplifier RF output 1
supply voltage
0
8
0
9
0
VI2MI
VI1MI
VI1MQ
VI2MQ
GND2
COM
RGYR
VO1MUL
VO2MUL
RMUL
TDC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
I channel mixer input 2
0
I channel mixer input 1
0
Q channel mixer input 1
360
960
1360
2024
2496
3136
3456
3458
3456
3456
3456
3456
3456
3456
3136
2512
2152
−186
Q channel mixer input 2
ground 2 (0 V)
gyrator filter resistor; common line
gyrator filter resistor
frequency multiplier output 1
frequency multiplier output 2
external emitter resistor for frequency multiplier
DC test point; no external connection for normal operation
oscillator collector
OSC
GND3
OSB
ground 3 (0 V)
oscillator base; crystal input
oscillator emitter
OSE
TS
test switch; connection to ground for normal operation
battery LOW indicator output
data output
−32
BLI
−32
DO
−32
RE
receiver enable input
−32
lower left corner of chip (typical values)
−278
Note
1. All x/y co-ordinates are referenced to the centre of pad 4 (VI2RF); see Fig.9.
1996 Jan 15
16
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
INTERNAL CIRCUITS
1
32
31
30
29
n.c.
28
27
26
25
5 kΩ
2
24
23
V
P
V
P
5 k Ω
3
4
150 k Ω
n.c.
8.15 kΩ
22
21
1 kΩ
1 kΩ
5
6
UAA2080H
20
19
V
P
V
P
7
8
18
17
V
P
n.c.
150 Ω
n.c.
13 14 15
16
9
10
11
12
MGA788
Fig.10 Internal circuits drawn for LQFP32.
1996 Jan 15
17
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
BM974-1
a n d b o o k , f u l l p a g e w i d t h
1996 Jan 15
18
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
The resonant circuit at output pin OSC selects the second
harmonic of the oscillator frequency. In other applications
a different multiplication factor may be chosen.
FUNCTIONAL DESCRIPTION
The complete circuit consists of the following functional
blocks as shown in Figs 1 to 6.
At 930 MHz an external oscillator circuit is required to
provide sufficient local oscillator signal for the frequency
multiplier.
Radio frequency amplifier
The RF amplifier is an emitter-coupled pair driving a
balanced cascode stage, which drives an external
balanced tuned circuit. Its bias current is set by an external
300 Ω resistor R1 to typically 770 µA. With this bias
current the optimum source resistance is 1.3 kΩ at VHF
and 1.0 kΩ at UHF. At 930 MHz a higher bias current is
required to achieve optimum gain. A value of 120 Ω is
used for R1, which corresponds with a bias current of
approximately 1.3 mA and an optimum source resistance
of approximately 600 Ω.The capacitors C1 and C2
transform a 50 Ω source resistance to this optimum value.
The output drives a tuned circuit with capacitive divider
(C7, C8 and C9) to provide maximum power transfer to the
phase-splitting network and the mixers.
Frequency multiplier
The frequency multiplier is an emitter-coupled pair driving
an external balanced tuned circuit. Its bias current is set by
external resistor R4 to typically 190 µA (173 MHz), 350 µA
(470 MHz) and 1 mA (930 MHz). The oscillator signal is
internally AC coupled to one input of the emitter-coupled
pair while the other input is internally grounded via a
capacitor. The frequency multiplier output signal between
pins VO1MUL and VO2MUL drives the upper switching
stages of the mixers. The bias voltage on pins VO1MUL
and VO2MUL is set by external resistor R3 to allow
sufficient voltage swing at the mixer outputs. The value of
R3 depends on the operating frequency: 1.5 kΩ
(173 MHz), 820 Ω (470 MHz) and 330 Ω (930 MHz).
Mixers
The double balanced mixers consist of common base
input stages and upper switching stages driven from the
frequency multiplier. The 300 Ω input impedance of each
mixer acts together with external components (C10, C11;
L4, L5 respectively) as phase shifter/power splitter to
provide a differential phase shift of 90 degrees between
the I channel and the Q channel. At 930 MHz all external
phase shifter components are inductive (L10, L11; L4, L5).
Low noise amplifiers, active filters and gyrator filters
The low noise amplifiers ensure that the noise of the
following stages does not affect the overall noise figure.
The following active filters before the gyrator filters reduce
the levels of large signals from adjacent channels. Internal
AC couplings block DC offsets from the gyrator filter
inputs.
The gyrator filters implement the transfer function of a 7th
order elliptic filter. Their cut-off frequencies are determined
by the 47 kΩ external resistor R2 between pins RGYR and
COM. The gyrator filter output signals are available on IF
test pins TPI and TPQ.
Oscillator
The oscillator is based on a transistor in common collector
configuration. It is followed by a cascode stage driving a
tuned circuit which provides the signal for the frequency
multiplier. The oscillator bias current (typically 250 µA) is
determined by the 1.8 kΩ external resistor R5.
Limiters
The oscillator frequency is controlled by an external 3rd
overtone crystal in parallel resonance mode. External
capacitors between base and emitter (C17) and from
emitter to ground (C16) make the oscillator transistor
appear as having a negative resistance for small signals;
this causes the oscillator to start. Inductance L9 connected
in parallel with capacitor C16 to the emitter of the oscillator
transistor prevents oscillation at the fundamental
frequency of the crystal.
The gyrator filter output signals are amplified in the limiter
amplifiers to obtain IF signals with removed amplitude
information.
Demodulator
The limiter amplifier output signals are fed to the
demodulator. The demodulator output DO is going LOW or
HIGH depending upon which of the input signals has a
phase lead.
1996 Jan 15
19
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
Battery LOW indicator
Band gap reference
The battery LOW indicator senses the supply voltage and
sets its output HIGH when the supply voltage is less than
Vth (typically 2.05 V). Low battery warning is available at
BLI.
The whole chip can be powered-up and powered-down by
enabling and disabling the band gap reference via the
receiver enable pin RE.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Ground pins GND1, GND2 and GND3 connected together.
SYMBOL
PARAMETER
MIN.
−0.3
MAX.
+8.0
UNIT
VP
supply voltage
V
Ves
electrostatic handling (note 1)
pins VI1RF and VI2RF
pin RRFA
−1500
−500
−2000
−500
−2000
−2000
−55
+2000
+2000
+250
+500
+500
+2000
+125
+70
V
V
V
V
V
V
pins VO1RF and VO2RF
pins VP and OSB
pins OSC and OSE
other pins
Tstg
storage temperature
operating ambient temperature
°C
°C
Tamb
−10
Note
1. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ resistor.
1996 Jan 15
20
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
DC CHARACTERISTICS
VP = 2.05 V; Tamb = −10 to +70 °C (typical values at Tamb = 25 °C); measurements taken in test circuit Figs 1, 2, 3 or 4
with crystal at pin OSB disconnected; unless otherwise specified.
SYMBOL
Supply
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
IP
supply voltage
1.9
2.05
3.5
V
supply current
VRE = HIGH;
2.3
2.7
3.2
mA
fi(RF) = 173 and 470 MHz
VRE = HIGH; fi(RF) = 930 MHz
VRE = LOW
2.9
3.4
3.9
3
mA
IP(off)
stand-by current
−
−
µA
Receiver enable input (pin RE)
VIH
VIL
IIH
HIGH level input voltage
LOW level input voltage
HIGH level input current
LOW level input current
1.4
0
−
−
−
−
VP
V
0.3
20
V
VIH = VP = 3.5 V
VIL = 0 V
−
µA
µA
VIL
0
−1.0
Battery LOW indicator output (pin BLI)
VOH
VOL
Vth
HIGH level output voltage VP < Vth; IBLI = −10 µA
VP − 0.5
−
−
−
V
V
V
LOW level output voltage VP > Vth; IBLI = +10 µA
−
0.5
2.15
voltage threshold for
battery LOW indicator
1.95
2.05
Demodulator output (pin DO)
VOH
VOL
HIGH level output voltage IDO = −10 µA
LOW level output voltage IDO = +10 µA
VP − 0.5
−
−
−
V
V
−
0.5
1996 Jan 15
21
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
AC CHARACTERISTICS (173 MHz)
VP = 2.05 V; Tamb = 25 °C; test circuit Figs 1 or 2; fi(RF) = 172.941 MHz with ±4.0 kHz deviation; 1200 baud pseudo
random bit sequence modulation (tr = 250 ±25 µs measured between 10% and 90% of voltage amplitude) and 20 kHz
channel spacing; unless otherwise specified.
SYMBOL
Radio frequency input
Pi(ref) input sensitivity (Pi(ref) is the
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
BER ≤ 3⁄100; note 1
amb = −10 to +70 °C; note 2
−
−
−
−126.5 −123.5 dBm
maximum available power at
the RF input of the test board)
T
−
−
−120.5 dBm
−117.5 dBm
VP = 1.9 V
Mixers to demodulator
αacs
adjacent channel selectivity
Tamb = 25 °C
69
67
−
72
−
−
dB
Tamb = −10 to +70 °C
−
dB
αci
IF filter channel imbalance
co-channel rejection
spurious immunity
−
2
dB
αc
−
4
7
dB
αsp
αim
αbl
50
55
78
±2.0
±2.5
2.5
60
60
85
−
−
dB
intermodulation immunity
blocking immunity
−
dB
∆f > ±1 MHz; note 3
deviation f = ±4.0 kHz
deviation f = ±4.5 kHz
−
dB
foffset
frequency offset range
(3 dB degradation in sensitivity)
−
kHz
kHz
kHz
−
−
∆fdev
deviation range
−
7.0
(3 dB degradation in sensitivity)
ton
receiver turn-on time
data valid after setting RE input
HIGH; note 4
−
−
5
ms
Notes
1. The bit error rate BER is measured using the test facility shown in Fig.13. Note that the BER test facility contains a
digital input filter equivalent to the one used in the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
2. Capacitor C16 requires re-adjustment to compensate temperature drift.
3. ∆f is the frequency offset between the required signal and the interfering signal.
4. Turn-on time is defined as the time from pin RE going HIGH to the reception of valid data on output pin DO. Turn-on
time is measured using an external oscillator (turn-on time using the internal oscillator is dependent upon the
oscillator circuitry).
1996 Jan 15
22
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
AC CHARACTERISTICS (470 MHz)
VP = 2.05 V; Tamb = 25 °C; test circuit Figs 3 or 4; fi(RF) = 469.950 MHz with ±4.0 kHz deviation; 1200 baud pseudo
random bit sequence modulation (tr = 250 ± 25 µs measured between 10% and 90% of voltage amplitude) and 20 kHz
channel spacing; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Radio frequency input
Pi(ref)
input sensitivity (Pi(ref) is the
maximum available power at
the RF input of the test board)
BER ≤ 3⁄100; note 1
amb = −10 to +70 °C; note 2
−
−
−
−124.5 −121.5 dBm
T
−
−
−118.5 dBm
−115.5 dBm
VP = 1.9 V
Mixer input
Pi(mix)
input sensitivity
BER ≤ 3⁄100; note 3
−
−115.0 −110.0 dBm
Mixers to demodulator
αacs
adjacent channel selectivity
Tamb = 25 °C
67
65
−
70
−
−
dB
Tamb = −10 to +70 °C
−
dB
αci
IF filter channel imbalance
co-channel rejection
spurious immunity
−
2
dB
αc
−
4
7
dB
αsp
αim
αbl
50
55
75
±2.0
±2.5
2.5
60
60
82
−
−
dB
intermodulation immunity
blocking immunity
−
dB
∆f > ±1 MHz; note 4
deviation f = ±4.0 kHz
deviation f = ±4.5 kHz
−
dB
foffset
frequency offset range
(3 dB degradation in sensitivity)
−
kHz
kHz
kHz
−
−
∆fdev
deviation range
−
7.0
(3 dB degradation in sensitivity)
ton
receiver turn-on time
data valid after setting RE input
HIGH; note 5
−
−
5
ms
Notes
1. The bit error rate BER is measured using the test facility shown in Fig.13. Note that the BER test facility contains a
digital input filter equivalent to the one used in the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
2. Capacitor C16 requires re-adjustment to compensate temperature drift.
3. Test circuit Fig.5. Pi(mix) is the maximum available power at the input of the test board. The bit error rate BER is
measured using the test facility shown in Fig.13.
4. ∆f is the frequency offset between the required signal and the interfering signal.
5. Turn-on time is defined as the time from pin RE going HIGH to the reception of valid data on output pin DO. Turn-on
time is measured using an external oscillator (turn-on time using the internal oscillator is dependent upon the
oscillator circuitry).
1996 Jan 15
23
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
AC CHARACTERISTICS (930 MHz)
VP = 2.05 V; Tamb = 25 °C; test circuit Fig.6 (note 1); fi(RF) = 930.500 MHz with ±4.0 kHz deviation; 1200 baud pseudo
random bit sequence modulation (tr = 250 ± 25 µs measured between 10% and 90% of voltage amplitude) and 20 kHz
channel spacing; unless otherwise specified.
SYMBOL
Radio frequency input
Pi(ref) input sensitivity (Pi(ref) is the
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
BER ≤ 3⁄100; note 2
−
−
−120.0 −114.0 dBm
maximum available power at
the RF input of the test board)
VP = 1.9 V
−
−108.0 dBm
Mixers to demodulator
αacs
αc
adjacent channel selectivity
Tamb = 25 °C
60
69
5
−
dB
co-channel rejection
spurious immunity
−
10
−
dB
αsp
αim
αbl
40
60
60
74
−
dB
intermodulation immunity
blocking immunity
53
−
dB
∆f > ±1 MHz; note 3
deviation f = ±4.0 kHz
deviation f = ±4.5 kHz
65
−
dB
foffset
frequency offset range
(3 dB degradation in sensitivity)
±2.0
±2.5
2.5
−
kHz
kHz
kHz
−
−
∆fdev
deviation range
−
7.0
(3 dB degradation in sensitivity)
ton
receiver turn-on time
data valid after setting RE input
HIGH; note 4
−
−
5
ms
Notes
1. The external oscillator signal Vi(OSC) has a frequency of fOSC = 310.1667 MHz and a level of −15 dBm.
2. The bit error rate BER is measured using the test facility shown in Fig.13. Note that the BER test facility contains a
digital input filter equivalent to the one used in the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
3. ∆f is the frequency offset between the required signal and the interfering signal.
4. Turn-on time is defined as the time from pin RE going HIGH to the reception of valid data on output pin DO. Turn-on
time is measured using an external oscillator (turn-on time using the internal oscillator is dependent upon the
oscillator circuitry).
1996 Jan 15
24
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
TEST INFORMATION
Tuning procedure for AC tests
1. Turn on the signal generator: fgen = fi(RF) + 4 kHz, no modulation, Vi(RF) = 1 mV (RMS).
2. Measure the IF with a counter connected to test pin TPI. Tune C16 to set the crystal oscillator to achieve fIF = 4 kHz
Change the generator frequency to fgen = fi(RF) − 4 kHz and check that fIF is also 4 kHz. For a received input
frequency fi(RF) = 172.941 MHz the crystal frequency is fXTAL = 57.647 MHz, while for fi(RF) = 469.950 MHz the
crystal frequency is fXTAL = 78.325 MHz. For a received input frequency fi(RF) = 930.500 MHz an external oscillator
signal must be used with fi(OSC) = 310.1667 MHz and a level of −15 dBm (for definition of crystal frequency, see
Table 1).
3. Set the signal generator to nominal frequency (fi(RF)) and turn on the modulation deviation ±4.0 kHz, 600 Hz square
wave modulation, Vi(RF) = 1 mV (RMS). Note that the RF signal should be reduced in the following tests, as the
receiver is tuned, to ensure Vo(IF) = 10 to 50 mV (p-p) on test pins TPI or TPQ.
4. Tune C15 (oscillator output circuit) and C12 (frequency multiplier output) to obtain a peak audio voltage on pin TPI.
5. Tune C3 and C6 (RF input and mixer input) to obtain a peak audio voltage on pin TPI. When testing the mixer input
sensitivity tune C23 instead of C3 and C6 (test circuit Fig.5).
6. Check that the output signal on pin TPQ is within 3 dB in amplitude and at 90° (±20°) relative phase of the signal on
pin TPI.
7. Check that data signal appears on output pin DO and proceed with the AC test.
AC test conditions
Table 5 Definitions for AC test conditions (see Table 6)
SIGNAL
DESCRIPTION
Modulated test signal 1
Frequency 172.941, 469.950 or 930.500 MHz
Deviation
Modulation 1200 baud pseudo random bit sequence
Rise time 250 ±25 µs (between 10% and 90% of final value)
Modulated test signal 2
Deviation ±2.4 kHz
±4.0 kHz
Modulation 400 Hz sinewave
Other definitions
f1
frequency of signal generator 1
f2
frequency of signal generator 2
frequency of signal generator 3
channel spacing (20 kHz)
f3
∆fcs
P1
P2
P3
Pi(ref)
maximum available power from signal generator 1 at the test board input
maximum available power from signal generator 2 at the test board input
maximum available power from signal generator 3 at the test board input
maximum available power at the test board input to give a Bit Error Rate (BER) ≤ 3⁄100 for the modulated
test signal 1, in the absence of interfering signals and under the conditions as specified in Chapters
“AC characteristics (173 MHz)”, “AC characteristics (470 MHz)” and “AC characteristics (930 MHz)”
1996 Jan 15
25
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
Table 6 AC test conditions (notes 1 and 2)
SYMBOL
PARAMETER
CONDITIONS
TEST SIGNALS
αa
adjacent channel selectivity;
Fig.12(b)
f2 = f1 ± ∆fCS
generator 1: modulated test signal 1
generator 2: modulated test signal 2
P1 = Pi(ref) + 3 dB
P2 = P1 + αa(min)
αc
co-channel rejection; Fig.12(b) f2 = f1 ± up to 3 kHz
generator 1: modulated test signal 1
P1 = Pi(ref) + 3 dB
generator 2: modulated test signal 2
f2 = 100 kHz to 2 GHz
P2 = P1 − αc(max)
αsp
spurious immunity; Fig.12(b)
generator 1: modulated test signal 1
generator 2: modulated test signal 2
f2 = f1 ± ∆fcs; f3 = f1 ± 2∆fcs
P1 = Pi(ref) + 3 dB
P2 = P1 + αsp( min)
αim
intermodulation immunity;
Fig.12(c)
generator 1: modulated test signal 1
generator 2: unmodulated
P1 = Pi(ref) + 3 dB
P2 = P1 + αim(min)
P3 = P2
generator 3: modulated test signal 2
f2 = f1 ± 1 MHz
αbl
blocking immunity; Fig.12(b)
generator 1: modulated test signal 1
generator 2: modulated test signal 2
deviation = ±4.0 kHz, f1 = fi(RF) ± 2 kHz (foffset(min)
generator 1: modulated test signal 1
P1 = Pi(ref) + 3 dB
P2 = P1 + αbl(min)
foffset
∆fdev
ton
frequency offset range;
Fig.12(a)
)
P1 = Pi(ref) + 3 dB
P1 = Pi(ref) + 3 dB
P1 = Pi(ref) + 10 dB
deviation range; Fig.12(a)
deviation = ±2.5 to ±7 kHz; (∆fdev(min) to ∆fdev(max)
generator 1: modulated test signal 1
note 3
)
receiver turn-on time;
Fig.12(a)
generator 1: modulated test signal 1
Notes
1. The tests are executed without load on pins TPI and TPQ.
2. All minimum and maximum values correspond to a bit error rate (BER) ≤ 3⁄100 in the wanted signal (P1).
3. The BER measurement is started 5 ms (ton(max)) after VRE goes HIGH; BER is then measured for 100 bits
(BER ≤ 3⁄100).
1996 Jan 15
26
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
(1)
GENERATOR 1
= 50 Ω
DEVICE
UNDER TEST
BER TEST
FACILITY
(a)
(b)
R
s
50 Ω 2-SIGNAL
POWER
COMBINER
(1)
GENERATOR 1
= 50 Ω
DEVICE
UNDER TEST
BER TEST
FACILITY
R
s
GENERATOR 2
= 50 Ω
R
s
GENERATOR 1
= 50 Ω
R
s
50 Ω 3-SIGNAL
POWER
COMBINER
(1)
GENERATOR 2
= 50 Ω
DEVICE
UNDER TEST
BER TEST
FACILITY
(c)
R
s
MLC708
GENERATOR 3
= 50 Ω
R
s
(a) One generator.
(b) Two generators.
(c) Three generators.
(1) See Fig.13.
Fig.12 Test configurations.
recovered clock
GENERATOR
= 50 Ω
DEVICE
UNDER TEST
DIGITAL
FILTER
CLOCK
RECOVERY
retimed
Rx data
R
s
to error
counter
PRESET
DELAY
DATA
COMPARATOR
PSEUDO
RANDOM
SEQUENCE
GENERATOR
250 µs
RISE TIME
MASTER
CLOCK
MLC233
Fig.13 BER test facility.
27
1996 Jan 15
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
PRINTED-CIRCUIT BOARDS
MBD562
Fig.14 PCB top view for LQFP32; test circuit Figs 1 and 3.
1996 Jan 15
28
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
MBD561
Fig.15 PCB bottom view for LQFP32; test circuit Figs 1 and 3.
1996 Jan 15
29
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
C19
R3
L7
L6
L5
L4
R2
C9
C14
C7
C8
C12
L8
C11
C10
C15
V
P
UAA2080H
L3
C4
C6
C13
C16
C17
L9
L2
XTAL
GND
R1
R5
C18
TS
BLI
DO
RE
VIRF
DO
TPI
TPQ
MLC709
VEE = GND; VC = VP.
Fig.16 PCB top view with components for LQFP32; test circuit Fig.3.
1996 Jan 15
30
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
C5
R4
C3
L1
C1
C2
MLC235
Fig.17 PCB bottom view with components for LQFP32; test circuit Fig.3.
1996 Jan 15
31
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
MBD565
Fig.18 PCB top view for SO28; test circuit Figs 2 and 4.
1996 Jan 15
32
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
MBD567
Fig.19 PCB bottom view for SO28; test circuit Figs 2 and 4.
1996 Jan 15
33
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
V
P
GND
GND
C13
OPS
BI
DO
RE
V
P
C14
DATA
OUT
XL1
C19
C17
R3
L6
C18
L7
L8
R5
C16
C15
C12
R2
UAA2080T
C11 L4
L5
C9
C10
C7
RF IN
L3
C4
L2
C8
TPQ
TPI
MBD566
VEE = GND; VCC = VP; BI = BLI; OPS = TS.
Fig.20 PCB top view with components for SO28; test circuit Fig.4.
1996 Jan 15
34
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
SHORT
R4
C5
R1
L1
C3
C2
C1
MBD568
Fig.21 PCB bottom view with components for SO28; test circuit Fig.4.
1996 Jan 15
35
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
C19
R3
C23
L7
L6
L5
L4
L10
R2
C14
C10
C12
L8
C21
C15
C11
C22
V
P
UAA2080H
C13
V
i(RF)
C16
C17
GND
XTAL
L9
R5
C18
TS
BLI
DO
RE
DO
TPI
TPQ
MLC710
Fig.22 PCB top view with components for LQFP32; test circuit Fig.5.
1996 Jan 15
36
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
C5
R4
MLC237
Fig.23 PCB bottom view with components for LQFP32; test circuit Fig.5.
1996 Jan 15
37
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
o
GND
C13
V
P
L5
L4 C9
L11
R2
R3
C12
L10
L6
L7
UAA2080H
C7
L3
C19
C14
C4
C8
L8
L2
C6
R1
L1
V
i(OSC)
C15
TS
BLI
DO
C3
RE
C1
C2
TPI
TPQ
MLC711
V
i(RF)
Fig.24 PCB top view with components for LQFP32; test circuit Fig.6.
1996 Jan 15
38
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
C5
R4
MLC239
Fig.25 PCB bottom view with components for LQFP32; test circuit Fig.6.
1996 Jan 15
39
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
PACKAGE OUTLINES
LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
SOT358-1
c
y
X
A
24
17
25
16
Z
E
e
Q
H
E
A
E
(A )
3
2
A
A
1
w M
p
θ
b
L
p
pin 1 index
L
32
9
detail X
1
8
e
Z
D
v M
A
w M
b
p
D
B
H
v M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
Q
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.20 1.45
0.05 1.35
0.4 0.18 7.1
0.3 0.12 6.9
7.1
6.9
9.15 9.15
8.85 8.85
0.75 0.69
0.45 0.59
0.9
0.5
0.9
0.5
mm
1.60
0.25
0.8
1.0
0.2 0.25 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-06-29
95-12-19
SOT358 -1
1996 Jan 15
40
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
H
v
M
A
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
1.27
0.050
1.4
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.71
0.014 0.009 0.69
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT136-1
075E06
MS-013AE
1996 Jan 15
41
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
SOLDERING
Introduction
SO
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
METHOD (LQFP AND SO)
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering
Reflow soldering techniques are suitable for all LQFP and
SO packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
Wave soldering
LQFP
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).
1996 Jan 15
42
Philips Semiconductors
Product specification
Advanced pager receiver
UAA2080
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Jan 15
43
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SCDS47
© Philips Electronics N.V. 1996
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Description
Consumer Multimedia
Systems
Communications
The UAA2080 is a high-performance low-power radio receiver circuit primarily intended for VHF, UHF and 900 MHz pager receivers for
wide area digital paging systems, employing direct FM non-return-to-zero (NRZ) frequency shift keying (FSK).
PC/PC-peripherals
Cross reference
The receiver design is based on the direct conversion principle where the input signal is mixed directly down to the baseband by a local
oscillator on the signal frequency. Two complete signal paths with signals of 90° phase difference are required to demodulate the signal. All
channel selectivity is provided by the built-in IF filters. The circuit makes extensive use of on-chip capacitors to minimize the number of
external components.
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
The UAA2080 was designed to operate together with the PCA5000A, PCF5001 or PCD5003 POCSAG decoders, which contain a digital
input filter for optimum call success rate.
Features
Relevant Links
l Wide frequency range: VHF, UHF and 900 MHz bands
l High sensitivity
l High dynamic range
l Electronically adjustable filters on chip
l Suitable for data rates up to 2400 bits/s
l Wide frequency offset and deviation range
l Fully POCSAG compatible FSK receiver
l Power on/off mode selectable by the chip enable input
l Low supply voltage; low power consumption
l High integration level
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UAA2080
UAA2080
l Interfaces directly to the PCA5000A, PCF5001 and PCD5003 POCSAG decoders.
Applications
l Wide area paging
l On-site paging
l Telemetry
l RF security systems
l Low bit-rate wireless data links.
Datasheet
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(kB)
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release date Datasheet status
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UAA2080 Advanced pager receiver
15-Jan-96
Product
44
509
Specification
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
SOT358 Full production
Standard Marking * Reel Dry Pack,
SMD, 13"
UAA2080H/V1 UAA2080HB-T
UAA2080T/V1
9350 769 10518
9350 067 90112 Standard Marking * Tube
SOT136 Full production
SOT136 Full production
-
-
Standard Marking * Reel Pack,
9350 067 90118
SMD, 13"
Please read information about some discontinued variants of this product.
Find similar products:
UAA2080 links to the similar products page containing an overview of products that are similar in function or related to the part
number(s) as listed on this page. The similar products page includes products from the same catalog tree(s) , relevant selection guides and
products from the same functional category.
Copyright © 2000
Royal Philips Electronics
All rights reserved.
Terms and conditions.
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