Z0107MN [NXP]

Logic level four-quadrant triac; 逻辑电平四象限三端双向可控硅
Z0107MN
型号: Z0107MN
厂家: NXP    NXP
描述:

Logic level four-quadrant triac
逻辑电平四象限三端双向可控硅

栅极 触发装置 可控硅 三端双向交流开关 光电二极管
文件: 总12页 (文件大小:178K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Z0107MN  
Logic level four-quadrant triac  
Rev. 03 — 5 August 2009  
Product data sheet  
1. Product profile  
1.1 General description  
Passivated sensitive gate 4-Q triac in a SOT223 surface-mountable plastic package  
1.2 Features and benefits  
„ Direct interfacing to logic level ICs  
„ High blocking voltage of 600V  
„ Sensitive gate in four quadrants  
„ Surface-mountable package  
„ Direct interfacing to low power gate  
drive circuits  
1.3 Applications  
„ General purpose low power motor  
„ Industrial process control  
control  
„ Low power AC Fan controllers  
„ Home appliances  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
VDRM  
repetitive peak  
off-state voltage  
-
-
600  
V
IT(RMS)  
RMS on-state  
current  
half sine wave; Tsp 89 °C;  
see Figure 1 and 4  
-
-
1
A
Static characteristics  
IGT gate trigger current  
VD = 12 V; Tj = 25 °C;  
T2+ G-; see Figure 6  
-
-
-
-
-
-
-
-
5
5
5
7
mA  
mA  
mA  
mA  
VD = 12 V; Tj = 25 °C;  
T2- G-  
VD = 12 V; Tj = 25 °C;  
T2+ G+  
VD = 12 V; Tj = 25 °C;  
T2- G+  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
2. Pinning information  
Table 2.  
Pinning information  
Pin  
1
Symbol Description  
Simplified outline  
Graphic symbol  
T1  
T2  
G
main terminal 1  
main terminal 2  
gate  
4
T2  
T1  
G
2
3
sym051  
4
T2  
main terminal 2  
1
2
3
SOT223  
(SC-73)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
Z0107MN  
SC-73  
plastic surface-mounted package with increased heatsink; 4 leads  
SOT223  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
2 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
VDRM  
repetitive peak off-state  
voltage  
-
600  
V
IT(RMS)  
dIT/dt  
RMS on-state current  
half sine wave; Tsp 89 °C; see Figure 1 and 4  
-
1
A
rate of rise of on-state IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2+ G-  
current  
-
50  
50  
20  
50  
1
A/µs  
A/µs  
A/µs  
A/µs  
A
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2+ G+  
-
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2- G+  
IT = 1 A; IG = 20 mA; dIG/dt = 100 mA/µs; T2- G-  
peak gate current  
-
-
IGM  
PGM  
Tstg  
Tj  
-
peak gate power  
-
2
W
storage temperature  
-40  
150  
125  
8.5  
8
°C  
junction temperature  
-
-
-
°C  
ITSM  
non-repetitive peak  
on-state current  
full sine wave; tp = 16.7 ms; Tj(init) = 25 °C  
A
full sine wave; tp = 20 ms; Tj(init) = 25 °C;  
see Figure 2 and 3  
A
I2t  
I2t for fusing  
tp = 10 ms; sine-wave pulse  
-
-
0.32  
0.1  
A2s  
W
PG(AV)  
average gate power  
003aac259  
2.0  
conduction form  
Ptot  
(W)  
angle  
(degrees)  
factor  
a
1.6  
1.2  
0.8  
0.4  
0.0  
30  
60  
90  
120  
180  
4
α= 180°  
2.8  
2.2  
1.9  
1.57  
α
120°  
90°  
60°  
30°  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
IT(RMS) (A)  
Fig 1. Total power dissipation as a function of RMS on-state current; maximum values  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
3 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
003aad318  
10  
ITSM  
(A)  
8
6
4
2
I
I
TSM  
t
T
1/f  
= 25 °C max  
T
j(init)  
0
1
10  
102  
103  
number of cycles  
Fig 2. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum  
values  
003aad319  
103  
I
I
T
TSM  
t
ITSM  
(A)  
t
102  
p
T
= 25 °C max  
j(init)  
(1)  
(2)  
10  
1
105  
104  
103  
102  
101  
tp (s)  
Fig 3. Non-repetitive peak on-state current as a function of pulse width; maximum values  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
4 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
003aad391  
1.2  
IT(RMS)  
(A)  
0.8  
0.4  
0
50  
0
50  
100  
150  
sp (°C)  
T
Fig 4. Maximum permissible RMS on-state current as a function of solder point temperature; typical values.  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-sp)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from see Figure 5  
junction to solder point  
-
-
25  
K/W  
Rth(j-a)  
thermal resistance from  
junction to ambient  
-
-
150  
60  
-
-
K/W  
K/W  
003aad390  
102  
Zth(j-sp)  
(K/W)  
10  
1
P
101  
t
tp  
102  
105  
101  
1
10  
104  
103  
102  
tp (s)  
Fig 5. Transient thermal impedance from junction to solder point as a function of pulse duration  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
5 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
IGT gate trigger current  
VD = 12 V; Tj = 25 °C; T2+ G-;  
see Figure 6  
-
-
5
mA  
VD = 12 V; Tj = 25 °C; T2- G-  
VD = 12 V; Tj = 25 °C; T2+ G+  
VD = 12 V; Tj = 25 °C; T2- G+  
-
-
-
-
-
-
-
-
5
mA  
mA  
mA  
mA  
5
7
IL  
latching current  
VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2+ G-;  
see Figure 7  
20  
VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2+ G+  
VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2- G+  
VD = 12 V; Tj = 25 °C; IG = 0.1 A; T2- G-  
VD = 12 V; Tj = 25 °C; see Figure 10  
IT = 1 A; see Figure 8  
-
-
-
-
-
-
-
10  
10  
10  
10  
1.6  
1.3  
mA  
mA  
mA  
mA  
V
-
-
IH  
holding current  
-
VT  
VGT  
on-state voltage  
gate trigger voltage  
1.3  
-
IT = 0.1 A; VD = 12 V; Tj = 25 °C;  
see Figure 9  
V
IT = 0.1 A; VD = 600 V; Tj = 125 °C  
VD = 600 V; Tj = 125 °C  
0.2  
-
-
-
-
V
ID  
off-state current  
0.5  
mA  
Dynamic characteristics  
dVD/dt  
rate of rise of off-state VDM = 402 V; Tj = 110 °C; gate open  
20  
1
-
-
-
-
V/µs  
V/µs  
voltage  
circuit; see Figure 11  
dVcom/dt  
rate of rise of  
VD = 400 V; Tj = 110 °C;  
commutating voltage  
dIcom/dt = 0.44 A/ms; gate open circuit  
003aaa205  
003aaa203  
4
3
I
GT  
I
L
I
GT(25°C)  
I
L(25°C)  
3
(1)  
(2)  
2
(3)  
(4)  
2
1
0
1
0
50  
50  
0
50  
100  
150  
0
50  
100  
150  
T (°C)  
j
T (°C)  
j
Fig 7. Normalized latching current as a function of  
junction temperature  
Fig 6. Normalized gate trigger current as a function of  
junction temperature  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
6 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
003aac258  
003aaa209  
1.6  
2
IT  
(A)  
V
GT  
V
GT(25°C)  
1.6  
1.2  
1.2  
0.8  
0.4  
0
0.8  
(1)  
(2)  
(3)  
0.4  
0
0
0.4  
0.8  
1.2  
1.6  
2
−50  
0
50  
100  
150  
V
T (V)  
T (°C)  
j
Fig 9. Normalized gate trigger voltage as a function of  
junction temperature  
Fig 8. On-state current as a function of on-state  
voltage  
003aaa204  
3
I
H
I
H(25°C)  
2
1
0
50  
0
50  
100  
150  
T (°C)  
j
Fig 10. Normalized holding current as a function of junction temperature  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
7 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
003aaa208  
1.6  
1.2  
0.8  
A
0.4  
0
0
50  
100  
150  
T (°C)  
j
Fig 11. Normalized critical rate of rise of off-state voltage as a function of junction temperature;typical values  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
8 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
7. Package outline  
Plastic surface-mounted package with increased heatsink; 4 leads  
SOT223  
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X  
1
e
0
2
4 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8  
1.5  
0.10 0.80  
0.01 0.60  
3.1  
2.9  
0.32  
0.22  
6.7  
6.3  
3.7  
3.3  
7.3  
6.7  
1.1  
0.7  
0.95  
0.85  
mm  
4.6  
2.3  
0.2  
0.1  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
04-11-10  
06-03-16  
SOT223  
SC-73  
Fig 12. Package outline SOT223 (SC-73)  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
9 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Z0107MN_3  
Modifications:  
Release date  
Data sheet status  
Change notice Supersedes  
- Z0103_07_09_SERIES-02  
20090805  
Product data sheet  
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Type number Z0107MN separated from data sheet Z0103_07_09_SERIES-02.  
Z0103_07_09_SERIES-02  
(9397 750 10102)  
20020912  
Product data  
-
Z0103_07_09_SERIES-01  
Z0103_07_09_SERIES-01  
(9397 750 09419)  
20020411  
Product data  
-
-
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
10 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
9. Legal information  
9.1 Data sheet status  
Document status [1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nxp.com.  
Applications — Applications that are described herein for any of these  
9.2 Definitions  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
9.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
9.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
10. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Z0107MN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 August 2009  
11 of 12  
Z0107MN  
NXP Semiconductors  
Logic level four-quadrant triac  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .10  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .11  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .11  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .11  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 5 August 2009  
Document identifier: Z0107MN_3  

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