MSC23B2321D-70BS4 [OKI]
Fast Page DRAM Module, 2MX32, 70ns, CMOS, SIMM-72;
| 型号： | MSC23B2321D-70BS4 |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | Fast Page DRAM Module, 2MX32, 70ns, CMOS, SIMM-72 动态存储器 内存集成电路 |
| 文件： | 总9页 (文件大小：43K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
This version: Mar. 3. 1999
Semiconductor
MSC23B2321D-xxBS4/DS4
2,097,152-word x 32-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE
DESCRIPTION
The MSC23B2321D-xxBS4/DS4 is a fully decoded, 2,097,152-word x 32-bit CMOS dynamic random access
memory module composed of four 16Mb DRAMs in SOJ packages mounted with eight decoupling capacitors on a
72-pin glass epoxy single-inline package. This module supports any application where high density and large
capacity of storage memory are required.
FEATURES
· 2,097,152-word x 32-bit organization
· 72-pin Single Inline Memory Module
MSC23B2321D-xxBS4 : Gold tab
MSC23B2321D-xxDS4 : Solder tab
· Single +5V supply ± 10% tolerance
· Input
: TTL compatible
· Output
: TTL compatible, 3-state
· Refresh : 1024cycles/16ms
· /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability
· Fast page mode capability
PRODUCT FAMILY
Cycle
Access Time (Max.)
Power Dissipation
Time
Family
tRAC
60ns
70ns
tAA
tCAC
15ns
20ns
(Min.)
Operating (Max.)
Standby (Max.)
MSC23B2321D-60BS4/DS4
MSC23B2321D-70BS4/DS4
30ns
35ns
110ns
130ns
1430mW
1320mW
22mW
Semiconductor
MSC23B2321D
MODULE OUTLINE
(Unit : mm)
9.3Max.
MSC23B2321D-xxBS4/DS4
107.95±0.2*1
101.19Typ.
3.38Typ.
3.18
19.0±0.2
Typ. Typ.
10.16 6.35
5.7Min.
1
72
R1.57
6.35
2.03Typ.
6.35Typ.
1.27±0.1
1.04Typ.
+0.1
-0.08
1.27
95.25
*1 The common size difference of the board width 12.5mm of its height is specified as ±0.2.
The value above 12.5mm is specified as ±0.5.
Semiconductor
MSC23B2321D
PIN CONFIGURATION
Pin No.
Pin Name
Pin No.
19
Pin Name
NC
Pin No.
37
Pin Name
NC
Pin No.
55
Pin Name
DQ11
DQ27
DQ12
DQ28
VCC
1
2
VSS
DQ0
DQ16
DQ1
DQ17
DQ2
DQ18
DQ3
DQ19
VCC
20
DQ4
DQ20
DQ5
DQ21
DQ6
DQ22
DQ7
DQ23
A7
38
NC
56
3
21
39
VSS
57
4
22
40
/CAS0
/CAS2
/CAS3
/CAS1
/RAS0
/RAS1
NC
58
5
23
41
59
6
24
42
60
DQ29
DQ13
DQ30
DQ14
DQ31
DQ15
NC
7
25
43
61
8
26
44
62
9
27
45
63
10
11
12
13
14
15
16
17
18
28
46
64
NC
29
NC
47
/WE
65
A0
30
VCC
48
NC
66
A1
31
A8
49
DQ8
67
PD1
A2
32
A9
50
DQ24
DQ9
68
PD2
A3
33
/RAS3
/RAS2
NC
51
69
PD3
A4
34
52
DQ25
DQ10
DQ26
70
PD4
A5
35
53
71
NC
A6
36
NC
54
72
VSS
Presence Detect Pins
Pin No.
MSC23B2321D
-60BS4/DS4
MSC23B2321D
-70BS4/DS4
Pin Name
67
68
69
70
PD1
PD2
PD3
PD4
NC
NC
NC
NC
NC
NC
VSS
NC
Semiconductor
MSC23B2321D
BLOCK DIAGRAM
A0-A9
/CAS0
/CAS1
/WE
A0-A9
/RAS
/LCAS
/UCAS
/WE
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
A0-A9
/RAS
/LCAS
/UCAS
/WE
/RAS0
/RAS1
DQ9
DQ10
DQ8
DQ9
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ11 DQ10
DQ12 DQ11
DQ13 DQ12
DQ14 DQ13
DQ15 DQ14
DQ16 DQ15
/OE
/OE
V
SS
V
CC
V
CC
V
SS
A0-A9
/RAS
/LCAS
/UCAS
/WE
DQ1 DQ16
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
A0-A9
/RAS
/LCAS
/UCAS
/WE
DQ2 DQ17
DQ3 DQ18
DQ4 DQ19
DQ5 DQ20
DQ6 DQ21
DQ7 DQ22
DQ8 DQ23
/RAS2
/RAS3
DQ9 DQ24
DQ10 DQ25
DQ11 DQ26
DQ12 DQ27
DQ13 DQ28
DQ14 DQ29
DQ15 DQ30
DQ16 DQ31
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
/OE
/OE
V
SS
V
CC
V
CC
V
SS
/CAS2
/CAS3
V
CC
C1-C8
V
SS
Semiconductor
MSC23B2321D
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to VSS
Voltage on VCC Supply Relative to VSS
Short Circuit Output Current
Power Dissipation
Symbol
VIN, VOUT
VCC
Rating
-1.0 to +7.0
-1.0 to +7.0
50
Unit
V
V
IOS
mA
W
PD *
4
Operating Temperature
TOPR
0 to +70
-40 to +125
°C
°C
Storage Temperature
TSTG
* Ta = 25°C
Recommended Operating Conditions
( Ta = 0°C to +70°C )
Parameter
Symbol
Min.
4.5
0
Typ.
Max.
Unit
V
VCC
VSS
VIH
VIL
5.0
5.5
0
Power Supply Voltage
0
-
V
Input High Voltage
Input Low Voltage
2.4
-1.0
6.5
0.8
V
-
V
Capacitance
( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz )
Parameter
Symbol
CIN1
Typ.
Max.
31
Unit
pF
Input Capacitance (A0 - A9)
Input Capacitance (/WE)
-
-
-
-
-
CIN2
35
pF
Input Capacitance (/RAS0- /RAS3)
Input Capacitance (/CAS0- /CAS3)
I/O Capacitance (DQ0 - DQ31)
CIN3
13
pF
CIN4
20
pF
CDQ
20
pF
Note: Capacitance measured with Boonton Meter.
Semiconductor
MSC23B2321D
DC Characteristics
(VCC = 5V ± 10%, Ta = 0°C to +70°C )
MSC23B2321D
-60BS4/DS4
MSC23B2321D
-70BS4/DS4
Symbo
l
Parameter
Condition
Unit
Note
Min.
Max.
Min.
Max.
0V ≤ VIN ≤ 6.5V;
All other pins not
under test = 0V
Input Leakage Current
Output Leakage Current
ILI
-40
40
-40
40
µA
µA
DQ disable
0V ≤ VOUT ≤ 5.5V
ILO
-20
20
-20
20
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = -5.0mA
IOL = 4.2mA
2.4
0
VCC
0.4
2.4
0
VCC
0.4
V
V
Average Power Supply Current
(Operating)
/RAS, /CAS cycling,
tRC = min.
ICC1
-
260
-
240
mA
1, 2
/RAS, /CAS = VIH
-
-
8
4
-
-
8
4
mA
mA
1
1
Power supply current
(Standby)
ICC2
/RAS, /CAS
≥ VCC -0.2V
/RAS cycling,
/CAS = VIH,
tRC = min.
Average Power Supply Current
(/RAS only refresh)
ICC3
ICC6
ICC7
-
-
-
260
260
260
-
-
-
240
240
240
mA
mA
mA
1, 2
1, 2
1, 3
Average Power Supply Current
(/CAS before /RAS refresh)
/RAS cycling,
/CAS before /RAS
/RAS = VIL,
/CAS cycling,
tPC = min.
Average Power Supply Current
(Fast Page Mode)
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. Address can be changed once or less while /RAS = VIL.
3. Address can be changed once or less while /CAS = VIH.
Semiconductor
MSC23B2321D
AC Characteristics (1/2)
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3
MSC23B2321D
-60BS4/DS4
MSC23B2321D
-70BS4/DS4
Parameter
Symbol
Unit
Note
Min.
110
40
-
Max.
Min.
130
45
-
Max.
Random Read or Write Cycle Time
Fast Page Mode Cycle Time
Access Time from /RAS
tRC
tPC
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
tRAC
tCAC
tAA
60
70
4, 5, 6
Access Time from /CAS
-
15
-
20
4, 5
4, 6
4
Access Time from Column Address
Access Time from /CAS Precharge
Output Low Impedance Time from /CAS
/CAS to Data Output Buffer Turn-off Delay Time
Transition Time
-
30
-
35
tCPA
tCLZ
tOFF
tT
-
35
-
40
0
-
0
-
4
0
15
0
20
7
3
50
3
50
3
Refresh Period
tREF
tRP
-
16
-
16
/RAS Precharge Time
40
60
60
15
10
15
60
5
-
50
70
70
20
10
20
70
5
-
/RAS Pulse Width
tRAS
tRASP
tRSH
tCP
10K
10K
/RAS Pulse Width (Fast Page Mode)
/RAS Hold Time
100K
100K
-
-
/CAS Precharge Time (Fast Page Mode)
/CAS Pulse Width
-
-
tCAS
tCSH
tCRP
tRHCP
tRCD
tRAD
tASR
tRAH
tASC
tCAH
tRAL
tRCS
tRCH
tRRH
10K
10K
/CAS Hold Time
-
-
-
-
/CAS to /RAS Precharge Time
/RAS Hold Time from /CAS Precharge
/RAS to /CAS Delay Time
35
20
15
0
-
40
20
15
0
-
45
30
-
50
35
-
5
6
/RAS to Column Address Delay Time
Row Address Set-up Time
Row Address Hold Time
10
0
-
10
0
-
Column Address Set-up Time
Column Address Hold Time
Column Address to /RAS Lead Time
Read Command Set-up Time
Read Command Hold Time
Read Command Hold Time referenced to /RAS
-
-
10
30
0
-
15
35
0
-
-
-
-
-
0
-
0
-
8
8
0
-
0
-
Semiconductor
MSC23B2321D
AC Characteristics (2/2)
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3
MSC23B2321D
-60BS4/DS4
MSC23B2321D
-70BS4/DS4
Parameter
Symbol
Unit
Note
Min.
0
Max.
Min.
0
Max.
Write Command Set-up Time
Write Command Hold Time
tWCS
tWCH
tWP
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
10
10
15
15
0
15
10
20
20
0
Write Command Pulse Width
Write Command to /RAS Lead Time
Write Command to /CAS Lead Time
Data-in Set-up Time
tRWL
tCWL
tDS
Data-in Hold Time
tDH
10
5
15
5
/CAS Active Delay Time from /RAS Precharge
tRPC
/RAS to /CAS Set-up Time
(/CAS before /RAS)
tCSR
10
10
-
-
10
10
-
-
ns
ns
/RAS to /CAS Hold Time
(/CAS before /RAS)
tCHR
Semiconductor
MSC23B2321D
Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight initialization cycles
(/RAS only refresh or /CAS before /RAS refresh) before proper device operation is achieved.
2. The AC characteristics assumes tT = 5ns.
3. VIH(Min.) and VIL(Max.) are reference levels for measuring input timing signals. Transition time (tT) are
measured between VIH and VIL.
4. This parameter is measured with a load circuit equivalent to 2TTL loads and 100pF.
5. Operation within the tRCD(Max.) limit ensures that tRAC(Max.) can be met.
tRCD(Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD(Max.) limit, then
the access time is controlled by tCAC
.
6. Operation within the tRAD(Max.) limit ensures that tRAC(Max.) can be met.
tRAD(Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD(Max.) limit, then
the access time is controlled by tAA.
7. tOFF(Max.) define the time at which the output achieves the open circuit condition and are not referenced
to output voltage levels.
8. tRCH or tRRH must be satisfied for a read cycle.
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