MSM52V1016LL-12TS-L [OKI]
Standard SRAM, 128KX8, 120ns, CMOS, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44;型号: | MSM52V1016LL-12TS-L |
厂家: | OKI ELECTRONIC COMPONETS |
描述: | Standard SRAM, 128KX8, 120ns, CMOS, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44 静态存储器 光电二极管 |
文件: | 总10页 (文件大小:145K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
E2I0017-17-Y1
This version: Jan. 1998
Previous version: Aug. 1996
¡ Semiconductor
MSM52V1016LL
65,536-Word ¥ 16-Bit CMOS STATIC RAM
DESCRIPTION
The MSM52V1016LL is a 65,536-word by 16-bit CMOS static RAM featuring 2.7 V to 3.6 V power
supplyoperationanddirectLVCMOSinput/outputcompatibility. Sincethecircuitryiscompletely
static,externalclockandrefreshingoperationsareunnecessary,makingthisdeviceveryeasytouse.
TheMSM52V1016LLcanbeusedinthehigh-speedoperationofanaccesstime85nsduetoadopting
a high-performance CMOS technology and in the very low current consumption of a standby
current max. 20 mA when there is no chip selection. In addition, the MSM52V1016LL is provided
withachipenablesignal(CE)suitedtotheexpansionofamemorycapacity, anoutputenablesignal
(OE) suited to the I/O bus line control, and a byte select signal (LB, UB) that can independently
control the input/output of a lower byte and an upper byte.
FEATURES
• 65,536-word ¥ 16-bit configuration
• Power supply voltage: 2.7 V to 3.6 V
• Fully static operation
• Operating temperature range: Ta = 0°C to 70°C
• (Input/Output) LVCMOS compatible
• 3-state output
• Data retention available at power supply voltage 2 V
• Package options:
40-pin 525 mil plastic SOP
(SOP40-P-525-1.27-K)
(Product:MSM52V1016LL-xxGS-K)
44-pin 400 mil plastic TSOP (Type II) (TSOPII44-P-400-0.80-K) (Product:MSM52V1016LL-xxTS-K)
(TSOPII44-P-400-0.80-L) (Product : MSM52V1016LL-xxTS-L)
xx indicates speed rank.
PRODUCT FAMILY
Power Dissipation
Family
Access Time (Max.)
Operating (Max.)
216 mW
Standby (Max.)
MSM52V1016LL-85
MSM52V1016LL-10
MSM52V1016LL-12
85 ns
100 ns
120 ns
180 mW
0.072 mW
144 mW
1/10
¡ Semiconductor
MSM52V1016LL
PIN CONFIGURATION (TOP VIEW)
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
44 NC
43 LB
42 UB
1
2
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
CE
3
3
4
41
40
39
38
37
36
35
34
33
32
4
A14
A15
A13
WE
A8
5
5
6
6
7
7
8
8
9
9
A9
10
11
10
11
A11
A10
VSS
NC
VSS 12
OE
NC 14
12 VSS
OE
14 NC
13
13
31 I/O16
15
30
15
I/O1
I/O1
I/O15
I/O2 16
I/O3 17
I/O4 18
I/O5 19
I/O6 20
I/O7 21
I/O8 22
29 I/O14
28 I/O13
27 I/O12
26 I/O11
25 I/O10
24 I/O9
I/O14 29
I/O13 28
I/O12 27
I/O11 26
I/O10 25
I/O9 24
16 I/O2
17 I/O3
18 I/O4
19 I/O5
20 I/O6
21 I/O7
22 I/O8
23 VCC
VCC 23
44-Pin Plastic TSOP (II)
44-Pin Plastic TSOP (II)
(K Type)
(L Type)
A12
A7
1
2
40 LB
39 UB
38 A14
A6
3
4
37
A15
A5
A4
5
36 A13
Pin Name
A0 - A15
I/O1 - I/O16
CE
Function
Address Input
A3
6
35 WE
7
34
33
32
31
30
29
28
A2
A8
Data Input/Output
Chip Enable
8
A1
A9
9
A0
A11
A10
VSS
WE
Write Enable
10
11
12
13
CE
OE
Output Enable
Byte Data Select
Power Supply
No Connection
VSS
OE
I/O1
LB, UB
I/O16
I/O15
V
CC, VSS
NC
I/O2 14
27 I/O14
15
26
I/O13
I/O3
I/O4 16
I/O5 17
I/O6 18
I/O7 19
I/O8 20
25 I/O12
24 I/O11
23 I/O10
22 I/O9
21 VCC
40-Pin Plastic SOP
2/10
¡ Semiconductor
MSM52V1016LL
BLOCK DIAGRAM
A2
A3
VCC
VSS
Memory Array
256 Rows
256 Columns
¥ 16 Blocks
A0
A1
Row
Select
A8
A9
A11
A10
I/O1
Column I/O
Circuits
Column Select
:
:
Input
Data
Control
I/O8
I/O9
:
:
I/O16
A12 A14 A4 A6
A7 A15 A5 A13
:
:
CE
LB
UB
WE
OE
FUNCTION TABLE
Operating Mode CE
LB
X
H
L
UB
X
WE
X
OE
I/O1 - I/O8
High-Z
I/O9 - I/O16 Power Mode
L
X
X
L
High-Z
High-Z
Standby
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Active
Non Selectable
X
H
L
X
High-Z
H
H
H
H
H
H
H
H
L
Data Read
Data Read
High-Z
Data Read
High-Z
L
H
L
L
H
H
L
L
Data Read
High-Z
Read Cycle
H
L
H
H
H
X
X
X
High-Z
H
H
H
L
H
L
High-Z
High-Z
H
L
High-Z
High-Z
L
Data Write
Data Write
High-Z
Data Write
High-Z
Write Cycle
H
H
L
H
L
L
H
L
Data Write
X: Don't Care ("H" or "L")
3/10
¡ Semiconductor
MSM52V1016LL
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Power Supply Voltage
Pin Voltage
Symbol
VCC
Condition
Rating
Unit
–0.5 to 4.6
–0.5* to VCC + 0.5
0.7
V
V
Ta = 25°C, for VSS
VT
Power Dissipation
Operating Temperature
Storage Temperature
PD
Ta = 25°C
W
°C
°C
Topr
Tstg
—
—
0 to 70
–55 to 125
* –1.2 V Min. for pulse width less than 30 ns.
Recommended Operating Conditions
Parameter
Symbol
VCC
VSS
VCCH
VIH
Condition
Min.
2.7
0
Typ.
—
Max.
3.6
0
Unit
V
Power Supply Voltage
—
—
0
V
Data Retention Voltage
Input High Voltage
Input Low Voltage
Load Capacitance
Fan Out
2
—
3.6
V
2.2
–0.3*
—
—
—
—
—
VCC + 0.3
V
VCC = 2.7 V to 3.6 V
VIL
0.4
100
1
V
CL
—
pF
—
N
LVCMOS
—
* –1.2 V Min. for pulse width less than 30 ns.
Capacitance
(Ta = 25°C, f = 1 MHz)
Parameter
Input Capacitance
Input/Output Capacitance
Symbol
CI
Condition
VI = 0 V
Min.
Max.
10
Unit
pF
—
—
CI/O
VI/O = 0 V
10
pF
Note:
This parameter is periodically sampled and not 100% tested.
4/10
¡ Semiconductor
MSM52V1016LL
DC Characteristics
(VCC = 2.7 V to 3.6 V, Ta = 0°C to 70°C)
MSM52V1016LL
Unit
Parameter
Symbol
Condition
VIN = 0 to VCC
Min.
Typ.
Max.
Input Leakage Current
ILI
–1.0
—
1.0
mA
mA
CE = VIL or LB, UB = VIH
or OE = VIH or WE = VIL,
Output Leakage Current
–1.0
—
1.0
ILO
V
OUT = 0 to VCC
IOH = –100 mA
OL = 100 mA
Output High Voltage
Output Low Voltage
VOH
VOL
V
CC – 0.2
—
—
—
V
V
I
—
0.2
LB, UB ≥ VCC – 0.2 V,
CE ≥ VCC – 0.2 V
or
ICCS
—
—
20
mA
Standby Power
Supply Current
0 V £ CE £ 0.2 V,
V
IN = 0 to VCC
LB, UB = VIH or
CE = VIL
ICCS1
—
—
—
—
0.6
mA
mA
LB, UB = VIL, CE = VIH,
V
IN = VIH / VIL,
CYC = Min. cycle,
OUT = 0 mA
q
T
I
Operating Power
Supply Current
LB, UB £ 0.2 V,
CE ≥ VCC – 0.2 V,
VIH ≥ VCC – 0.2 V,
VIL £ 0.2 V,
ICCA
—
—
15
mA
T
CYC = 1 ms,
IOUT = 0 mA
q 52V1016LL-85 60 mA
52V1016LL-10 50 mA
52V1016LL-12 40 mA
AC Characteristics
Test Conditions
Parameter
Condition
Input Pulse Level
VIH = 2.4 V, VIL = 0.4 V
Input Rise and Fall Times
Input/Output Timing Level
Output Load
5 ns
1.4 V
CL = 100 pF, 1 LVCMOS
5/10
¡ Semiconductor
MSM52V1016LL
Read Cycle
(VCC = 2.7 V to 3.6 V, Ta = 0°C to 70°C)
MSM52V1016LL-85 MSM52V1016LL-10 MSM52V1016LL-12
Parameter
Symbol
Unit
Min.
85
—
—
—
—
—
10
10
10
5
Max.
—
85
85
85
85
45
—
—
—
—
30
30
30
30
—
Min.
100
—
—
—
—
—
10
10
10
5
Max.
—
Min.
120
—
—
—
—
—
10
10
10
5
Max.
—
Read Cycle Time
tRC
tAA
ns
ns
Address Access Time
100
100
100
100
50
120
120
120
120
60
tLB
ns
LB, UB Access Time
tUB
CE Access Time
tCO
ns
ns
OE Access Time
tOE
tLBLZ
tUBLZ
tCLZ
tOLZ
tLBHZ
tUBHZ
tCHZ
tOHZ
tOH
—
—
LB, UB to Output in Low-Z
ns
—
—
CE to Output in Low-Z
—
—
ns
ns
OE to Output in Low-Z
—
—
—
—
—
—
10
—
—
—
—
10
35
—
—
—
—
10
35
LB, UB to Output in High-Z
ns
35
35
CE to Output in High-Z
35
35
ns
ns
ns
OE to Output in High-Z
35
35
Output Hold Time from Address Change
—
—
tRC
ADDRESS
LB, UB
CE
tAA
tLBHZ, tUBHZ
tLB, tUB
tLBLZ, tUBLZ
tCO
tCHZ
tCLZ
OE
tOE
tOHZ
DOUT
Valid Data-out
tOLZ
tOH
Notes: 1. A read cycle occurs during the overlap of LB = "L" (or UB = "L"), CE = "H", OE = "L" and
WE = "H".
2. t
, t
, t
and t
are specified by the time when DATA is floating, not
LBHZ UBHZ CHZ
OHZ
defined by the output level.
6/10
¡ Semiconductor
MSM52V1016LL
Write Cycle
(VCC = 2.7 V to 3.6 V, Ta = 0°C to 70°C)
MSM52V1016LL-85 MSM52V1016LL-10 MSM52V1016LL-12
Parameter
Symbol
Unit
Min.
85
0
Max.
—
—
—
—
—
—
—
—
—
—
30
—
Min.
100
0
Max.
—
—
—
—
—
—
—
—
—
—
35
—
Min.
120
0
Max.
—
—
—
—
—
—
—
—
—
—
35
—
Write Cycle Time
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Setup Time
Data Hold Time
tWC
tAS
ns
ns
ns
ns
ns
ns
tWP
tWR
tDS
65
5
75
5
90
5
35
0
40
0
50
tDH
0
tLBW
tUBW
tCW
tAW
tWHZ
tWLZ
75
75
75
75
—
5
90
90
90
90
—
5
100
100
100
100
—
LB, UB to End of Write
ns
CE to End of Write
ns
ns
ns
ns
Address Valid to End of Write
WE to Output in High-Z
Output Active from End of Write
5
tWC
ADDRESS
tLBW, tUBW
LB, UB
tCW
CE
tAW
WE
tWR
tWLZ
tAS
tWP
DOUT
tDS
tDH
tWHZ
DIN
Data-in
Notes: 1. A write cycle occurs during the overlap of LB = "L" (or UB = "L"), CE = "H" and WE =
"L".
2. OE may be either of "H" or "L" in the write cycle.
3. t is specified from LB = "L" (or UB = "L"), CE = "H" or WE = "L", whichever occurs last.
AS
4. t
is an overlap time of LB = "L" (or UB = "L"), CE = "H" and WE = "L".
WP
5. t , t and t
are specified from LB = "H" (or UB = "H"), CE = "L" or WE = "H",
WR DS
DH
whichever occurs first.
6. t is specified by the time when DATA output is floating, not defined by the output
WHZ
level.
7. When I/O pins are in the output mode, don't apply the inverted input signal to the
output pins.
7/10
¡ Semiconductor
MSM52V1016LL
Data Retention Characteristics
(Ta = 0°C to 70°C)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
LB, UB ≥ VCC – 0.2 V,
CE ≥ VCC – 0.2 V
or
0 V £ CE £ 0.2 V,
VIN = 0 to VCC
Data Retention Power
Supply Voltage
VCCH
2.0
—
—
V
VCC = 3 V,
LB, UB ≥ VCC – 0.2 V,
CE ≥ VCC – 0.2 V
or
Data Retention Power
Supply Current
ICCH
—
—
15*
mA
0 V £ CE £ 0.2 V,
VIN = 0 to VCC
Chip Deselect to Data
Retention Time
tCDR
tR
—
—
0
5
—
—
—
—
ns
Operation Recovery Time
ms
* 4 mA Max. when Ta = 0°C to 40°C.
LB, UB Control
tCDR
Data Retention Mode
tR
VCC
2.7 V
VIH
VCCH
LB, UB
0 V
LB, UB ≥ VCC – 0.2 V
CE Control
Data Retention Mode
VCC
2.7 V
tCDR
tR
CE
VCCH
VIL
CE £ 0.2 V
0 V
8/10
¡ Semiconductor
PACKAGE DIMENSIONS
SOP40-P-525-1.27-K
MSM52V1016LL
(Unit : mm)
Mirror finish
Package material
Lead frame material
Pin treatment
Epoxy resin
42 alloy
Solder plating
Solder plate thickness
Package weight (g)
5 mm or more
1.27 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
9/10
¡ Semiconductor
MSM52V1016LL
(Unit : mm)
TSOPII44-P-400-0.80-K
Mirror finish
Package material
Lead frame material
Pin treatment
Epoxy resin
42 alloy
Solder plating
Solder plate thickness
Package weight (g)
5 mm or more
0.54 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
10/10
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