MSM63238 [OKI]
4-Bit Microcontroller with Built-in POCSAG Decoder and Melody Circuit, Operating at 0.9 V (Min.); 4 -bit微控制器内置POCSAG解码器和旋律电路，工作在0.9 V（最小值）。
| 型号： | MSM63238 |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | 4-Bit Microcontroller with Built-in POCSAG Decoder and Melody Circuit, Operating at 0.9 V (Min.) |
| 文件： | 总32页 (文件大小：230K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
E2E0027-38-95
This version: Sep. 1998
Previous version: Mar. 1996
¡ Semiconductor
MSM63238
4-Bit Microcontroller with Built-in POCSAG Decoder and Melody Circuit, Operating at
0.9 V (Min.)
GENERAL DESCRIPTION
The MSM63238 is a CMOS 4-bit microcontroller with a built-in POCSAG (Post Office Code
Standardization Advisory Group) decoder.
TheMSM63238employsOki'soriginalnX-4/250CPUcoreandissuitableforpagerapplications.
The MSM63P238 is a one-time-programmable ROM-version product having one-time PROM
(OTP) as internal program memory.
The specifications of the MSM63P238 are equal to those of the MSM63238 except for electrical
characteristics, packaging (only 80-pin flat package is available for the MSM63P238), and some
functions.
FEATURES
• Rich instruction set
439 instructions
Transfer,rotate,increment/decrement,arithmeticoperations,comparison,logicoperations,
mask operations, bit operations, ROM table reference, external memory transfer, stack
operations, flag operations, branch, conditional branch, call/return, control.
• Rich selection of addressing modes
Indirect addressing of four data memory types, with current bank register, extra bank
register, HL register and XY register.
Data memory bank internal direct addressing mode.
• Processing speed
Two clocks per machine cycle, with most instructions executed in one machine cycle.
Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock)
1 ms (@ 2 MHz system clock)
• Clock generation circuit
Low-speed clock
High-speed clock
: 32.768 kHz/38.4 kHz/76.8 kHz crystal oscillator
: 2 MHz (Max.) RC or ceramic oscillator select
• Program memory space
16K words
Basic instruction length is 16 bits/1 word
• Data memory space
1K nibbles
• External data memory space
64 Kbytes (expandable by using an I/O port)
1/32
¡ Semiconductor
MSM63238
• Stack level
Call stack level
Register stack level
: 16 levels
: 16 levels
• POCSAG decoder
Data rate
: 512 bps/1200 bps/2400 bps
: 3 types
User frame
User address
: 6 types
Battery saving mode (for controlling intermittent operations of RF receiver)
• I/O ports
Input ports: Selectable as input with pull-up resistance/input with pull-down resistance/
high-impedance input
Output ports: Selectable as P-channel open drain output/N-channel open drain output/
CMOS output/high-impedance output
Input-output ports: Selectable as input with pull-up resistance/input with pull-down
resistance/high-impedance input
Selectable as P-channel open drain output/N-channel open drain
output/CMOS output/high-impedance output
Canbeinterfacedwithexternalperipheralsthatuseadifferentpowersupplythanthisdevice
uses.
Number of ports:
Input port
Output port
Input-output port
: 1 port ¥ 4 bits
: 6 ports ¥ 4 bits
: 5 ports ¥ 4 bits
1 port ¥ 2 bits
• Melody output function
Melody sound frequency
Tone length
: 529 to 2979 Hz
: 63 types
Tempo
: 15 types
Note data
Buzzer drive signal output
: Resides in the program memory
: 4 kHz
• Reset function
Reset through RESET pin
Power-on reset
Reset by low-speed oscillation halt
• Battery check
Low-voltage supply check
Criterion voltage
: Can be selected as 1.05 ±0.10 V, 1.30 ±0.15 V,
2.20 ±0.20 V or 2.80 ±0.30 V
• Power supply backup
Backup circuit (voltage multiplier) enables operation at 0.9 V minimum
2/32
¡ Semiconductor
MSM63238
• Timers and counter
8-bit timer ¥ 4
Selectable as auto-reload mode/capture mode/clock frequency measurement mode
Watchdog timer ¥ 1
15-bit time base counter ¥ 1
1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read
• Serial port
Mode
: UART mode, synchronous mode
: 1200 bps, 2400 bps, 4800 bps, 9600 bps
: 32.768 kHz (internal clock mode), external
clock frequency
UART communication speed
Clock frequency in synchronous mode
Data length
: 5 to 8 bits
• Interrupt sources
External interrupt
Internal interrupt
: 3
: 15 (watchdog timer interrupt is a nonmask-
able interrupt)
• Operating voltage
When backup used
: 0.9 to 2.7 V
(Low-speed clock operating)
1.2 to 2.7 V
(Operating frequency: 300 to 500 kHz)
1.5 to 2.7 V
(Operating frequency: 200 kHz to 1 MHz)
: 1.8 to 5.5 V
When backup not used
(Operating frequency: 300 to 500 kHz)
2.2 to 5.5 V
(Operating frequency: 300 kHz to 1 MHz)
2.7 to 5.5 V
(Operating frequency: 200 kHz to 2 MHz)
• Package options:
80-pin plastic QFP (QFP80-P-1420-0.80-BK) : (Product name: MSM63238-xxxGS-BK)
100-pin plastic TQFP (TQFP100-P-1414-0.50-K) : (Product name: MSM63238-xxxTS-K)
Chip
: MSM63238-xxx
xxx indicates a code number.
3/32
¡ Semiconductor
MSM63238
BLOCK DIAGRAM
An asterisk (*) indicates the port secondary function.
and
indicate that the power is
supplied from V
to the circuits corresponding to the signal names inside
, and from
DDI
V
to the circuits correspondingtosignalnamesinside
. (V
andV : powersupply
DDR
DDI
DDR
for interface)
nX-4/250
H
X
L
CBR
EBR
RA
PC
TIMING
CON-
ROM
16KW
TROL
Y
A
G
C
Z
SP
BUS
D0-7*
ALU
EXTMEM
CON-
TROL
RSP
MIE
A0-15*
RD*
WR*
INSTRUCTION
DECODER
STACK
IR
CAL.S: 16-level
REG.S: 16-level
INT
4
TM0CAP/TM1CAP*
TM0OVF/TM1OVF*
T02CK*
RESET
RST
TST
RAM
TIMER
8bit ¥ 4
1024N
INT
T13CK*
2
TST1
TST2
TST3
RXC*
TXC*
RXD*
TXD*
INT
SIO
INT
INT
1
4
XTM0
XTM1
XT0
XT1
OSC0
MD
TBC
MELODY
OSC
P8.0, P8.1
P9.0-P9.3
PA.0-PA.3
PB.0-PB.3
PC.0-PC.3
PD.0-PD.3
BLD
INT
OSC1
I/O
PORT
1
TBCCLK*
HSCLK*
WDT
INT
XTSEL0
XTSEL1
3
INT
VDDH
VDD
VDDL
VDD2
CB1
CB2
1
INPUT
PORT
P1.0-P1.3
BACKUP
INT
P7.0-P7.3
P6.0-P6.3
P5.0-P5.3
P4.0-P4.3
P3.0-P3.3
P2.0-P2.3
3
OUTPUT
PORT
Internal
PORT
P0.0-P0.3
P8.2, P8.3
PE.0-PE.3
PF.0-PF.3
VDDI
VDDR
SIGIN
BS1
BS2
POCSAG
Dec
4/32
¡ Semiconductor
MSM63238
PIN CONFIGURATION (TOP VIEW)
64
63
62
61
1
(NC)
P6.0
P6.1
P8.1
2
(NC)
P8.0
P3.3
3
4
P6.2
5
60 P3.2
59
P6.3
P7.0
6
P3.1
7
58 P3.0
57 P2.3
P7.1
P7.2
8
9
56
P7.3
BS1
BS2
SIGIN
VDDR
XT0
P2.2
P2.1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
55
54 P2.0
53
52
P1.3
P1.2
51 P1.1
50
49
48
47
P1.0
PB.3
PB.2
PB.1
XT1
TST1
TST2
TST3
OSC0
OSC1
XTSEL0
XTSEL1
XTM0
XTM1
46 PB.0
45
PC.3
PC.2
PC.1
PC.0
44
43
42
41
(NC)
80-Pin Plastic QFP
Note: Pins marked as (NC) are no-connection pins which are left open.
5/32
¡ Semiconductor
MSM63238
PIN CONFIGURATION (TOP VIEW) (continued)
P6.1
P6.2
P6.3
P7.0
P7.1
(NC)
P7.2
P7.3
(NC)
1
2
3
4
5
6
7
8
9
75 P8.0
74 P3.3
73 P3.2
72 P3.1
71 (NC)
70 P3.0
69 P2.3
68 P2.2
67 P2.1
66 (NC)
65 P2.0
64 P1.3
63 (NC)
62 P1.2
61 P1.1
60 (NC)
59 P1.0
58 PB.3
57 PB.2
56 PB.1
55 (NC)
54 PB.0
53 PC.3
52 PC.2
51 PC.1
BS1 10
BS2 11
SIGIN 12
(NC) 13
VDDR 14
XT0 15
XT1 16
(NC) 17
TST1 18
TST2 19
TST3 20
OSC0 21
OSC1 22
XTSEL0 23
XTSEL1 24
(NC) 25
100-Pin Plastic TQFP
Note: Pins marked as (NC) are no-connection pins which are left open.
6/32
¡ Semiconductor
MSM63238
PAD CONFIGURATION
Pad Layout
19 XTSEL0
PC.2 39
PC.3 40
18 OSC1
17 OSC0
16 TST3
PB.0 41
PB.1 42
15 TST2
14 TST1
13 XT1
12 XT0
11 VDDR
10 SIGIN
PB.2 43
PB.3 44
P1.0 45
P1.1 46
P1.2 47
P1.3 48
P2.0 49
P2.1 50
P2.2 51
9
BS2
8
7
6
5
4
BS1
P7.3
P7.2
P7.1
P7.0
P2.3 52
P3.0 53
P3.1 54
3
2
1
P6.3
P6.2
P6.1
P3.2 55
P3.3 56
P8.0 57
Y
X
Chip Size
: 4.55 mm ¥ 4.55 mm
: 350 mm (typ.)
: Chip center
: 110 mm ¥ 110 mm
: 120 mm ¥ 120 mm
: 150 mm
Chip Thickness
Coordinate Origin
Pad Hole Size
Pad Size
Minimum Pad Pitch
Note: The chip substrate voltage is V .
SS
7/32
¡ Semiconductor
MSM63238
Pad Coordinates
Pad No. Pad Name
X (µm)
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2123.6
2031.2
1609.4
1452.8
938.6
Y (µm)
–1897.7
–1701.4
–1505.4
–1231.1
–1034.8
–838.8
–642.5
–446.2
–250.2
–54.0
Pad No. Pad Name
X (µm)
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–2123.6
–1552.5
–1370.2
–1187.6
–1005.2
–822.9
–640.6
–458.2
–275.9
–93.6
Y (µm)
1810.6
1618.5
1264.2
1072.2
880.1
1
P6.1
P6.2
P6.3
P7.0
P7.1
P7.2
P7.3
BS1
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
PC.2
PC.3
PB.0
PB.1
PB.2
PB.3
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
P8.0
P8.1
P9.0
P9.1
P9.2
P9.3
PA.0
PA.1
PA.2
PA.3
P4.0
P4.1
P4.2
P4.3
P5.0
P5.1
P5.2
P5.3
P6.0
2
3
4
5
6
688.0
7
496.0
8
303.9
9
BS2
111.8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
SIGIN
VDDR
XT0
–80.6
142.0
–272.7
–464.8
–656.8
–848.9
–1041.0
–1233.1
–1529.1
–1721.2
–1913.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
–2107.3
338.3
XT1
495.0
TST1
TST2
TST3
OSC0
OSC1
XTSEL0
XTSEL1
XTM0
XTM1
VDD2
VDDL
VDDH
CB1
691.3
887.2
1083.6
1279.8
1436.5
1819.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
2107.3
782.0
625.3
468.6
CB2
312.0
VDD
155.4
VSS
–1.3
88.7
MD
–219.4
–405.6
–592.2
–778.4
–964.9
–1151.2
–1337.7
–1523.9
–2031.2
271.0
RESET
VDDI
453.4
635.7
PD.0
PD.1
PD.2
PD.3
PC.0
PC.1
818.0
1000.3
1182.7
1365.0
2042.0
8/32
¡ Semiconductor
MSM63238
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63238 are described in Table 1.
A symbol with a slash (/) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
Fortype, "—"denotesapowersupplypin, "I"aninputpin, "O"anoutputpin, and"I/O"aninput-
output pin.
For pin, "GS-BK" denotes an 80-pin flat package (80QFP) and "TS-K" a 100-pin flat package
(100TQFP).
Table 1 Pin Descriptions (Basic Functions)
Pin
Function Symbol
Type
Description
GS-BK TS-K
VDD
VSS
31
32
13
36
37
14
—
—
—
Positive power supply
Negative power supply
VDDR
Interface power supply for SIGIN, BS1, BS2
Positive power supply pin for external interface
(power supply for input, output, and I/O ports)
Positive power supply pin for internal logic (internally generated).
A capacitor (0.1 mF) should be connected between this pin and VSS.
Positive power supply pin for low-speed clock (internally generated)
Voltage multiplier pin for power supply backup
(internally generated).
VDDI
36
42
—
VDDL
27
26
32
31
—
—
Power
Supply
VDD2
VDDH
28
33
—
A capacitor (1.0 mF) should be connected between this pin
and VSS
.
CB1
CB2
29
30
34
35
—
—
Pins to connect a capacitor for voltage multiplier.
A capacitor (1.0 mF) should be connected between CB1 and CB2.
Clock oscillation pins for POCSAG decoder.
XT0
14
15
I
A 32.768 kHz, 38.4 kHz, or 76.8 kHz crystal and capacitor (CG)
should be connected to these pins.
XT1
15
23
16
27
O
I
XTM0
Low-speed clock oscillation pins for CPU.
A 32.768 kHz crystal and capacitor (CGM) should be connected
to these pins.
XTM1
24
28
O
Oscillation
High-speed clock oscillation pins.
OSC0
OSC1
19
20
21
22
I
A ceramic resonator and capacitors (CL0, CL1) or external
oscillation resistor (ROS) should be connected to these pins.
Low-speed CPU clock select pins.
O
XTSEL0
XTSEL1
21
22
23
24
These pins are used to select a low-speed CPU clock.
Because these are high impedance inputs, be sure to tie these
I
I
pins to VDD or VSS
.
TST1
TST2
TST3
16
17
18
18
19
20
Input pins for testing.
Pull-down resistors are internally connected to these pins.
The user cannot use these pins.
Test
9/32
¡ Semiconductor
MSM63238
Table 1 Pin Descriptions (Basic Functions) (continued)
Pin
Function Symbol
Type
Description
GS-BK TS-K
Reset input pin.
Setting this pin to "H" level puts this device into a reset state.
hen, setting this pin to "L" level starts executing an instruction
T
Reset
RESET
34
39
I
from address 0000H.
A pull-down resistor is internally connected to this pin.
Melody output pin (normal phase)
Battery saving outputs.
Melody
MD
BS1
BS2
33
10
11
38
10
11
O
O
Signals to control intermittent operations of RF receiver.
Receive data input pin.
POCSAG
Decoder
SIGIN
12
12
I
Input pin for receive data from RF receiver.
4-bit input port.
P1.0/INT5
P1.1/INT5
P1.2/INT5
P1.3/INT5
50
51
52
53
59
61
62
64
Pull-up resistor input, pull-down resistor input, or
high-impedance input is selectable for each bit.
I
P2.0
P2.1
54
55
56
57
58
59
60
61
73
74
75
76
77
78
79
80
2
65
67
68
69
70
72
73
74
89
90
91
92
93
94
95
97
99
1
4-bit output ports.
P-channel open drain output, N-channel open drain output,
O
O
O
O
O
O
CMOS output, or high-impedance output is selectable for each
bit.
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
P4.0/A0
P4.1/A1
P4.2/A2
P4.3/A3
P5.0/A4
P5.1/A5
P5.2/A6
P5.3/A7
P6.0/A8
P6.1/A9
P6.2/A10
P6.3/A11
P7.0/A12
P7.1/A13
P7.2/A14
P7.3/A15
Port
3
4
2
5
3
6
4
7
5
8
7
9
8
10/32
¡ Semiconductor
MSM63238
Table 1 Pin Descriptions (Basic Functions) (continued)
Pin
Function Symbol
Type
Description
GS-BK TS-K
P8.0/RD
P8.1/WR
P9.0/D0
P9.1/D1
P9.2/D2
P9.3/D3
PA.0/D4
PA.1/D5
PA.2/D6
PA.3/D7
PB.0/INT0/
TM0CAP/
TM0OVF
PB.1/INT0/
TM1CAP/
62
64
65
66
67
68
69
70
71
72
75
77
79
80
81
82
84
85
86
87
2-bit input-output port and 4-bit input-output ports.
In input mode, pull-up resistor input, pull-down resistor input,
or high-impedance input is selectable for each bit.
In output mode, P-channel open drain output, N-channel open
drain output, CMOS output, or high-impedance output is
selectable for each bit.
I/O
I/O
I/O
46
47
54
56
I/O
TM1OVF
Port
PB.2/INT0/
48
49
42
43
44
45
57
58
48
51
52
53
T02CK
PB.3/INT0/
T13CK
PC.0/INT1/
RXD
PC.1/INT1/
TXC
I/O
I/O
PC.2/INT1/
RXC
PC.3/INT1/
TXD
PD.0
37
38
39
40
43
44
45
46
PD.1
PD.2
PD.3
11/32
¡ Semiconductor
MSM63238
Table 2 shows the secondary functions of each pin of the MSM63238.
Table 2 Pin Descriptions (Secondary Functions)
Pin
Function Symbol
Type
Description
External 0 interrupt input pins.
GS-BK TS-K
PB.0/INT0
PB.1/INT0
PB.2/INT0
PB.3/INT0
PC.0/INT1
46
47
48
49
42
43
44
45
50
51
52
53
46
47
54
56
57
58
48
51
52
53
59
61
62
64
54
56
The change of input signal level causes an interrupt to occur.
The Port B Interrupt Enable register (PBIE) enables or
disables an interrupt for each bit.
I
External 1 interrupt input pins.
The change of input signal level causes an interrupt to occur.
The Port C Interrupt Enable register (PCIE) enables or
disables an interrupt for each bit.
External
Interrupt
PC.1/INT1
PC.2/INT1
I
I
PC.3/INT1
P1.0/INT5
External 5 interrupt input pins.
The change of input signal level causes an interrupt to occur.
The Port 1 Interrupt Enable register (P1IE) enables or
disables an interrupt for each bit.
P1.1/INT5
P1.2/INT5
P1.3/INT5
PB.0/TM0CAP
PB.1/TM1CAP
I
I
Timer 0 capture trigger input pin.
Capture
Timer 1 capture trigger input pin.
12/32
¡ Semiconductor
MSM63238
Table 2 Pin Descriptions (Secondary Functions) (continued)
Pin
Function Symbol
Type
Description
Timer 0 overflow flag output pin.
GS-BK TS-K
PB.0/TM0OVF
46
47
48
49
39
40
42
54
56
57
58
45
46
48
O
O
I
PB.1/TM1OVF
Timer
Timer 1 overflow flag output pin.
PB.2/T02CK
External clock input pin for timer 0 and timer 2.
External clock input pin for timer 1 and timer 3.
Low-speed oscillation clock output pin
High-speed oscillation clock output pin
Serial port receive data input pin
PB.3/T13CK
I
Oscillation PD.2/TBCCLK
O
O
I
Output
PD.3/HSCLK
PC.0/RXD
Sync serial port clock input-output pin.
Transmit clock output when this device is used as a master
processor.
PC.1/TXC
43
51
I/O
Transmit clock input when this device is used as a slave
processor.
Serial
Port
Sync serial port clock input-output pin.
Receive clock output when this device is used as a master
processor.
PC.2/RXC
PC.3/TXD
44
45
52
53
I/O
O
Receive clock input when this device is used as a slave
processor.
Serial port transmit data output pin.
13/32
¡ Semiconductor
MSM63238
Table 2 Pin Descriptions (Secondary Functions) (continued)
Pin
Function Symbol
Type
Description
GS-BK TS-K
P4.0/A0
P4.1/A1
P4.2/A2
P4.3/A3
P5.0/A4
P5.1/A5
P5.2/A6
P5.3/A7
P6.0/A8
P6.1/A9
P6.2/A10
P6.3/A11
73
74
75
76
77
78
79
80
2
89
90
91
92
93
94
95
97
99
1
Address output bus for external memory
O
3
4
2
5
3
External
Memory
P7.0/A12
P7.1/A13
P7.2/A14
P7.3/A15
P9.0/D0
P9.1/D1
P9.2/D2
P9.3/D3
PA.0/D4
PA.1/D5
PA.2/D6
PA.3/D7
P8.0/RD
P8.1/WR
6
4
7
5
8
7
9
8
65
66
67
68
69
70
71
72
62
64
79
80
81
82
84
85
86
87
75
77
Data bus for external memory
I/O
O
O
Read signal output pin for external memory (negative logic)
Write signal output pin for external memory (negative logic)
14/32
¡ Semiconductor
MSM63238
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V)
Parameter
Symbol
Condition
Backup used, Ta = 25°C
Backup not used, Ta = 25°C
Ta = 25°C
Rating
Unit
–0.3 to +3.0
Power Supply Voltage 1
VDD
V
–0.3 to +6.0
Power Supply Voltage 2
Power Supply Voltage 3
Power Supply Voltage 4
Power Supply Voltage 5
Input Voltage 1
VDDI
VDDR
VDDH
VDDL
VIN1
–0.3 to +6.0
V
V
V
V
V
V
V
V
V
V
V
°C
Ta = 25°C
–0.3 to +6.0
Ta = 25°C
–0.3 to +6.0
Ta = 25°C
–0.3 to +6.0
VDD Input, Ta = 25°C
VDDI Input, Ta = 25°C
VDDR Input, Ta = 25°C
VDD output, Ta = 25°C
VDDI output, Ta = 25°C
VDDR output, Ta = 25°C
VDDH output, Ta = 25°C
—
–0.3 to VDD + 0.3
–0.3 to VDDI + 0.3
–0.3 to VDDR + 0.3
–0.3 to VDD + 0.3
–0.3 to VDDI + 0.3
–0.3 to VDDR + 0.3
–0.3 to VDDH + 0.3
–55 to +150
Input Voltage 2
VIN2
Input Voltage 3
VIN3
Output Voltage 1
VOUT1
VOUT2
VOUT3
VOUT4
TSTG
Output Voltage 2
Output Voltage 3
Output Voltage 4
Storage Temperature
15/32
¡ Semiconductor
MSM63238
RECOMMENDED OPERATING CONDITIONS
• When backup is used
(VSS = 0 V)
Parameter
Symbol
Top
Condition
Range
–20 to +70
0.9 to 2.7
0.9 to 5.5
0.9 to 5.5
30 to 80
Unit
°C
Operating Temperature
—
VDD
—
V
Operating Voltage
VDDI
VDDR
fXT
V
—
V
—
kHz
kHz
—
Crystal Oscillation Frequency
Ceramic Oscillation Frequency
External RC Oscillator Resistance
fXTM
30 to 35
—
VDD = 1.2 to 2.7 V
VDD = 1.5 to 2.7 V
VDD = 1.2 to 2.7 V
VDD = 1.5 to 2.7 V
300k to 500k
200k to 1M
100 to 300
50 to 300
fCM
Hz
ROS
kW
• When backup is not used
(VSS = 0 V)
Parameter
Symbol
Top
Condition
Range
–20 to +70
1.8 to 5.5
1.8 to 5.5
1.8 to 5.5
30 to 80
Unit
°C
Operating Temperature
—
VDD
—
V
Operating Voltage
VDDI
VDDR
fXT
V
—
V
—
kHz
kHz
—
Crystal Oscillation Frequency
Ceramic Oscillation Frequency
fXTM
30 to 35
—
VDD = 1.8 to 5.5 V
VDD = 2.2 to 5.5 V
VDD = 2.7 to 5.5 V
VDD = 1.8 to 5.5 V
VDD = 2.2 to 5.5 V
VDD = 2.7 to 5.5 V
300k to 500k
300k to 1M
200k to 2M
100 to 300
50 to 300
30 to 300
fCM
Hz
External RC Oscillator Resistance
ROS
kW
16/32
¡ Semiconductor
MSM63238
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = VDDI = VDDR = 0.9 to 5.5 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
suring
Circuit
Parameter
Symbol
Condition
Min. Typ. Max. Unit
High speed clock stop
V
DD = 1.5 V
2.8
2.0
—
—
3.0
2.7
V
V
Ch, C12 = 1 mF
VDDH Voltage (Backup used)
VDDH High speed clock oscillation
(Ceramic oscillation, 1 MHz)
VDD = 1.5 V
Ch, C12 = 1 mF
High speed clock stop
1.0
1.2
1.0
1.2
1.5
—
2.0
5.5
2.0
—
V
V
V
V
VDDL Voltage
VDDL High speed clock oscillation
(VDD = 1.2 to 5.5 V)
VDD2 Voltage
VDD2
—
1.5
—
Crystal Oscillation Start
Voltage
Oscillation start time: within
5 seconds
VSTA
Backup used (Ta = 25°C)
0.9
1.0
1.7
—
—
—
—
—
—
V
V
V
1
Crystal Oscillation Hold Voltage VHOLD Backup used
Backup not used
Crystal Oscillation Stop Detect
TSTOP
CG, CGM
CD, CDM
COS
—
0.1
5
—
—
25
12
5.0
25
30
16
ms
pF
pF
pF
Time
External Crystal Oscillator
Capacitance
—
—
—
Internal Crystal Oscillator
Capacitance
20
8
Internal RC Oscillator
Capacitance
VDD = 1.5 V
VDD = 3.0 V
VDD = 1.5 V
0.0
0.0
1.2
2.0
—
—
—
—
0.4
0.7
1.5
3.0
V
V
V
V
POR Voltage
VPOR1
VPOR2
Non-POR Voltage
VDD = 3.0 V
Notes: 1. "T
" indicates that if the crystal oscillator stops over the value of T
, the system
STOP
STOP
reset occurs.
2. "POR" denotes Power On Reset.
3. "V
" indicates that POR occurs when V falls from V to V
and again rises
POR1
DD
DD
POR1
up to V
.
DD
4. "V
" indicates that POR does not occur when V falls from V
to V
and
POR2
DD
DD
POR2
again rises up to V
.
DD
17/32
¡ Semiconductor
MSM63238
DC Characteristics (continued)
• When backup is used
(VDD = VDDI = 1.5 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
suring
Circuit
Parameter
Symbol
Condition
Unit
Min. Typ. Max.
CPU in HALT mode.
(High-speed clock oscillation stop)
Decoder in HALT mode.
Supply Current 1
IDD1
—
—
—
6.0
35
85
35
80
mA
(Decoder oscillation stop)
CPU in HALT mode.
(High-speed clock oscillation stop)
Decoder in carrier on state.
(76.8 kHz operation)
Supply Current 2
Supply Current 3
IDD2
mA
mA
CPU in HALT mode.
(High-speed clock oscillation stop)
Decoder in data receiving state.
(76.8 kHz operation)
IDD3
200
1
CPU in operation at 32 kHz.
(High-speed clock oscillation stop)
Decoder in HALT mode.
Supply Current 4
Supply Current 5
IDD4
—
—
22
40
mA
mA
(Decoder oscillation stop)
CPU in operation at high speed.
(RC oscillation, ROS = 51 kW)
Decoder in HALT mode.
IDD5
600
800
(Decoder oscillation stop)
CPU in operation at high speed.
(Ceramic oscillation, 1 MHz)
Decoder in HALT mode.
Supply Current 6
IDD6
—
700
900
mA
(Decoder oscillaiton stop)
18/32
¡ Semiconductor
MSM63238
DC Characteristics (continued)
• When backup is not used
(VDD = VDDI = 3.0 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
suring
Circuit
Parameter
Symbol
Condition
Unit
Min. Typ. Max.
CPU in HALT mode.
(High-speed clock oscillation stop)
Decoder in HALT mode.
Supply Current 1
IDD1
—
—
—
—
—
—
3.0
17
20
40
mA
(Decoder oscillation stop)
CPU in HALT mode.
(High-speed clock oscillation stop)
Decoder in carrier on state.
(76.8 kHz operation)
Supply Current 2
Supply Current 3
Supply Current 4
Supply Current 5
Supply Current 6
IDD2
IDD3
IDD4
IDD5
IDD6
mA
mA
mA
mA
CPU in HALT mode.
(High-speed clock oscillation stop)
Decoder in data receiving state.
(76.8 kHz operation)
42
100
25
1
CPU in operation at 32 kHz.
(High-speed clock oscillation stop)
Decoder in HALT mode.
10
(Decoder oscillation stop)
CPU in operation at high speed.
(RC oscillation, ROS = 51 kW)
Decoder in HALT mode.
450
600
(Decoder oscillation stop)
CPU in operation at high speed.
(Ceramic oscillation, 2 MHz)
Decoder in HALT mode.
800 1000 mA
(Decoder oscillation stop)
19/32
¡ Semiconductor
MSM63238
DC Characteristics (continued)
(VDD = VDDI = VDDH = VDDR = 3.0 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter
Symbol
Condition
Unit
Min. Typ. Max.
suring
Circuit
Output Current 1
(P2.0 to P2.3)
(P3.0 to P3.3)
(P4.0 to P4.3)
V
VOH1 = VDDI – 0.5 V VDDI = 3.0 V
VDDI = 5.0 V
DDI = 1.5 V
–2.5 –1.4 –0.4 mA
–6.0 –3.5 –1.0 mA
–8.5 –5.0 –1.5 mA
IOH1
.
.
.
VDDI = 1.5 V
0.4
1.0
1.5
1.4
3.0
3.7
2.5
6.0
8.5
mA
mA
mA
(PC.0 to PC.3)
(PD.0 to PD.3)
IOL1
IOH2
IOL2
IOH3
IOL3
VOL1 = 0.5 V
VDDI = 3.0 V
VDDI = 5.0 V
Output Current 2
(MD)
VDD = 1.5 V
–4.0 –2.0 –0.5 mA
–11.0 –6.0 –2.0 mA
VOH2 = VDD – 0.7 V VDD = 3.0 V
VDD = VDDH = 5.0 V –14.0 –9.0 –4.0 mA
VDD = 1.5 V
0.5
2.0
4.0
2.0
5.5
7.0
4.0
mA
VOL2 = 0.7 V
VDD = 3.0 V
11.0 mA
14.0 mA
VDD = VDDH = 5.0 V
Output Current 3
(BS1, BS2)
VDDR = 1.5 V
–7.0 –4.5 –1.0 mA
–16.0 –10.0 –2.0 mA
–24.0 –14.0 –3.0 mA
VOH3 = VDDR – 0.5 V VDDR = 3.0 V
VDDR = 5.0 V
VDDR = 1.5 V
1.0
2.0
3.0
4.0
8.0
9.5
7.0
mA
2
VOL3 = 0.5 V
VDDR = 3.0 V
VDDR = 5.0 V
16.0 mA
24.0 mA
Output Current 4
(OSC1)
VOH4R = VDDH – 0.5 V VDD = VDDH = 3.0 V –2.5 –1.3 –0.25 mA
IOH4R
IOL4R
IOH4C
IOL4C
(RC oscillation)
VOL4R = 0.5 V
(RC oscillation)
VDD = VDDH = 5.0 V –3.5 –1.7 –0.5 mA
VDD = VDDH = 3.0 V 0.25
VDD = VDDH = 5.0 V 0.5
1.5
1.8
2.5
3.5
mA
mA
VOH4C = VDDH – 0.5 V VDD = VDDH = 3.0 V –300 –160 –60 mA
(ceramic oscillation)
VOL4C = 0.5 V
VDD = VDDH = 5.0 V –400 –240 –100 mA
VDD = VDDH = 3.0 V
60
170
210
300 mA
400 mA
(ceramic oscillation)
VDD = VDDH = 5.0 V 100
Output Leakage
(P2.0 to P2.3)
(P3.0 to P3.3)
(P4.0 to P4.3)
IOOH
VOH = VDDI
—
—
—
1.0
—
mA
mA
.
.
.
IOOL
VOL = VSS
–1.0
(PD.0 to PD.3)
20/32
¡ Semiconductor
MSM63238
DC Characteristics (continued)
(VDD = VDDI = VDDH = VDDR = 3.0 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter
Symbol
Condition
Unit
suring
Circuit
Min. Typ. Max.
Input Current 1
(P1.0 to P1.3)
(P8.0, P8.1)
V
DDI = 1.5 V
2
20
45
mA
VIH1 = VDDI
IIH1
VDDI = 3.0 V
30
120
350
–20
260 mA
650 mA
(when pulled down)
V
V
V
DDI = 5.0 V
DDI = 1.5 V
DDI = 3.0 V
70
(P9.0 to P9.3)
.
.
.
–45
–2
mA
VIL1 = VSS
(PD.0 to PD.3)
IIL1
–260 –120 –30 mA
–650 –350 –70 mA
(when pulled up)
VDDI = 5.0 V
IIH1Z
IIL1Z
IIH2Z
IIL2Z
VIH1 = VDDI (in a high impedance state)
VIL1 = VSS (in a high impedance state)
VIH2 = VDDR
0.0
–1.0
0.0
—
—
—
—
1.0
0.0
1.0
0.0
mA
mA
mA
mA
Input Current 2
(SIGIN)
VIL2 = VSS
–1.0
Input Current 3
(OSC0)
VIL3 = VSS
VDD = VDDH = 3.0 V –350 –170 –30 mA
DD = VDDH = 5.0 V –750 –450 –200 mA
IIL3
(when pulled up)
V
IIH3R
IIL3R
VIH3 = VDDH (RC oscillation)
VIL3 = VSS (RC oscillation)
0.0
–1.0
0.1
—
—
1.0
0.0
1.0
3.0
mA
mA
mA
mA
3
VIH3 = VDDH
V
V
V
V
DD = VDDH = 3.0 V
0.5
1.5
IIH3C
IIL3C
(ceramic oscillation)
VIL3 = VSS
DD = VDDH = 5.0 V 0.75
DD = VDDH = 3.0 V –1.0 –0.5 –0.1 mA
DD = VDDH = 5.0 V –3.0 –1.5 –0.75 mA
(ceramic oscillation)
Input Current 4
(RESET)
VDD = 1.5 V
DD = 3.0 V
10
180
350 mA
IIH4
IIL4
IIH5
VIH4 = VDD
VIL4 = VSS
VIH5 = VDD
V
150 1100 2400 mA
VDD = VDDH = 5.0 V
0.5
–1.0
50
2.7
—
5.0
0.0
mA
mA
Input Current 5
VDD = 1.5 V
750 1500 mA
(TST1, TST2, TST3)
VDD = 3.0 V
0.5
3.0
6.5
—
5.5
mA
VDD = VDDH = 5.0 V 0.25
11.0 mA
IIL5
IIH6Z
IIL6Z
VIL5 = VSS
VIH6 = VDD
VIL6 = VSS
–1.0
0.0
0.0
1.0
0.0
mA
mA
mA
Input Current 6
—
(XTSEL0, XTSEL1)
–1.0
—
21/32
¡ Semiconductor
MSM63238
DC Characteristics (continued)
(VDD = VDDI = VDDH = VDDR = 3.0 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Parameter
Input Voltage 1
(P1.0 to P1.3)
(P8.0, P8.1)
Symbol
Condition
Unit
suring
Circuit
Min. Typ. Max.
V
DDI = 1.5 V
1.2
2.4
4.0
0.0
0.0
0.0
1.2
2.4
4.0
0.0
0.0
0.0
2.4
4.0
0.0
0.0
1.35
2.4
4.0
0.0
0.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.5
3.0
5.0
0.3
0.6
1.0
1.5
3.0
5.0
0.3
0.6
1.0
3.0
5.0
0.6
1.0
1.5
3.0
5.0
0.15
0.6
1.0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
VIH1
VDDI = 3.0 V
VDDI = 5.0 V
VDDI = 1.5 V
VDDI = 3.0 V
VDDI = 5.0 V
VDDR = 1.5 V
VDDR = 3.0 V
(P9.0 to P9.3)
.
.
.
VIL1
VIH2
VIL2
(PD.0 to PD.3)
Input Voltage 2
(SIGIN)
VDDR = 5.0 V
VDDR = 1.5 V
VDDR = 3.0 V
VDDR = 5.0 V
Input Voltage 3
(OSC0)
VDD = VDDH = 3.0 V
VDD = VDDH = 5.0 V
VDD = VDDH = 3.0 V
VDD = VDDH = 5.0 V
VIH3
VIL3
4
Input Voltage 4
(RESET, TST1, TST2, TST3,
XTSEL0, XTSEL1)
VDD = 1.5 V
VIH4
VDD = 3.0 V
VDD = VDDH = 5.0 V
VDD = 1.5 V
VIL4
VDD = 3.0 V
V
DD = VDDH = 5.0 V
Hysteresis Width 1
(P1.0 to P1.3)
(P8.0, P8.1)
VDDI = 1.5 V
0.05
0.2
0.1
0.5
1.0
0.3
1.0
1.5
V
V
V
DVT1
DVT2
VDDI = 3.0 V
.
.
.
V
DDI = 5.0 V
0.25
(PD.0 to PD.3)
Hysteresis Width 2
VDD = 1.5 V
VDD = 3.0 V
0.05
0.2
0.1
0.5
1.0
0.3
1.0
1.5
V
V
V
(RESET, TST1, TST2, TST3,
XTSEL0, XTSEL1)
V
DD = VDDH = 5.0 V
0.25
Input Pin Capacitance
(P1.0 to P1.3)
(P8.0, P8.1)
CIN
—
—
—
5
pF
1
(P9.0 to P9.3)
.
.
.
(PD.0 to PD.3)
22/32
¡ Semiconductor
MSM63238
Measuring circuit 1
CG
CB1
XT0
Cb12
CB2
76.8 kHz
XT1
Crystal
CGM
XTM0
OSC0
OSC1
q
w
32.768 kHz
Crystal
XTM1
VDDH VDDL VDD2
(*1)
VSS VDD VDDI VDDR
A
Cl
C2
Ch
V
V
V
Cl, C2
: 0.1 mF
: 1 mF
: 15 pF
: 30 pF
: 30 pF
*1 RC Oscillator
ROS
Ch, Cb12
CG, CGM
CL0
q
CL1
w
Ceramic Resonator : CSB1000J (1 MHz)
CSA2.00MG (2 MHz)
Ceramic Oscillator
CL0
(Murata MFG.-make)
q
Ceramic Resonator
w
CL1
Measuring circuit 2
(*3)
VIH
(*2)
INPUT
OUTPUT
A
VIL
VSS VDD
VDDI VDDR
VDDH VDDL VDD2
*2 Input logic circuit to determine the specified measuring conditions.
*3 Measured at the specified output pins.
23/32
¡ Semiconductor
MSM63238
Measuring circuit 3
(*4)
A
INPUT
OUTPUT
VSS VDD
VDDI VDDR
VDDH VDDL VDD2
Measuring circuit 4
VIH
Waveform
Monitoring
(*4)
INPUT
OUTPUT
VIL
VSS VDD
VDDI VDDR
VDDH VDDL VDD2
*4 Measured at the specified input pins.
24/32
¡ Semiconductor
MSM63238
AC Characteristics (Serial Interface, Serial Port)
(V = V
= 0.9 to 5.5 V, V
= 1.8 to 5.5 V, V = 0 V, V
= 5.0 V, Ta = –20 to +70°C unless
DD
DDR
DDH
SS
DDI
otherwise specified)
(1) Synchronous Communication
Min.
Typ.
Max.
Parameter
Symbol
Condition
Unit
TXC/RXC Input Fall Time
TXC/RXC Input Rise Time
tf
tr
—
—
—
—
—
—
1.0
1.0
ms
ms
TXC/RXC Input "L" Level
Pulse Width
tCWL
—
0.8
0.8
—
—
—
—
ms
ms
TXC/RXC Input "H" Level
Pulse Width
tCWH
tCYC
—
—
TXC/RXC Input Cycle Time
2.0
—
—
—
—
ms
ms
tCYC1(O) CPU in operation state at 32 kHz
30.5
TXC/RXC Output Cycle Time
CPU in operation at 2 MHz
tCYC2(O)
—
0.5
—
ms
VDD = VDDH = 2.7 V to 5.5 V
TXD Output Delay Time
RXD Input Setup Time
RXD Input Hold Time
tDDR
tDS
Output load capacitance 10 pF
—
0.5
0.8
—
—
—
0.4
—
—
ms
ms
ms
—
—
tDH
Synchronous communication timing
("H" level = 4.0 V, "L" level = 1.0 V)
tCYC
TXC (PC.1)/
RXC (PC.2)
5 V (VDDI
0 V (VSS
)
)
tr
tf
tCWH
tCWL
tDDR
tDDR
TXD (PC.3)
5 V (VDDI
)
0 V (VSS
)
tDS
tDH
tDS
5 V (VDDI
)
RXD (PC.0)
0 V (VSS
)
25/32
¡ Semiconductor
MSM63238
(2) UART Communication
Parameter
Symbol
Condition
Min.
Typ.
Max. Unit
TBRT = 1/fBRT
TCR = 1/fOSC
Transmit Baud Rate
Receive Baud Rate
TBRT
RBRT
T
BRT–TCR
TBRT
TBRT+TCR
s
s
RBRT = 1/fBRT
RBRT¥0.97 RBRT RBRT¥1.03
fBRT: Baud rates (1200, 2400, 4800, 9600 bps)
UART communication timing
("H" level = 4.0 V, "L" level = 1.0 V)
TBRT
5 V (VDDI
)
TXD (PC.3)
RXD (PC.0)
0 V (VSS
)
RBRT
5 V (VDDI
)
0 V (VSS
)
26/32
¡ Semiconductor
MSM63238
AC Characteristics (External Memory Interface)
(V = V
= 0.9 to 5.5 V, V
= 1.8 to 5.5 V, V = 0 V, V = 5.0 V, Ta = –20 to +70°C unless
DDI
DD
DDR
DDH
SS
otherwise specified)
(1) Reading from External Memory
(a) When CPU operates at 32.768 kHz
Parameter
Read Cycle Time
Symbol
tRC
Condition
Min.
—
Typ.
61.0
—
Max.
—
Unit
ms
—
—
—
—
RD Output Delay Time
Output Valid Time
tOE
—
5.0
ms
tOHA
tDO
—
—
5.0
ms
External Memory Output Delay Time
—
—
5.0
ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V)
Parameter
Read Cycle Time
Symbol
tRC
Condition
Min.
1.0
—
Typ.
—
Max.
—
Unit
ms
—
—
—
—
RD Output Delay Time
Output Valid Time
tOE
—
100
100
150
ns
tOHA
tDO
—
—
ns
External Memory Output Delay Time
—
—
ns
AC characteristics timing
("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB obj, xadr16
MOVXB obj, [RA]
S2 S1
S1
S2
S1
S2
System clock
tRC
Address output Port setup value
5 V (VDDI
)
P7 - P4
(A15 - A0)
Port setup value
Port setup value
0 V (VSS
)
5 V (VDDI
)
P8.0
(RD)
0 V (VSS
)
tOE
tOHA
5 V (VDDI
)
PA, P9
(D7 - D0)
Input data
tDO
Port setup value
0 V (VSS
)
27/32
¡ Semiconductor
MSM63238
(2) Writing to External Memory
(a) When CPU operates at 32.768 kHz
Parameter
Write Cycle Time
Symbol
Condition
Min.
—
Typ.
61.0
30.5
15.3
15.3
45.8
15.3
Max.
Unit
ms
tWC
tAS
tW
—
—
—
—
—
—
—
—
—
—
—
—
Address Setup Time
Write Time
—
ms
—
ms
Write Recovery Time
Data Setup Time
Data Hold Time
tWR
tDS
tDH
—
ms
—
ms
—
ms
(b) When CPU operates at 2 MHz (VDDH = 2.7 to 5.5 V)
Parameter
Write Cycle Time
Symbol
tWC
Condition
Min.
1.0
0.4
0.2
0.2
0.7
0.2
Typ.
—
Max.
—
Unit
ms
—
—
—
—
—
—
Address Setup Time
Write Time
tAS
—
—
ms
tW
—
—
ms
Write Recovery Time
Data Setup Time
Data Hold Time
tWR
—
—
ms
tDS
—
—
ms
tDH
—
—
ms
AC characteristics timing
("H" level = 4.0 V, "L" level = 1.0 V)
MOVXB [RA], obj or MOVXB xadr16, obj
S1 S2 S1 S2 S1
S2
System clock
tWC
Address output Port setup value
5 V (VDDI
)
P7 - P4
(A15 - A0)
Port setup value
Port setup value
0 V (VSS
)
PA, P9
(D7 - D0)
5 V (VDDI
)
Output data
Port setup value
0 V (VSS
)
tDS
tDH
5 V (VDDI
)
P8.1
(WR)
0 V (VSS
)
tAS
tW tWR
28/32
¡ Semiconductor
MSM63238
APPLICATION CIRCUITS
• RC oscillation is selected as high-speed oscillation.
• Ports and RF section are powered from
external memory power source.
• CV is an IC power supply bypass capacitor.
• Values of Cl, C2, CG, CGM, Ch, Cb12, and CV are
for reference only.
76.8 kHz
Crystal
XT0
OSC0
ROS
CG
5 to 25 pF
OSC1
VDDR
XT1
32.768 kHz
Crystal
SIGIN
BS1
VDD
RF Section
VSS
XTM0
CGM
5 to 25 pF
BS2
XTM1
1.0 mF
Ch
VDDH
VDD
1.5 V
CV
MSM63238
VDD
Key Matrix
LED
Vibrator
UART
P2
PC
PD
0.1 mF
1.0 mF
CB1
CB2
VDDL
Cb12
VSS
0.1 mF
0.1 mF
Cl
VDDI
C2
VDD2
VDD
XTSEL0
XTSEL1
A15-0
P4-7
RESET
TST1
TST2
TST3
P9, PA
D7-0 LCD Module
5.0 V
Push SW
ROM
SRAM
WR
RD
P8.0
P8.1
Open
EEPROM
P3
External
Memory
VSS
VSS
Note:
V
is the power supply pin for the input, output, and input-output ports. V
is the
DDI
DDR
interface power supply pin for SIGIN, BS1, and BS2.
Be sure to connect the V and V pins either to the positive power supply pin (V )
DD
DDI
DDR
of this device or to the positive power supply pin of the external memory.
Application Circuit Example with Power Supply Backup
29/32
¡ Semiconductor
MSM63238
APPLICATION CIRCUITS (continued)
• Ceramic oscillation is selected as high-speed oscillation.
• Ports and RF section are powered from
external memory power source.
• CV is an IC power supply bypass capacitor.
• Values of Cl, C2, CG, CV, CL0, and CL1 are for
reference only.
CL0 30 pF
32.768 kHz
Crystal
XT0
OSC0
Ceramic
Resonator
CG
5 to 25 pF
OSC1
CL1
30 pF
XT1
VDDR
VDD
RF Section
VSS
SIGIN
BS1
XTM0
XTM1
BS2
VDDH
VDD
3.0 V
MSM63238
VDD
Key Matrix
LED
Vibrator
UART
P2
PC
PD
0.1 mF
CV
CB1
CB2
Open
VSS
0.1 mF
0.1 mF
Cl
VDDL
VDDI
C2
VDD2
VDD
XTSEL0
XTSEL1
A15-0
P4-7
P9, PA
D7-0 LCD Module
ROM
RESET
TST1
TST2
TST3
RD
P8.0
P8.1
Push SW
Open
SRAM
WR
EEPROM
P3
External
Memory
VSS
VSS
Note:
V
is the power supply pin for the input, output, and input-output ports. V
is the
DDI
DDR
interface power supply pin for SIGIN, BS1, and BS2.
Be sure to connect the V and V pins either to the positive power supply pin (V )
DD
DDI
DDR
of this device or to the positive power supply pin of the external memory.
Application Circuit Example with No Power Supply Backup
30/32
¡ Semiconductor
MSM63238
PACKAGE DIMENSIONS
(Unit : mm)
QFP80-P-1420-0.80-BK
Mirror finish
Package material
Lead frame material
Pin treatment
Epoxy resin
42 alloy
Solder plating
5 mm or more
Solder plate thickness
Package weight (g)
1.27 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
31/32
¡ Semiconductor
MSM63238
PACKAGE DIMENSIONS
(Unit : mm)
TQFP100-P-1414-0.50-K
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.55 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
32/32
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