74ALVC162244TX [ONSEMI]

低电压 16 位缓冲器/线路驱动器,带 3.6V 耐压输入和输出,输出中 26 Ω 串联电阻;
74ALVC162244TX
型号: 74ALVC162244TX
厂家: ONSEMI    ONSEMI
描述:

低电压 16 位缓冲器/线路驱动器,带 3.6V 耐压输入和输出,输出中 26 Ω 串联电阻

驱动 光电二极管 逻辑集成电路 驱动器
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November 2001  
Revised November 2001  
74ALVC162244  
Low Voltage 16-Bit Buffer/Line Driver  
with 3.6V Tolerant Inputs and Outputs  
and 26Series Resistor in Outputs  
General Description  
The ALVC162244 contains sixteen non-inverting buffers  
with 3-STATE outputs to be employed as a memory and  
Features  
1.65V to 3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
address driver, clock driver, or bus oriented transmitter/  
receiver. The device is nibble (4-bit) controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
26series resistors in outputs  
tPD  
The 74ALVC162244 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V. The  
3.8 ns max for 3.0V to 3.6V VCC  
4.3 ns max for 2.3V to 2.7V VCC  
7.6 ns max for 1.65V to 1.95V VCC  
74ALVC162244 is also designed with 26series resistors  
in the outputs. This design reduces line noise in applica-  
tions such as memory address drivers, clock drivers, and  
bus transceivers/transmitters.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal  
Uses patented noise/EMI reduction circuitry  
Latchup conforms to JEDEC JED78  
ESD performance:  
The 74ALVC162244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA)  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pull-up resistor; the minimum  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74ALVC162244GX  
(Note 2)  
BGA54A  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74ALVC162244T  
(Note 3)  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 2: BGA package available in Tape and Reel only.  
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
© 2001 Fairchild Semiconductor Corporation  
DS500696  
www.fairchildsemi.com  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
I0I15  
O0O15  
NC  
Output Enable Input (Active LOW)  
Inputs  
Outputs  
No Connect  
Connection Diagrams  
FBGA Pin Assignments  
Pin Assignment for TSSOP  
1
2
3
4
5
6
A
B
C
D
E
F
O0  
O2  
NC  
O1  
OE1  
NC  
OE2  
NC  
NC  
I1  
I0  
I2  
O4  
O3  
VCC  
GND  
GND  
GND  
VCC  
NC  
VCC  
GND  
GND  
GND  
VCC  
NC  
I3  
I4  
O6  
O5  
I5  
I6  
O8  
O7  
I7  
I8  
O10  
O12  
O14  
O9  
I9  
I10  
I12  
I14  
G
H
O11  
O13  
I11  
I13  
J
O15  
NC  
OE4  
OE3  
NC  
I15  
Truth Tables  
Inputs  
Outputs  
OE1  
L
I0–I3  
L
O0–O3  
L
H
Z
L
H
H
X
Inputs  
OE2  
Outputs  
O4–O7  
I4–I7  
Pin Assignment for FBGA  
L
L
L
H
X
L
H
Z
H
Inputs  
OE3  
Outputs  
O8–O11  
I8–I11  
L
L
L
H
X
L
H
Z
H
Inputs  
OE4  
Outputs  
O12–O15  
(Top Thru View)  
I12–I15  
L
L
L
H
X
L
H
Z
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial (HIGH or LOW, inputs may not float)  
Z = High Impedance  
www.fairchildsemi.com  
2
Functional Description  
The 74ALVC162244 contains sixteen non-inverting buffers  
with 3-STATE outputs. The device is nibble (4 bits) con-  
trolled with each nibble functioning identically, but indepen-  
dent of each other. The control pins may be shorted  
together to obtain full 16-bit operation.The 3-STATE out-  
puts are controlled by an Output Enable (OEn) input. When  
OEn is LOW, the outputs are in the 2-state mode. When  
OEn is HIGH, the standard outputs are in the high imped-  
ance mode but this does not interfere with entering new  
data into the inputs.  
Logic Diagram  
3
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 4)  
Recommended Operating  
Conditions (Note 6)  
Supply Voltage (VCC  
)
0.5V to +4.6V  
0.5V to 4.6V  
DC Input Voltage (VI)  
Power Supply  
Output Voltage (VO) (Note 5)  
0.5V to VCC +0.5V  
Operating  
1.65V to 3.6V  
0V to VCC  
DC Input Diode Current (IIK  
)
Input Voltage  
VI < 0V  
50 mA  
50 mA  
±50 mA  
Output Voltage (VO)  
Free Air Operating Temperature (TA)  
Minimum Input Edge Rate (t/V)  
0V to VCC  
DC Output Diode Current (IOK  
O < 0V  
DC Output Source/Sink Current  
(IOH/IOL  
)
40°C to +85°C  
V
V
IN = 0.8V to 2.0V, VCC = 3.0V  
10 ns/V  
Note 4: The Absolute Maximum Ratings are those values beyond which  
the safety of the device cannot be guaranteed. The device should not be  
operated at these limits. The parametric values defined in the Electrical  
Characteristics tables are not guaranteed at the Absolute Maximum Rat-  
ings. The Recommended Operating Conditionstable will define the condi-  
tions for actual device operation.  
)
DC VCC or GND Current per  
Supply Pin (ICC or GND)  
±100 mA  
Storage Temperature Range (TSTG  
)
65°C to +150°C  
Note 5: IO Absolute Maximum Rating must be observed.  
Note 6: Floating or unused control inputs must be held HIGH or LOW.  
DC Electrical Characteristics  
VCC  
Symbol  
VIH  
Parameter  
Conditions  
Min  
Max  
Units  
(V)  
HIGH Level Input Voltage  
1.65 - 1.95 0.65 x VCC  
2.3 - 2.7  
2.7 - 3.6  
1.65 - 1.95  
2.3 - 2.7  
2.7 - 3.6  
1.65 - 3.6  
1.65  
1.7  
2.0  
V
VIL  
LOW Level Input Voltage  
HIGH Level Output Voltage  
0.35 x VCC  
0.7  
V
V
0.8  
VOH  
I
OH = −100 µA  
OH = −2 mA  
OH = −4 mA  
OH = −6 mA  
VCC - 0.2  
I
1.2  
1.9  
1.7  
2.4  
2
I
2.3  
I
2.3  
3
I
OH = −8 mA  
OH = −12 mA  
OL = 100 µA  
OL = 2 mA  
OL = 4 mA  
OL = 6 mA  
2.7  
I
3.0  
2
VOL  
LOW Level Output Voltage  
I
1.65 - 3.6  
1.65  
0.2  
0.45  
0.4  
I
I
2.3  
I
2.3  
0.55  
0.55  
0.6  
V
3
IOL = 8 mA  
2.7  
IOL = 12 mA  
3
0.8  
II  
Input Leakage Current  
3-STATE Output Leakage  
Quiescent Supply Current  
Increase in ICC per Input  
0 VI 3.6V  
0 VO 3.6V  
3.6  
±5.0  
±10  
40  
µA  
µA  
µA  
µA  
IOZ  
ICC  
ICC  
3.6  
VI = VCC or GND, IO = 0  
IH = VCC 0.6V  
3.6  
V
3 - 3.6  
750  
www.fairchildsemi.com  
4
AC Electrical Characteristics  
T
A = −40°C to +85°C, RL = 500Ω  
C
L = 50 pF  
C
L = 30 pF  
Symbol  
Parameter  
Units  
V
CC = 3.3V ± 0.3V  
VCC = 2.7V  
V
CC = 2.5V ± 0.2V CC = 1.8V ± 0.15V  
V
Min  
Max  
3.8  
4.3  
4.1  
Min  
1.5  
1.5  
1.5  
Max  
Min  
Max  
3.8  
Min  
1.5  
1.5  
1.5  
Max  
7.6  
9.8  
7.2  
t
t
PHL, tPLH  
PZL, tPZH  
Propagation Delay  
Output Enable Time  
Output Disable Time  
1.3  
1.3  
1.3  
4.3  
5.6  
4.5  
1.0  
1.0  
1.0  
ns  
ns  
ns  
5.1  
tPLZ, tPHZ  
4.0  
Capacitance  
T
A = +25°C  
Symbol  
Parameter  
Conditions  
Units  
VCC  
Typical  
CIN  
Input Capacitance  
Output Capacitance  
Power Dissipation Capacitance  
VI = 0V or VCC  
VI = 0V or VCC  
3.3  
3.3  
3.3  
2.5  
6
7
pF  
pF  
COUT  
CPD  
Outputs Enabled f = 10 MHz, CL = 50 pF  
20  
20  
pF  
5
www.fairchildsemi.com  
AC Loading and Waveforms  
TABLE 1. Values for Figure 1  
TEST  
SWITCH  
Open  
VL  
tPLH, tPHL  
tPZL, tPLZ  
tPZH, tPHZ  
GND  
FIGURE 1. AC Test Circuit  
TABLE 2. Variable Matrix  
(Input Characteristics: f = tr = tf = 2ns; Z0 = 50Ω  
VCC  
Symbol  
3.3V ± 0.3V  
1.5V  
2.7V  
1.5V  
2.5V ± 0.2V  
VCC/2  
1.8V ± 0.15V  
VCC/2  
Vmi  
Vmo  
VX  
1.5V  
1.5V  
VCC/2  
VCC/2  
V
OL + 0.3V  
V
OL + 0.3V  
V
OL + 0.15V  
VOL + 0.15V  
VY  
V
OH 0.3V  
V
OH 0.3V  
VOH 0.15V  
V
OH 0.15V  
VL  
6V  
6V  
VCC*2  
VCC*2  
FIGURE 2. Waveform for Inverting and Non-Inverting Functions  
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic  
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
Package Number BGA54A  
7
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Package Number MTD48  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
www.fairchildsemi.com  
8
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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