74LCX157MTC [ONSEMI]

低电压四路 2 输入多路复用器,带 5V 耐压输入;
74LCX157MTC
型号: 74LCX157MTC
厂家: ONSEMI    ONSEMI
描述:

低电压四路 2 输入多路复用器,带 5V 耐压输入

光电二极管 逻辑集成电路 复用器
文件: 总12页 (文件大小:417K)
中文:  中文翻译
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April 2015  
74LCX157  
Low Voltage Quad 2-Input Multiplexer  
with 5 V Tolerant Inputs  
Features  
General Description  
• 5 V Tolerant Inputs  
The LCX157 is a high-speed quad 2-input multiplexer.  
Four bits of data from two sources can be selected using  
the common Select and Enable inputs. The four outputs  
present the selected data in the true (noninverted) form.  
• 2.3 V – 3.6 V, VCC Specifications Provided  
• 5.8 ns tPD max. (VCC = 3.3 V), 10 μA ICC max.  
• Power Down High Impedance Inputs and Outputs  
• ±24 mA Output Drive (VCC = 3.0 V)  
• Implements Patented Noise/EMI Reduction Circuitry  
• Latch-Up Performance Exceeds 500 mA  
• ESD Performance:  
The LCX157 can also be used as a function generator.  
The 74LCX157 is fabricated with advanced CMOS tech-  
nology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
Human Body Model > 2000 V  
Machine Model > 200 V  
Ordering Information  
Part Number  
74LCX157M  
Top Mark  
LCX157  
LCX157  
LCX157  
LCX157  
Package  
SOIC 16L  
Packing Method  
Rail  
74LCX157MX  
74LCX157MTC  
74LCX157MTCX  
SOIC 16L  
Tape and Reel  
Rail  
TSSOP 16L  
TSSOP 16L  
Tape and Reel  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
I
0a–I0d  
1a–I1d  
E
Source 0 Data Inputs  
Source 1 Data Inputs  
Enable Input  
I
S
Select Input  
Za–Zd  
Outputs  
Functional Description  
Truth Table  
The LCX157 is a quad 2-input multiplexer. It selects four  
bits of data from two sources under the control of a com-  
mon Select input (S). The Enable input (E) is active-LOW.  
Inputs  
Outputs  
E
S
I0  
I1  
Z
When E is HIGH, all of the outputs (Z) are forced LOW  
regardless of all other inputs. The LCX157 is the logic  
implementation of a 4-pole, 2-position switch where the  
position of the switch is determined by the logic levels  
supplied to the Select input. The logic equations for the  
outputs are shown below:  
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
L
L
H
X
X
H
L
Za = E • (I1a • S + I0a • S)  
Zb = E • (I1b • S + I0b • S)  
Zc = E • (I1c • S + I0c • S)  
Zd = E • (I1d • S + I0d • S)  
L
H
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
A common use of the LCX157 is the moving of data from  
two groups of registers to four common output busses.  
The particular register from which the data comes is  
determined by the state of the Select input. A less obvi-  
ous use is as a function generator. The LCX157 can gen-  
erate any four of the sixteen different functions of two  
variables with one variable common. This is useful for  
implementing gating functions.  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
2
Logic Diagram(1)  
Note:  
1. Please note that this diagram is provided only for the understanding of logic operations and should not be used to  
estimate propagation delays.  
Absolute Maximum Ratings(2)  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-  
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-  
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The  
absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
VI  
Parameter  
Supply Voltage  
Value  
-0.5 to +7.0  
-0.5 to +7.0  
-0.5 to VCC+0.5  
-50  
Conditions  
Unit  
V
DC Input Voltage  
V
VO  
DC Output Voltage  
DC Input Diode Current  
Output in HIGH or LOW State(3)  
VI < GND  
V
IIK  
mA  
-50  
VO < GND  
IOK  
DC Output Diode Current  
mA  
+50  
VO > VCC  
IO  
DC Output Source/Sink Current  
DC Supply Current per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature  
±50  
mA  
mA  
mA  
°C  
ICC  
±100  
IGND  
TSTG  
Notes:  
±100  
-65 to +150  
2. The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The  
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are  
not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the  
conditions for actual device operation.  
3. IO Absolute Maximum Rating must be observed.  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
3
Recommended Operating Conditions(4)  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
VCC  
Parameter  
Min.  
2.0  
0
Max.  
3.6  
5.5  
VCC  
±24  
±12  
±8  
Unit  
V
Supply Voltage  
Input Voltage  
Output Voltage  
Operating  
VIN  
V
VOUT  
HIGH or LOW State  
0
V
VCC = 3.0 V - 3.6 V  
I
OH/IOL  
Output Current  
VCC = 2.7 V - 3.0 V  
VCC = 2.3 V - 2.7 V  
mA  
TA  
Free-Air Operating Temperature  
Input Edge Rate, VIN = 0.8 V - 2.0 V, VCC = 3.0 V  
-40  
0
85  
°C  
Δt/ΔV  
10  
ns/V  
Note:  
4. Unused inputs must be held HIGH or LOW. They may not float.  
DC Electrical Characteristics  
TA = -40 to +85°C  
Symbol  
VIH  
Parameter  
Conditions  
VCC (V)  
Unit  
V
Min.  
1.7  
Max.  
2.3 - 2.7  
2.7 - 3.6  
2.3 - 2.7  
2.7 - 3.6  
2.3 - 3.6  
2.3  
HIGH Level Input Voltage  
LOW Level Input Voltage  
2.0  
0.7  
0.8  
VIL  
V
IOH = -100 μA  
VCC - 0.2  
1.8  
I
OH = -8 mA  
VOH  
IOH = -12 mA  
IOH = -18 mA  
IOH = -24 mA  
IOL = 100 μA  
2.7  
2.2  
V
V
HIGH Level Output Voltage  
LOW Level Output Voltage  
3.0  
2.4  
3.0  
2.2  
2.3 - 3.6  
2.3  
0.2  
0.6  
0.4  
0.4  
0.55  
±5.0  
10  
I
OL = 8 mA  
VOL  
IOL = 12 mA  
2.7  
IOL = 16 mA  
3.0  
IOL = 24 mA  
3.0  
II  
0 VI 5.5 V  
VI or VO = 5.5 V  
VI = VCC or GND  
3.6 V VI 5.5 V  
2.3 - 3.6  
0
μA  
μA  
Input Leakage Current  
IOFF  
Power-Off Leakage Current  
2.3 - 3.6  
2.3 - 3.6  
10  
ICC  
μA  
μA  
Quiescent Supply Current  
Increase in ICC per Input  
±10  
ΔICC  
VIH = VCC - 0.6 V  
2.3 - 3.6  
500  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
4
AC Electrical Characteristics  
TA = -40 to +85°C, RL = 500 Ω  
VCC = 3.3 V ± 0.3 V  
CL = 50 pF  
VCC = 2.7 V  
CL = 50 pF  
V
CC = 2.5 V ± 0.2 V  
Symbol  
Parameter  
Unit  
CL = 30 pF  
Min.  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
Max.  
7.0  
7.0  
7.0  
7.0  
5.8  
5.8  
1.0  
1.0  
Min.  
Max.  
8.0  
8.0  
8.0  
8.0  
6.3  
6.3  
Min.  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
Max.  
8.4  
8.4  
8.4  
8.4  
7.0  
7.0  
tPHL  
tPLH  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
Propagation Delay  
S -> Zn  
ns  
ns  
ns  
ns  
tPHL  
Propagation Delay  
E -> Zn  
tPLH  
tPHL  
Propagation Delay  
In -> Zn  
tPLH  
tOSHL  
tOSLH  
Note:  
Output to Output Skew(5)  
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate  
outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-  
LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.  
Dynamic Switching Characteristics  
TA = 25°C  
Symbol  
VOLP  
Parameter  
Conditions  
VCC (V)  
Unit  
V
Typical  
0.8  
CL = 50 pF, VIH = 3.3 V, VIL = 0 V  
CL = 30 pF, VIH = 2.5 V, VIL = 0 V  
CL = 50 pF, VIH = 3.3 V, VIL = 0 V  
CL = 30 pF, VIH = 2.5 V, VIL = 0 V  
3.3  
2.5  
3.3  
2.5  
Quiet Output Dynamic Peak VOL  
Quiet Output Dynamic Valley VOL  
0.6  
-0.8  
VOLV  
V
-0.6  
Capacitance  
Symbol  
Parameter  
Conditions  
VCC = Open, VI = 0 V or VCC  
VCC = 3.3 V, VI = 0 V or VCC  
Typical  
Unit  
pF  
CIN  
COUT  
CPD  
Input Capacitance  
7
8
Output Capacitance  
pF  
Power Dissipation Capacitance VCC = 3.3 V, VI = 0 V or VCC, f = 10 MHz  
25  
pF  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
5
AC Loading and Waveforms Generic for LCX Family  
Figure 1. AC Test Circuit (CL includes probe and jig capacitance)  
Test  
Switch  
tPLH, tPHL  
tPZL, tPLZ  
Open  
6V at VCC = 3.3 0.3V  
VCC x 2 at VCC = 2.5 0.2V  
tPZH, tPHZ  
GND  
3-STATE Output Low Enable and  
Disable Times for Logic  
Waveform for Inverting and Non-Inverting Functions  
Setup Time, Hold Time and Recovery Time for Logic  
Propagation Delay. Pulse Width and trec Waveforms  
3-STATE Output High Enable and  
Disable Times for Logic  
t
rise and tfall  
Figure 2. Waveforms  
(Input Characteristics; f = 1 MHz, tr = tf = 3 ns)  
VCC  
Symbol  
3.3V 0.3V  
1.5V  
2.7V  
1.5V  
2.5V 0.2V  
Vmi  
Vmo  
Vx  
VCC/2  
VCC/2  
1.5V  
1.5V  
VOL + 0.3V  
VOH 0.3V  
VOL + 0.3V  
VOH 0.3V  
VOL + 0.15V  
VOH 0.15V  
Vy  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
6
Schematic Diagram Generic for LCX Family  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
7
Physical Dimensions  
10.00  
9.80  
A
8.89  
16  
9
B
1.75  
4.00  
3.80  
6.00  
5.6  
1
8
PIN ONE  
INDICATOR  
0.51  
0.35  
1.27  
(0.30)  
1.27  
0.65  
M
0.25  
C B A  
LAND PATTERN RECOMMENDATION  
1.75 MAX  
1.50  
SEE DETAIL A  
1.25  
0.25  
0.19  
0.25  
0.10  
C
0.10  
C
0.50  
0.25  
X 45°  
NOTES: UNLESS OTHERWISE SPECIFIED  
(R0.10)  
A) THIS PACKAGE CONFORMS TO JEDEC  
MS-012, VARIATION AC, ISSUE C.  
GAGE PLANE  
0.36  
(R0.10)  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD  
FLASH AND TIE BAR PROTRUSIONS  
8°  
0°  
D) CONFORMS TO ASME Y14.5M-1994  
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM  
F) DRAWING FILE NAME: M16AREV12.  
SEATING PLANE  
0.90  
0.50  
(1.04)  
DETAIL A  
SCALE: 2:1  
Figure 3. 16-LEAD, SOIC, JEDEC MS-012, 0.150 INCH, NARROW BODY  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
8
Physical Dimensions (Continued)  
5.00 0.10  
4.55  
5.90  
4.45 7.35  
0.65  
4.4 0.1  
1.45  
5.00  
0.11  
12°  
MTC16rev4  
Figure 4. 16-LEAD, TSSOP, JEDEC MO-153, 4.4 MM WIDE  
© 1995 Fairchild Semiconductor Corporation  
74LCX157 Rev. 1.3  
www.fairchildsemi.com  
9
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