74LCX16543MTDX [ONSEMI]
低压16位寄存收发器（5V容许输入和输出电压）;
| 型号： | 74LCX16543MTDX |
| 厂家： | 
ONSEMI |
| 描述： | 低压16位寄存收发器（5V容许输入和输出电压） 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总11页 (文件大小：210K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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May 1995
Revised April 2001
74LCX16543
Low Voltage 16-Bit Registered Transceiver
with 5V Tolerant Inputs and Outputs
General Description
Features
■ 5V tolerant inputs and outputs
The LCX16543 contains sixteen non-inverting transceivers
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
■ 2.3V–3.6V VCC specifications provided
■ 5.2 ns tPD max (VCC = 3.3V), 20 µA ICC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ ±24 mA Output Drive (VCC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
The LCX16543 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
Human Body Model > 2000V
The LCX16543 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Machine Model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX16543MEA
74LCX16543MTD
MS56A
MTD56
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
© 2001 Fairchild Semiconductor Corporation
DS012464
www.fairchildsemi.com
Pin Descriptions
Pin Names
Description
OEABn
OEBAn
CEABn
CEBAn
LEABn
LEBAn
A0–A15
B0–B15
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or B-to-A 3-STATE Outputs
B-to-A Data Inputs or A-to-B 3-STATE Outputs
Data I/O Control Table
Inputs
CEABn LEABn OEABn
Latch Status Output Buffers
(Byte n)
(Byte n)
H
X
L
X
H
L
X
X
X
H
L
Latched
Latched
Transparent
—
High Z
—
—
X
L
X
X
High Z
Driving
—
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using CEBAn, LEBAn and OEBAn
Functional Description
The LCX16543 contains sixteen non-inverting transceivers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The following description applies to
each byte. For data flow from A to B, for example, the
A-to-B Enable (CEABn) input must be LOW in order to
makes the A-to-B latches transparent; a subsequent LOW-
to-HIGH transition of the LEABn signal puts the A latches in
the storage mode and their outputs no longer change with
the A inputs. With CEABn and OEABn both LOW, the
3-STATE B output buffers are active and reflect the data
present at the output of the A latches. Control of data flow
from B to A is similar, but using the CEBAn, LEBAn and
enter data from A0–A15 or take data from B0–B15, as indi-
cated in the Data I/O Control Table. With CEABn LOW, a
LOW signal on the A-to-B Latch Enable (LEABn) input
OEBAn inputs.
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2
Logic Diagrams
Byte 1 (0:7)
Byte 2 (8:15)
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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Absolute Maximum Ratings(Note 2)
Symbol
VCC
Parameter
Supply Voltage
Value
Conditions
Units
−0.5 to +7.0
−0.5 to +7.0
−0.5 to +7.0
V
V
VI
DC Input Voltage
VO
DC Output Voltage
Output in 3-STATE
V
−0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 3)
IIK
DC Input Diode Current
DC Output Diode Current
−50
−50
VI < GND
mA
mA
IOK
V
V
O < GND
O > VCC
+50
IO
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
±50
mA
mA
mA
°C
ICC
±100
IGND
TSTG
±100
−65 to +150
Recommended Operating Conditions (Note 4)
Symbol
Parameter
Min
2.0
1.5
0
Max
3.6
3.6
5.5
VCC
5.5
±24
±12
±8
Units
VCC
Supply Voltage
Operating
Data Retention
V
V
V
VI
Input Voltage
VO
Output Voltage
HIGH or LOW State
3-STATE
0
0
IOH/IOL
Output Current
V
V
V
CC = 3.0V − 3.6V
CC = 2.7V − 3.0V
CC = 2.3V − 2.7V
mA
TA
Free-Air Operating Temperature
−40
85
°C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0
10
ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Unused (inputs or I/Os) must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
VCC
TA = −40°C to +85°C
Symbol
VIH
Parameter
Conditions
Units
(V)
2.3 − 2.7
2.7 − 3.6
2.3 − 2.7
2.7 − 3.6
2.3 − 3.6
2.3
Min
1.7
2.0
Max
HIGH Level Input Voltage
V
V
VIL
LOW Level Input Voltage
HIGH Level Output Voltage
0.7
0.8
VOH
I
OH = −100 µA
OH = −8 mA
OH = −12 mA
OH = −18 mA
OH = −24 mA
OL = 100 µA
OL = 8 mA
OL = 12 mA
OL = 16 mA
OL = 24 mA
VCC − 0.2
I
1.8
I
2.7
2.2
V
V
I
3.0
2.4
I
3.0
2.2
VOL
LOW Level Output Voltage
I
2.3 − 3.6
2.3
0.2
0.6
I
I
2.7
0.4
I
3.0
0.4
I
3.0
0.55
±5.0
II
Input Leakage Current
3-STATE I/O Leakage
0 ≤ VI ≤ 5.5V
0 ≤ VO ≤ 5.5V
VI = VIH or VIL
2.3 − 3.6
µA
µA
µA
IOZ
2.3 − 3.6
±5.0
IOFF
Power-Off Leakage Current
VI or VO = 5.5V
0
10
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4
DC Electrical Characteristics (Continued)
VCC
TA = −40°C to +85°C
Symbol
ICC
Parameter
Conditions
Units
(V)
Min
Max
20
Quiescent Supply Current
VI = VCC or GND
3.6V ≤ VI, VO ≤ 5.5V (Note 5)
VIH = VCC −0.6V
2.3 − 3.6
2.3 − 3.6
2.3 − 3.6
µA
µA
±20
500
∆ICC
Increase in ICC per Input
Note 5: Outputs in disabled or 3-STATE only.
AC Electrical Characteristics
T
A = −40°C to +85°C, RL = 500 Ω
V
CC = 3.3V ± 0.3V
L = 50 pF
Max
V
CC = 2.7V
L = 50 pF
Max
V
CC = 2.5V ± 0.2V
L = 30 pF
Min Max
Symbol
Parameter
Units
C
C
C
Min
Min
tPHL
Propagation Delay
1.5
1.5
1.5
1.5
5.2
5.2
6.5
6.5
1.5
1.5
1.5
1.5
6.0
6.0
7.5
7.5
1.5
1.5
1.5
1.5
6.2
6.2
7.8
7.8
ns
ns
tPLH
tPHL
tPLH
tPZL
tPZH
An to Bn or Bn to An
Propagation Delay
LEBAn to An or LEABn to Bn
Output Enable Time
OEBAn or OEABn to An or Bn
CEBAn or CEABn to An or Bn
Output Disable Time
1.5
1.5
6.5
6.5
1.5
1.5
7.0
7.0
1.5
1.5
8.5
8.5
ns
tPLZ
tPHZ
OEBAn or OEABn to An or Bn
CEBAn or CEABn to An or Bn
Setup Time, HIGH or LOW,
Data to LEXXn
1.5
1.5
2.5
6.5
6.5
1.5
1.5
2.5
7.0
7.0
1.5
1.5
3.0
7.8
7.8
ns
ns
tS
tH
Hold Time, HIGH or LOW,
Data to LEXXn
1.5
3.0
1.5
3.0
2.0
3.5
ns
ns
ns
tW
Pulse Width, Latch Enable, LOW
Output to Output Skew (Note 6)
tOSHL
tOSLH
1.0
1.0
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Dynamic Switching Characteristics
VCC
TA = 25°C
Symbol
VOLP
Parameter
Conditions
Units
(V)
3.3
2.5
3.3
2.5
Typical
0.8
Quiet Output Dynamic Peak VOL
C
C
C
C
L = 50 pF, VIH = 3.3V, VIL = 0V
L = 30 pF, VIH = 2.5V, VIL = 0V
L = 50 pF, VIH = 3.3V, VIL = 0V
L = 30 pF, VIH = 2.5V, VIL = 0V
V
V
0.6
VOLV
Quiet Output Dynamic Valley VOL
−0.8
−0.6
Capacitance
Symbol
Parameter
Conditions
CC = Open, VI = 0V or VCC
Typical
Units
pF
CIN
Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
V
V
V
7
8
CI/O
CPD
CC = 3.3V, VI = 0V or VCC
pF
CC = 3.3V, VI = 0V or VCC, f = 10 MHz
20
pF
5
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AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
tPLH, tPHL
PZL, tPLZ
Switch
Open
t
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH,tPHZ
GND
3-STATE Output High Enable and
Waveform for Inverting and Non-Inverting Functions
Disable Times for Logic
Setup Time, Hold Time and Recovery Time for Logic
Propagation Delay. Pulse Width and trec Waveforms
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
VCC
Symbol
3.3V ± 0.3V
1.5V
2.7V
1.5V
2.5V ± 0.2V
VCC/2
Vmi
Vmo
Vx
1.5V
1.5V
VCC/2
VOL + 0.3V
V
OL + 0.3V
V
OL + 0.15V
Vy
V
OH − 0.3V
V
OH − 0.3V
VOH − 0.15V
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6
Schematic Diagram Generic for LCX Family
7
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Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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9
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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