74LVXC4245QSCX_技术文档

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February 1994

Revised October 2003

74LVXC4245

8-Bit Dual Supply Configurable Voltage Interface

Transceiver with 3-STATE Outputs

General Description

The LVXC4245 is a 24-pin dual-supply, 8-bit configurable

voltage interface transceiver suited for PCMCIA and other

real time configurable I/O applications. The V_CCApin

Features

■ Bidirectional interface between 5V and 3V-to-5V buses

■ Control inputs compatible with TTL level

■ Outputs source/sink up to 24 mA

accepts a 5V supply level. The “A” Port is a dedicated 5V

port. The V_CCBpin accepts a 3V-to-5V supply level. The

■ Guaranteed simultaneous switching noise level and

dynamic threshold performance

“B” Port is configured to track the V_CCBsupply level

respectively. A 5V level on the V_CCpin will configure the

I/O pins at a 5V level and a 3V V_CCwill configure the I/O

pins at a 3V level. This device will allow the V_CCBvoltage

■ Implements patented EMI reduction circuitry

■ Flexible V_CCBoperating range

■ Allows B Port and V_CCBto float simultaneously when OE

is HIGH

source pin and I/O pins on the “B” Port to float when OE is

HIGH. This feature is necessary to buffer data to and from

■ Functionally compatible with the 74 series 245

a

PCMCIA socket that permits PCMCIA cards to be

inserted and removed during normal operation.

Ordering Code:

Order Number Package Number

Package Description

74LVXC4245WM

74LVXC4245QSC

74LVXC4245MTC

M24B

MQA24

MTC24

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

Pin Names

Description

Output Enable Input

Transmit/Receive Input

OE

T/R

A₀–A₇

B₀–B₇

Side A Inputs or 3-STATE Outputs

Side B Inputs or 3-STATE Outputs

DS012009

www.fairchildsemi.com

Truth Table

Inputs

Outputs

OE

L

T/R

L

Bus B Data to Bus A

Bus A Data to Bus B

HIGH-Z State

L

H

X

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Logic Diagram

www.fairchildsemi.com

2

Absolute Maximum Ratings(Note 1)

Recommended Operating

Conditions ^{(Note 2)}

Supply Voltage (V_CCA,V_CCB

)

−0.5V to +7.0V

DC Input Voltage (V_I) @ OE, T/R

−0.5V to V_CCA+0.5V

Supply Voltage V_CCA

V_CCB

4.5V to 5.5V

2.7V to 5.5V

0V to V_CCA

DC Input/Output Voltage (V_I/O

)

@ A_n

@ B_n

−0.5V to V_CCA+0.5V

−0.5V to V_CCB+0.5V

Input Voltage (V_I) @ OE, T/R

Input/Output Voltage (V_I/O

)

DC Input Diode Current (I_IK

@ OE, T/R

)

@A_n

@B_n

0V to V_CCA

0V to V_CCB

−40°C to +85°C

8 ns/V

±20 mA

±50 mA

DC Output Diode Current (I_OK

DC Output Source or

)

Free Air Operating Temperature (T_A)

Minimum Input Edge Rate (∆V/∆t)

Sink Current (I_O)

±50 mA

V

_INfrom 30% to 70% of V_CC

DC V_CCor Ground Current

V_CC@ 3V, 4.5V, 5.5V

Per Output Pin (I_CCor I_GND

)

±50 mA

±200 mA

Note 1: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

and Max Current

Storage Temperature Range (T_STG

DC Latch-Up Source or

Sink Current

)

−65°C to +150°C

±300 mA

Note 2: The A Port unused pins (inputs and I/O's) must be held HIGH or

LOW. They may not float.

DC Electrical Characteristics

V_CCA

V_CCB

T

_A= +25°C

T_A= −40°C to +85°C

Symbol

Parameter

Units

Conditions

(V)

4.5

5.5

4.5

5.5

4.5

(V)

2.7

3.6

5.5

2.7

3.6

5.5

2.7

3.6

5.5

2.7

3.6

5.5

3.0

2.7

4.5

3.0

2.7

4.5

Typ

Guaranteed Limits

V_IHA

Minimum HIGH Level

Input Voltage

A_n

OE

T/R

B_n

2.0

V

_OUT≤ 0.1V

or

≥ V_CC− 0.1V

V

V_IHB

V_ILA

V_ILB

3.85

0.8

3.85

0.8

Maximum LOW Level

Input Voltage

A_n

OE

T/R

B_n

V_OUT≤ 0.1V

0.8

or

0.8

≥ V_CC− 0.1V

V

0.8

1.65

4.4

1.65

4.4

V_OHA

Minimum HIGH Level

Output Voltage

4.49

4.25

2.99

2.85

2.65

2.5

I

_OUT= −100 µA

_OH= −24 mA

_OUT= −100 µA

_OH= −12 mA

_OH= −24 mA

_OH= −12 mA

_OH= −24 mA

_OUT= 100 µA

_OL= 24 mA

3.86

2.9

3.76

2.9

V_OHB

2.56

2.35

2.3

2.46

2.25

2.2

2.3

2.1

2.0

4.25

0.002

0.21

0.002

0.21

0.11

0.22

0.18

3.86

0.1

3.76

0.1

V_OLA

Maximum LOW Level

Output Voltage

V

0.36

0.1

0.44

0.1

V_OLB

_OUT= 100 µA

_OL= 24 mA

0.36

0.42

0.36

0.44

0.5

_OL= 12 mA

_OL= 24 mA

0.44

_OL= 24 mA

I_IN

Maximum Input

Leakage Current @

OE, T/R

V_I= V_CCA, GND

5.5

3.6

5.5

±0.1

±1.0

µA

3

www.fairchildsemi.com

DC Electrical Characteristics (Continued)

V_CCA

(V)

V_CCB

(V)

T

_A= +25°C

T_A= −40°C to +85°C

Symbol

Parameter

Units

µA

Conditions

Typ

Guaranteed Limits

I_OZA

Maximum 3-STATE

5.5

3.6

5.5

±0.5

±5.0

V_I= V_IL, V_IH, OE = V_CCA

Output Leakage @ A_n

±0.5

V

_O= V_CCA, GND

V_I= V_IL, V_IH, OE = V_CCA

_O= V_CCB, GND

I_OZB

Maximum 3-STATE

Output Leakage @ B_n

Maximum

5.5

3.6

5.5

3.6

±0.5

1.35

0.35

±5.0

1.5

µA

V

∆I_CC

All Inputs

B_n

1.0

mA V_I= V_CC− 2.1V

mA V_I= V_CCB− 0.6V

I_CC/Input

0.5

I_CCA1

Quiescent V_CCA

Supply Current as B

Port Floats

A

_n= V_CCAor GND

5.5

Open

8

80

µA

B_n= Open, OE = V_CCA

T/R = V_CCA, V_CCB

=

Open

I_CCA2

Quiescent V_CCA

Supply Current

A

_n= V_CCAor GND

_n= V_CCBor GND

5.5

3.6

5.5

8

80

µA

B

OE = GND, T/R = GND

I_CCB

Quiescent V_CCB

Supply Current

A

_n= V_CCAor GND

_n= V_CCBor GND

5.5

5.0

3.6

5.5

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

5

50

80

B

8

OE = GND, T/R = V_CCA

V_OLPA

V_OLPB

V_OLVA

V_OLVB

V_IHDA

V_IHDB

V_ILDA

V_ILDB

Quiet Output

Maximum Dynamic

V_OL

1.5

0.8

1.5

−1.2

−0.8

−1.2

2.0

3.5

0.8

1.5

(Note 3) (Note 4)

V

(Note 3) (Note 4)

(Note 3) (Note 5)

Quiet Output Minimum

Dynamic V_OL

Minimum HIGH Level

Dynamic Input

Voltage

Maximum LOW Level

Dynamic Input

Voltage

Note 3: Worst case package.

Note 4: Max number of outputs defined as (n). Data inputs are driven 0V to V_CClevel; one output at GND.

Note 5: Max number of Data Inputs (n) switching. (n−1) inputs switching 0V to V_CClevel. Input-under-test switching:

V_CClevel to threshold (V_IHD), 0V to threshold (V_ILD), f = 1 MHz.

www.fairchildsemi.com

4

AC Electrical Characteristics

C_L= 50 pF

V

_CCA= 4.5V to 5.5V

_CCB= 4.5V to 5.5V

V

_CCA= 4.5V to 5.5V

_CCB= 2.7V to 3.6V

V

Symbol

Parameter

Units

T_A= +25°C

T_A= −40°C to +85°C

T

_A= +25°C

T_A= −40°C to +85°C

Min

Typ

(Note 6)

4.9

Max

Min

Max

Min

Typ

(Note 7)

5.5

Max

Min

Max

t_PHL

t_PLH

t_PHL

t_PLH

t_PZL

t_PZH

t_PZL

t_PZH

t_PHZ

t_PLZ

t_PHZ

t_PLZ

t_OSHL

t_OSLH

Propagation

1.0

6.5

5.5

6.5

5.0

7.5

9.0

7.5

7.0

5.5

4.5

1.0

7.0

6.0

7.0

5.5

8.0

10.0

8.5

7.5

6.0

5.0

1.0

7.5

7.0

7.5

6.0

9.0

9.5

10.0

8.0

9.0

6.5

5.5

5.0

1.0

8.0

7.5

ns

Delay A to B

4.0

5.0

Propagation

4.7

5.6

8.0

Delay B to A

3.9

4.3

6.5

Output Enable

Time OE to B

Output Enable

Time OE to A

Output Disable

Time OE to B

Output Disable

Time OE to A

Output to Output

Skew (Note 8)

Data to Output

5.6

6.7

10.0

11.0

8.5

5.7

6.9

7.4

8.0

6.1

6.3

4.8

6.0

9.5

3.8

4.2

7.0

3.4

6.0

2.9

5.5

1.0

1.5

1.0

1.5

ns

Note 6: Typical values at V_CCA= 5V, V_CCB= 5V @25°C.

Note 7: Typical values at V_CCA= 5V, V_CCB= 3.3V @25°C.

Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t_OSHL) or LOW-to-HIGH (t_OSLH). Parameter guaranteed by design.

Capacitance

Symbol

C_IN

Parameter

Typ

4.5

10

Units

pF

Conditions

Input Capacitance

V

_CC= Open

C_I/O

Input/Output Capacitance

pF

_CCA= 5V, V_CCB= 3.3V

_CCA= 5V

C_PD

Power Dissipation Capacitance

(Note 9)

A→B

B→A

45

pF

50

pF

_CCB= 3.3V

Note 9: C_PDis measured at 10 MHz.

Power Up Considerations

To insure the system does not experience unnecessary I_CC

figured as inputs. With V_CCAreceiving power first, the A

current draw, bus contention, or oscillations during power

up, the following guidelines should be adhered to (refer to

Table 1):

I/O Port should be configured as inputs to help guard

against bus contention and oscillations.

•

A side data inputs should be driven to a valid logic level.

This will prevent excessive current draw.

•

Power up the control side of the device first. This is the

V_CCA

.

The above steps will ensure that no bus contention or oscil-

lations, and therefore no excessive current draw occurs

during the power up cycling of these devices. These steps

will help prevent possible damage to the translator devices

and potential damage to other system components.

OE should ramp with or ahead of V_CCA. This will help

guard against bus contention.

The Transmit/Receive control pin (T/R) should ramp with

V

_CCA, this will ensure that the A Port data pins are con-

TABLE 1. Low Voltage Translator Power Up Sequencing Table

Floatable Pin

Allowed

V_CCA

V_CCB

Device Type

T/R

OE

A Side I/O

B Side I/O

5V

2.7V to 5.5V

configurable

ramp

logic

yes, V_CCBand B

74LVXC4245

outputs

(power up 1st)

with V_CCA

0V or V_CCA

I/O’s w/ OE HIGH

Please reference Application Note AN-5001 for more detailed information on using Fairchild’s LVX Low Voltage Dual

Supply CMOS Translating Transceivers.

5

www.fairchildsemi.com

Configurable I/O Application for PCMCIA Cards

Block Diagram

The LVXC4245 is a 24-pin dual supply device well suited

for PCMCIA configurable I/O applications. Ideal for low

power notebook designs, the LVXC4245 consumes less

than 1 mW of quiescent power in all modes of operation.

The LVXC4245 meets all PCMCIA I/O voltage require-

ments at 5V and 3.3V operation. By tying V_CCBof the

will always experience rail to rail output swings, maximizing

the reliability of the interface.

The V_CCApin on the LVXC4245 must always be tied to a

5V power supply. This voltage connection provides internal

references needed to account for variations in V_CCB. When

connected as in the block diagram above, the LVXC4245

meets all the voltage and current requirements of the ISA

bus standard (IEEE P996).

LVXC4245 to the card voltage supply, the PCMCIA card

www.fairchildsemi.com

6

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M24B

24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide

Package Number MQA24

7

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC24

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

8

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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1


型号：	74LVXC4245QSCX
厂家：	ONSEMI
描述：	带 3 状态输出的 8 位双电源可配置电压接口收发器光电二极管逻辑集成电路
文件：	总10页 (文件大小：201K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74LVXC4245QSCX [ONSEMI]

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