74VHC175MTCX [ONSEMI]
四路 D 型触发器;型号: | 74VHC175MTCX |
厂家: | ONSEMI |
描述: | 四路 D 型触发器 触发器 |
文件: | 总11页 (文件大小:370K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
May 2007
74VHC175
tm
Quad D-Type Flip-Flop
Features
General Description
■ High Speed: f
= 210MHz (Typ.) at V = 5V
The VHC175 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
MAX
CC
■ Low power dissipation: I = 4µA (Max.) at T = 25°C
■ High noise immunity: V
CC
A
= V
= 28% V (Min.)
NIH
NIL
CC
■ Power down protection is provided on all inputs
■ Low noise: V = 0.8V (Max.)
OLP
The VHC175 is a high-speed quad D-type flip-flop. The
device is useful for general flip-flop requirements where
clock and clear inputs are common. The information on
the D inputs is stored during the LOW-to-HIGH clock
transition. Both true and complemented outputs of each
flip-flop are provided. A Master Reset input resets all flip-
flops, independent of the Clock or D inputs, when LOW.
■ Pin and function compatible with 74HC175
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Package
Order Number
74VHC175M
Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC175SJ
74VHC175MTC
M16D
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
Connection Diagram
Pin Description
Pin Names
Description
D –D
Data Inputs
0
3
CP
Clock Pulse Input
Master Reset Input
True Outputs
MR
Q –Q
0
3
Q –Q
Complement Outputs
0
3
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
Logic Symbol
Functional Description
The VHC175 consists of four edge-triggered D flip-flops
with individual D inputs and Q and Q outputs. The Clock
and Master Reset are common. The four flip-flops will
store the state of their individual D inputs on the LOW-to-
HIGH clock (CP) transition, causing individual Q and Q
outputs to follow. A LOW input on the Master Reset (MR)
will force all Q outputs LOW and Q outputs HIGH inde-
pendent of Clock or Data inputs. The VHC175 is useful
for general logic applications where a common Master
Reset and Clock are acceptable.
Truth Table
IEEE/IEC
Inputs @ t ,
n
MR = H
Outputs @ t
n+1
D
Q
Q
n
n
n
L
L
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
t = Bit Time before Clock Pulse
n
t
= Bit Time after Clock Pulse
n+1
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
IN
V
–0.5V to V + 0.5V
OUT
CC
I
–20mA
20mA
IK
I
OK
I
25mA
OUT
I
DC V / GND Current
50mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(1)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to +5.5V
0V to +5.5V
0V to V
CC
V
Input Voltage
IN
V
Output Voltage
OUT
CC
T
Operating Temperature
Input Rise and Fall Time,
–40°C to +85°C
OPR
t , t
r
f
V
V
= 3.3V 0.3V
= 5.0V 0.5V
0ns/V ∼ 100ns/V
0ns/V ∼ 20ns/V
CC
CC
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
3
DC Electrical Characteristics
T = –40°C to
A
T = 25°C
+85°C
A
Symbol
Parameter
V
(V)
Conditions
Min.
Typ.
Max.
Min.
Max.
Units
CC
2.0
V
HIGH Level Input
Voltage
1.50
1.50
V
IH
3.0–5.5
2.0
0.7 x V
0.7 x V
CC
CC
V
LOW Level Input
Voltage
0.50
0.50
V
V
IL
3.0–5.5
2.0
0.3 x V
0.3 x V
CC
CC
V
HIGH Level
Output Voltage
V
or V
= V
I
= –50µA
1.9
2.9
2.0
3.0
4.5
1.9
2.9
OH
IN
IH
OH
IL
3.0
4.5
4.4
4.4
3.0
I
I
I
= –4mA
= –8mA
= 50µA
2.58
3.94
2.48
3.80
OH
OH
OL
4.5
V
LOW Level
Output Voltage
2.0
V
or V
= V
IH
IL
0.0
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
3.0
4.5
0.1
0.1
3.0
I
I
= 4mA
= 8mA
0.36
0.36
0.1
0.44
0.44
1.0
OL
OL
4.5
I
Input Leakage
Current
0–5.5
V
= 5.5V or GND
µA
µA
IN
IN
I
Quiescent
5.5
V
= V or GND
4.0
40.0
CC
IN
CC
Supply Current
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
Typ.
Limits
Units
Conditions
CC
(2)
V
Quiet Output Maximum
Dynamic V
5.0
0.4
0.8
–0.8
3.5
V
C = 50pF
OLP
L
OL
(2)
V
Quiet Output Minimum
Dynamic V
5.0
5.0
5.0
–0.4
V
V
V
C = 50pF
OLV
L
OL
(2)
V
Minimum HIGH Level Dynamic
Input Voltage
C = 50pF
IHD
L
(2)
V
Maximum LOW Level Dynamic
Input Voltage
1.5
C = 50pF
ILD
L
Note:
2. Parameter guaranteed by design.
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
4
AC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V) Conditions Min. Typ. Max. Min. Max. Units
CC
f
Maximum Clock
Frequency
3.3 0.3 C = 15pF
90
50
140
75
75
45
MHz
MHz
ns
MAX
L
C = 50pF
L
5.0 0.5 C = 15pF
150
85
210
115
7.5
10.0
4.8
6.3
6.3
8.8
4.3
5.8
125
75
L
C = 50pF
L
t
, t
Propagation Delay Time,
3.3 0.3 C = 15pF
11.5
15.0
7.3
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
13.5
17.0
8.5
PLH PHL
L
(CP to Q or Q )
n
n
C = 50pF
L
5.0 0.5 C = 15pF
ns
L
C = 50pF
9.3
10.5
12.0
15.5
7.5
L
t
, t
Propagation Delay Time,
(MR to Q or Q )
3.3 0.3 C = 15pF
10.1
13.6
6.4
ns
PLH PHL
L
n
n
C = 50pF
L
5.0 0.5 C = 15pF
ns
L
C = 50pF
8.4
9.5
L
t
, t
Output to Output Skew
Input Capacitance
3.3 0.3 C = 50pF
1.5
1.5
OSLH OSHL
L
(3)
5.0 0.5 C = 50pF
1.0
1.0
L
C
V
= Open
4
10
10
pF
pF
IN
CC
(4)
C
Power Dissipation
Capacitance
44
PD
Notes:
3. Parameter guaranteed by design. t
= |t
– t
|; t
=| t
– t
|.
OSLH
PLHmax
PLHmin OSHL
PHLmax
PHLmin
4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained from the equation:
I
(opr.) = C • V • f + I /4 (per F/F), and the total C when n pcs of the Flip-Flop operate can be calculated
CC
PD CC IN CC PD
by the following equation: C (total) = 30 + 14 • n
PD
AC Operating Requirements
T = 25°C
T = –40°C to +85°C
A
A
(5)
Symbol
Parameter
V
(V)
Typ.
Guaranteed Minimum
Units
CC
t (L), t (H) Minimum Pulse Width (CP)
3.3
5.0
5.0
5.0
5.0
5.0
5.0
4.0
1.0
1.0
5.0
5.0
ns
W
W
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
5.0
5.0
5.0
5.0
4.0
1.0
1.0
5.0
5.0
t (L)
Minimum Pulse Width (MR)
ns
ns
ns
ns
W
t
Minimum Setup Time (Dn to CP)
Minimum Hold Time (Dn to CP)
Minimum Removal Time (MR)
S
t
H
t
REC
Note:
5. V is 3.3 0.3V or 5.0 0.5V
CC
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
5
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
6
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
7
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
5.00 0.10
4.55
5.90
4.45 7.35
0.65
4.4 0.1
1.45
5.00
0.11
12°
MTC16rev4
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
8
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exhaustive list of all such trademarks.
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Across the board. Around the world.™
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
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As used herein:
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(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I26
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com
9
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
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designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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相关型号:
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D Flip-Flop, AHC/VHC Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, CMOS, PDSO16, 0.150 INCH, MS-012AC, SOIC-16
FAIRCHILD
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