74VHCT374AMTCX [ONSEMI]
低压八路D型触发器（带3态输出）;
| 型号： | 74VHCT374AMTCX |
| 厂家： | 
ONSEMI |
| 描述： | 低压八路D型触发器（带3态输出） 驱动 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总11页 (文件大小：383K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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May 2007
74VHCT374A
tm
Octal D-Type Flip-Flop with 3-STATE Outputs
Features
General Description
■ High speed: f
= 140MHz (Typ.) at T = 25°C
The VHCT374A is an advanced high speed CMOS octal
flip-flop with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while main-
taining the CMOS low power dissipation. This 8-bit
D-type flip-flop is controlled by a clock input (CP) and an
output enable input (OE). When the OE input is HIGH,
the eight outputs are in a high impedance state.
MAX
A
■ High noise immunity: V = 2.0V, V = 0.8V
IH
IL
■ Power down protection is provided on all inputs and
outputs
■ Low power dissipation: I = 4µA (Max.) @ T = 25°C
CC
A
■ Pin and function compatible with 74HCT374
Protection circuits ensure that 0V to 7V can be applied to
(1)
the input and output pins without regard to the supply
voltage. This device can be used to interface 3V to 5V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note:
1. Outputs in OFF-State.
Ordering Information
Package
Order Number
74VHCT374AM
Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT374ASJ
74VHCT374AMTC
M20D
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Description
Pin Names
Description
D –D
Data Inputs
0
7
CP
OE
Clock Pulse Input 3-STATE
Output Enable Input 3-STATE
Outputs
O –O
0
7
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
Logic Symbol
Functional Description
IEEE/IEC
The VHCT374A consists of eight edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the con-
tents of the eight flip-flops are available at the outputs.
When the OE is HIGH, the outputs go to the high imped-
ance state. Operation of the OE input does not affect the
state of the flip-flops.
Truth Table
Inputs
Outputs
D
CP
OE
O
n
n
H
L
L
H
L
L
Z
X
X
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
DC Input Voltage
DC Output Voltage
Note 2
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
IN
V
OUT
–0.5V to V + 0.5V
CC
Note 3
–0.5V to +7.0V
–20mA
I
Input Diode Current
Output Diode Current
DC Output Current
IK
(4)
I
20mA
OK
I
25mA
OUT
I
DC V / GND Current
75mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(5)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
Input Voltage
Output Voltage
Note 2
4.5V to +5.5V
0V to +5.5V
CC
V
IN
V
OUT
0V to V
CC
Note 3
0V to 5.5V
–40°C to +85°C
0ns/V ~ 20ns/V
T
Operating Temperature
OPR
t , t
Input Rise and Fall Time, V = 5.0V 0.5V
CC
r
f
Notes:
2. HIGH or LOW state. I
absolute maximum rating must be observed.
OUT
3. When outputs are in OFF-State or when V = 0V.
CC
4. V
< GND, V
> V (Outputs Active).
OUT
OUT CC
5. Unused inputs must be held HIGH or LOW. They may not float.
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
3
DC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
V
HIGH Level Input Voltage
4.5
2.0
2.0
2.0
2.0
V
IH
5.5
4.5
5.5
4.5
V
LOW Level Input Voltage
0.8
0.8
0.8
0.8
V
IL
V
HIGH Level Output
Voltage
V
or V
= V I
IH OH
= –50µA 4.40 4.50
= –8mA 3.94
4.40
3.80
V
OH
IN
IL
I
OH
V
LOW Level Output
Voltage
4.5
5.5
V
or V
= V I
IH OL
= +50µA
= +8mA
0.0
0.1
0.1
0.44
2.5
V
OL
IN
IL
I
0.36
0.25
OL
I
3-STATE Output
OFF-State Current
V
V
= V or V ,
µA
OZ
IN
IH
IL
= V or GND
OUT
CC
I
Input Leakage Current
0–5.5
5.5
V
V
= 5.5V or GND
0.1
4.0
1.0
µA
µA
IN
IN
IN
I
Quiescent Supply
Current
= V or GND
40.0
CC
CC
I
Maximum I /Input
5.5
0.0
V
= 3.4V, Other
1.35
0.5
1.50
5.0
mA
µA
CCT
CC
IN
Inputs = V or GND
CC
I
Output Leakage Current
(Power Down State)
V
= 5.5V
OFF
OUT
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
Conditions
Typ.
Limits
Units
CC
(6)
V
Quiet Output Maximum
Dynamic V
5.0
C = 50pF
1.2
1.6
V
V
V
V
OLP
L
OL
(6)
(6)
V
Quiet Output Minimum
Dynamic V
5.0
5.0
5.0
C = 50pF
–1.2
–1.6
2.0
OLV
L
OL
V
Minimum HIGH Level Dynamic
Input Voltage
C = 50pF
L
IHD
(6)
V
Maximum LOW Level Dynamic
Input Voltage
C = 50pF
0.8
ILD
L
Note:
6. Parameter guaranteed by design.
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
4
AC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
t
, t
Propagation Delay
Time
5.0 0.5
C = 15pF
4.1
5.6
6.5
7.3
7.0
9.4
1.0
1.0
1.0
1.0
1.0
10.5
11.5
11.5
12.5
12.0
ns
PLH PHL
L
C = 50pF
10.4
10.2
11.2
11.2
L
t
t
, t
3-STATE Output
Enable Time
5.0 0.5 R = 1kΩ C = 15pF
L L
ns
PZL PZH
C = 50pF
L
, t
3-STATE Output
Disable Time
5.0 0.5 R = 1kΩ C = 50pF
ns
ns
PLZ PHZ
L
L
(7)
t
, t
Output to Output
Skew
5.0 0.5
5.0 0.5
1.0
1.0
OSLH OSHL
f
Maximum Clock
Frequency
C = 15pF
90
85
140
130
4
80
75
MHz
MAX
L
C = 50pF
L
C
Input Capacitance
Output Capacitance
V
V
= Open
10
10
pF
pF
pF
IN
CC
C
= 5.0V
9
OUT
CC
(8)
C
Power Dissipation
Capacitance
25
PD
Notes:
7. Parameter guaranteed by design. t
= |t
– t
|; t
= |t
– t
|
OSLH
PLH max
PLH min OSHL
PHL max
PHL min
8. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained by the equation:
I
(Opr.) = C • V • f + I / 8 (per F/F). The total C when n pcs. of the octal D Flip-Flop operates
CC
PD CC IN CC PD
can be calculated by the equation: C (total) = 20 + 12m
PD
AC Operating Requirements
T = 25°C
T = –40°C to +85°C
A
A
Symbol
Parameter
V
(V)
Min. Typ. Max.
Min.
8.5
Max.
Units
ns
CC
t (H), t (L) Minimum Pulse Width (CP)
5.0 0.5
5.0 0.5
5.0 0.5
6.5
2.5
2.5
W
W
t
Minimum Set-up Time
Minimum Hold Time
2.5
ns
S
H
t
2.5
ns
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
5
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
6
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
7
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
8
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exhaustive list of all such trademarks.
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Across the board. Around the world.™
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Quiet Series™
RapidConfigure™
RapidConnect™
ScalarPump™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
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SuperSOT™-8
SyncFET™
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FACT Quiet Series™
FACT®
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APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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As used herein:
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which, (a) are intended for surgical implant into the body or
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
First Production
Full Production
Not In Production
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I27
©1997 Fairchild Semiconductor Corporation
74VHCT374A Rev. 1.3
www.fairchildsemi.com
9
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