BTA08-800CW3G [ONSEMI]

Triacs Silicon Bidirectional Thyristors; 双向晶闸管硅双向晶闸管
BTA08-800CW3G
型号: BTA08-800CW3G
厂家: ONSEMI    ONSEMI
描述:

Triacs Silicon Bidirectional Thyristors
双向晶闸管硅双向晶闸管

触发装置 三端双向交流开关 局域网
文件: 总6页 (文件大小:132K)
中文:  中文翻译
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BTA08-600CW3G,  
BTA08-800CW3G  
Triacs  
Silicon Bidirectional Thyristors  
Designed for high performance full-wave ac control applications  
where high noise immunity and high commutating di/dt are required.  
http://onsemi.com  
Features  
Blocking Voltage to 800 V  
TRIACS  
8 AMPERES RMS  
600 thru 800 VOLTS  
On-State Current Rating of 8 A RMS at 25°C  
Uniform Gate Trigger Currents in Three Quadrants  
High Immunity to dV/dt 1500 V/s minimum at 125°C  
Minimizes Snubber Networks for Protection  
Industry Standard TO-220AB Package  
High Commutating dI/dt 1.5 A/ms minimum at 125°C  
MT2  
MT1  
G
4
MARKING  
DIAGRAM  
Internally Isolated (2500 V  
These are PbFree Devices  
)
RMS  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
Peak Repetitive OffState Voltage (Note 1)  
J
V
V
DRM,  
RRM  
BTA08xCWG  
(T = 40 to 125°C, Sine Wave,  
V
TO220AB  
CASE 221A  
STYLE 12  
AYWW  
50 to 60 Hz, Gate Open)  
1
BTA08600CW3G  
BTA08800CW3G  
600  
800  
2
3
On-State RMS Current  
I
8.0  
A
A
x
A
Y
WW  
G
= 6 or 8  
= Assembly Location  
= Year  
= Work Week  
= PbFree Package  
T(RMS)  
(Full Cycle Sine Wave, 60 Hz, T = 80°C)  
C
Peak Non-Repetitive Surge Current  
(One Full Cycle Sine Wave, 60 Hz,  
I
TSM  
90  
T
C
= 25°C)  
2
2
Circuit Fusing Consideration (t = 8.3 ms)  
I t  
36  
A sec  
NonRepetitive Surge Peak OffState  
V
V
V
V
DSM/  
RSM  
DSM/ RSM  
PIN ASSIGNMENT  
Voltage (T = 25°C, t = 10ms)  
V
+100  
J
1
2
3
4
Main Terminal 1  
Peak Gate Current (T = 125°C, t = 20ms)  
I
4.0  
A
J
GM  
Main Terminal 2  
Gate  
Peak Gate Power  
P
20  
W
GM  
(Pulse Width 1.0 s, T = 80°C)  
C
Average Gate Power (T = 125°C)  
P
G(AV)  
1.0  
W
°C  
°C  
V
J
No Connection  
Operating Junction Temperature Range  
Storage Temperature Range  
RMS Isolation Voltage  
T
J
40 to +125  
40 to +150  
2500  
T
stg  
ORDERING INFORMATION  
V
iso  
(t = 300 ms, R.H. 30%, T = 25°C)  
A
Device  
Package  
Shipping  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
BTA08600CW3G TO220AB  
(PbFree)  
50 Units / Rail  
BTA08800CW3G TO220AB  
(PbFree)  
50 Units / Rail  
1. V  
and V  
for all types can be applied on a continuous basis. Blocking  
DRM  
RRM  
voltages shall not be tested with a constant current source such that the  
voltage ratings of the devices are exceeded.  
*For additional information on our PbFree strategy and  
soldering details, please download the ON Semicon-  
ductor Soldering and Mounting Techniques Reference  
Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2008  
1
Publication Order Number:  
August, 2008 Rev. 0  
BTA08600CW3/D  
BTA08600CW3G, BTA08800CW3G  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Value  
Unit  
Thermal Resistance,  
JunctiontoCase (AC)  
JunctiontoAmbient  
R
R
2.5  
60  
°C/W  
JC  
JA  
Maximum Lead Temperature for Soldering Purposes 1/8from Case for 10 seconds  
T
L
260  
°C  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted; Electricals apply in both directions)  
J
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Peak Repetitive Blocking Current  
I
,
mA  
DRM  
(V = Rated V  
, V  
RRM  
; Gate Open)  
T = 25°C  
T = 125°C  
J
I
0.005  
2.0  
D
DRM  
J
RRM  
ON CHARACTERISTICS  
Peak On-State Voltage (Note 2)  
(I 11 A Peak)  
Gate Trigger Current (Continuous dc) (V = 12 V, R = 30 )  
V
1.55  
V
TM  
=
TM  
I
mA  
D
L
GT  
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
2.5  
2.5  
2.5  
35  
35  
35  
Holding Current  
(V = 12 V, Gate Open, Initiating Current = 100 mA)  
D
I
35  
mA  
mA  
H
Latching Current (V = 24 V, I = 42 mA)  
I
D
G
L
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
50  
60  
50  
Gate Trigger Voltage (V = 12 V, R = 30 )  
V
V
V
D
L
GT  
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
0.5  
0.5  
0.5  
1.7  
1.1  
1.1  
Gate NonTrigger Voltage (T = 125°C)  
V
GD  
J
MT2(+), G(+)  
MT2(+), G()  
MT2(), G()  
0.2  
0.2  
0.2  
DYNAMIC CHARACTERISTICS  
Rate of Change of Commutating Current, See Figure 10.  
(dI/dt)  
dI/dt  
1.5  
50  
A/ms  
A/s  
V/s  
c
(Gate Open, T = 125°C, No Snubber)  
J
Critical Rate of Rise of OnState Current  
(T = 125°C, f = 120 Hz, I = 2 x I , tr 100 ns)  
J
G
GT  
Critical Rate of Rise of Off-State Voltage  
(V = 0.66 x V , Exponential Waveform, Gate Open, T = 125°C)  
dV/dt  
1500  
D
DRM  
J
2. Indicates Pulse Test: Pulse Width 2.0 ms, Duty Cycle 2%.  
http://onsemi.com  
2
BTA08600CW3G, BTA08800CW3G  
Voltage Current Characteristic of Triacs  
(Bidirectional Device)  
+ Current  
Quadrant 1  
MainTerminal 2 +  
Symbol  
Parameter  
V
TM  
V
Peak Repetitive Forward Off State Voltage  
Peak Forward Blocking Current  
DRM  
DRM  
on state  
I
I
H
I
at V  
RRM  
V
Peak Repetitive Reverse Off State Voltage  
Peak Reverse Blocking Current  
RRM  
RRM  
RRM  
I
V
Maximum On State Voltage  
Holding Current  
+ Voltage  
DRM  
off state  
TM  
I
H
I
at V  
DRM  
I
H
Quadrant 3  
MainTerminal 2 −  
V
TM  
Quadrant Definitions for a Triac  
MT2 POSITIVE  
(Positive Half Cycle)  
+
(+) MT2  
(+) MT2  
Quadrant II  
Quadrant I  
() I  
(+) I  
GT  
GT  
GATE  
GATE  
MT1  
MT1  
REF  
REF  
I
+ I  
GT  
GT  
() MT2  
() MT2  
Quadrant III  
Quadrant IV  
(+) I  
() I  
GT  
GT  
GATE  
GATE  
MT1  
REF  
MT1  
REF  
MT2 NEGATIVE  
(Negative Half Cycle)  
All polarities are referenced to MT1.  
With inphase signals (using standard AC lines) quadrants I and III are used.  
http://onsemi.com  
3
BTA08600CW3G, BTA08800CW3G  
125  
120  
115  
12  
10  
DC  
180°  
120°  
= 120, 90, 60, 30°  
8
6
= 180°  
110  
105  
100  
60°  
4
DC  
90°  
= 30°  
2
0
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
I , RMS ON-STATE CURRENT (A)  
T(RMS)  
I , ON-STATE CURRENT (A)  
T(RMS)  
Figure 1. RMS Current Derating  
Figure 2. On-State Power Dissipation  
100  
10  
1
1
0.1  
0.01  
4
0.1  
1
10  
100  
1000  
10  
t, TIME (ms)  
Figure 4. Thermal Response  
55  
45  
35  
25  
15  
5
MT2 POSITIVE  
MT2 NEGATIVE  
20 35 50 65 80 95 110 125  
0.1  
40 25 10  
5
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
V , INSTANTANEOUS ON-STATE VOLTAGE (V)  
T
T , JUNCTION TEMPERATURE (°C)  
J
Figure 3. On-State Characteristics  
Figure 5. Hold Current Variation  
http://onsemi.com  
4
BTA08600CW3G, BTA08800CW3G  
100  
10  
1
2.00  
V
= 12 V  
V = 12 V  
D
R = 30 ꢂ  
L
D
1.80  
1.60  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
R = 30  
L
Q1  
Q1  
Q2  
Q3  
Q3  
Q2  
40 25 10  
5
20 35 50 65 80 95 110 125  
40 25 10  
5
20 35 50 65 80 95 110 125  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 6. Gate Trigger Current Variation  
Figure 7. Gate Trigger Voltage Variation  
120  
100  
80  
60  
40  
20  
0
5000  
V = 800 Vpk  
D
V = 800 Vpk  
D
T = 125°C  
J
T = 125°C  
J
4K  
3K  
2K  
1K  
0
Q1  
Q2  
Q3  
10  
100  
1000  
10000  
40 25 10  
5
20 35 50 65 80 95 110 125  
R , GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS)  
G
T , TEMPERATURE (°C)  
J
Figure 8. Critical Rate of Rise of Off-State Voltage  
(Exponential Waveform)  
Figure 10. Latching Current Variation  
L
L
1N4007  
200 V  
RMS  
ADJUST FOR  
, 60 Hz V  
MEASURE  
I
I
TM  
AC  
CHARGE  
-
TRIGGER  
CONTROL  
200 V  
+
CHARGE  
MT2  
1N914  
51  
MT1  
NON‐POLAR  
G
C
L
Note: Component values are for verification of rated (di/dt) . See AN1048 for additional information.  
c
Figure 9. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c  
http://onsemi.com  
5
BTA08600CW3G, BTA08800CW3G  
PACKAGE DIMENSIONS  
TO220  
CASE 221A07  
ISSUE O  
NOTES:  
SEATING  
PLANE  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
T−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION Z DEFINES A ZONE WHERE ALL  
BODY AND LEAD IRREGULARITIES ARE  
ALLOWED.  
B
F
C
T
S
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
14.48  
9.66  
4.07  
0.64  
3.61  
2.42  
2.80  
0.36  
12.70  
1.15  
4.83  
2.54  
2.04  
1.15  
5.97  
0.00  
1.15  
---  
MAX  
15.75  
10.28  
4.82  
0.88  
3.73  
2.66  
3.93  
0.55  
14.27  
1.52  
5.33  
3.04  
2.79  
1.39  
6.47  
1.27  
---  
4
3
A
B
C
D
F
0.570  
0.380  
0.160  
0.025  
0.142  
0.095  
0.110  
0.014  
0.500  
0.045  
0.190  
0.100  
0.080  
0.045  
0.235  
0.000  
0.045  
---  
0.620  
0.405  
0.190  
0.035  
0.147  
0.105  
0.155  
0.022  
0.562  
0.060  
0.210  
0.120  
0.110  
0.055  
0.255  
0.050  
---  
Q
A
K
1
2
U
H
G
H
J
Z
K
L
N
Q
R
S
T
R
L
V
J
G
U
V
Z
D
0.080  
2.04  
N
STYLE 12:  
PIN 1. MAIN TERMINAL 1  
2. MAIN TERMINAL 2  
3. GATE  
4. NOT CONNECTED  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
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Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
BTA08600CW3/D  

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