CAT4103V-GT2 [ONSEMI]
3-Channel Constant-Current RGB LED Driver; 3通道恒流RGB LED驱动器
| 型号： | CAT4103V-GT2 |
| 厂家： | 
ONSEMI |
| 描述： | 3-Channel Constant-Current RGB LED Driver |
| 文件： | 总13页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CAT4103
3-Channel Constant-Current RGB LED Driver
FEATURES
DESCRIPTION
3 independent current sinks rated to 25V
The CAT4103 is a 3-channel, linear based constant-
current LED driver designed for RGB LED control,
requiring no inductor and provides a low noise operation.
LED channel currents up to 175mA are programmed
independently via separate external resistors. Low output
voltage operation of 0.4V at 175mA allows for more
power efficient designs across wider supply voltage
range. The three LED pins are compatible with high
voltage up to 25V supporting applications with long
strings of LEDs.
LED current to 175mA per channel set by
separate external resistors
High-speed 25MHz 4-wire serial interface
Buffered output drivers to ensure data integrity
Cascadable devices
Low dropout current source (0.4V at 175mA)
3V to 5.5V logic supply
Thermal shutdown protection
RoHS-compliant 16-lead SOIC package
A high-speed 4-wire 25MHz serial interface controls each
individual channel using a shift register and latch
configuration. Output data pins allow multiple devices to
be cascaded and programmed via one serial interface
with no need for external drivers or timing considerations.
The device also includes a blanking control pin (BIN) that
can be used to disable all channels independently of the
interface.
APPLICATIONS
Multi-color, intelligent LED, architectural
lighting
High-visual impact LED signs and displays
LCD backlight
Thermal shutdown protection is incorporated in the device
to disable the LED outputs whenever the die temperature
exceeds 150ºC.
ORDERING INFORMATION
Part
Quantity
per Reel
Package
Marking
Package
Number
The device is available in a 16-lead SOIC package.
CAT4103V-GT2 SOIC-16*
* Lead Finish NiPdAu
2,000
CAT4103V
PIN CONFIGURATION
TYPICAL APPLICATION CIRCUIT
16-Lead SOIC (W)
Top View
VIN
5V to 25V
VDD
1
2
3
4
16
15
14
13
VDD
GND
BIN
3V to 5.5V
C1
1µF
RED
GREEN BLUE
BOUT
LOUT
SOUT
COUT
LED1
VDD LED1
LED2
LED3
LIN
BIN
LIN
SIN
CIN
BOUT
LOUT
SOUT
COUT
SIN
NEXT
CAT4103
DEVICE
CONTROLLER
CAT4103
5
6
12
11
CIN
RSET3
7
8
10
9
LED2
LED3
RSET2
RSET1
GND RSET1
R1
RSET2
R2
RSET3
R3
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-5038, Rev. A
CAT4103
ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
V
VDD Voltage
6
-0.3V to VDD+0.3V
-0.3V to VDD+0.3V
25
Input Voltage Range (SIN, BIN, CIN, LIN)
Output voltage range (SOUT, BOUT, COUT, LOUT)
LED1, LED2, LED3 Voltage
V
V
V
DC Output Current on LED1 to LED3
Storage Temperature Range
Junction Temperature Range
Lead Soldering Temperature (10sec.)
200
mA
°C
°C
°C
-55 to +160
-40 to +150
300
ESD Rating: All Pins
Human Body Model
Machine Model
2000
200
V
RECOMMENDED OPERATING CONDITIONS
Parameter
Range
3.0 to 5.5
up to 25
up to 6*
Units
V
VDD
Voltage applied to LED1 to LED3, outputs off
Voltage applied to LED1 to LED3, outputs on
Output Current on LED1 to LED3
Ambient Temperature Range
V
V
2 to 175
-40 to +85
mA
°C
* Keeping the LEDx pin voltage below 6V in operation is recommended to minimize thermal dissipation in the package.
ELECTRICAL OPERATING CHARACTERISTICS
DC CHARACTERISTICS
Min and Max values are over recommended operating conditions unless specified otherwise.
Typical values are at VIN = 5.0V, TAMB = 25°C
Symbol Name
Conditions
Min
Typ
2
Max
5
Units
mA
mA
mA
mA
µA
IDD1
IDD2
IDD3
IDD4
ILKG
RLIN
RBIN
Supply Current Outputs Off
VLED = 5V, RSET = 24.9kΩ
VLED = 5V, RSET = 5.23kΩ
VLED = 0.5V, RSET = 24.9kΩ
VLED = 0.5V, RSET = 5.23kΩ
VLED = 5V, Outputs Off
Supply Current Outputs Off
Supply Current Outputs On
Supply Current Outputs On
LED Output Leakage
4
10
5
2
4
10
1
-1
LIN Pull-down Resistance
BIN Pull-up Resistance
140
140
180
180
250
250
kΩ
kΩ
VIH
VIL
Logic high input voltage
Logic low input voltage
0.7x VDD
V
0.3x VDD
-5
Logic Input Leakage Current
(CIN, SIN)
IIL
VI = VDD or GND
0
5
µA
V
VOH
VOL
xOUT Logic High Output Voltage
xOUT Logic Low Output Voltage IOL = 1mA
IOH = -1mA
VCC-0.3V
0.3
VRSET RSETx Regulated Voltage
TSD Thermal Shutdown
1.17
1.2
150
20
1.23
V
°C
°C
THYS Thermal Hysteresis
ILED/IRSET RSET to LED Current Gain ratio 100mA LED Current
400
Undervoltage Lockout (UVLO)
Threshold
VUVLO
1.8
V
Doc. No. MD-5038, Rev. A
2
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
TIMING CHARACTERISTICS
Min and Max values are over recommended operating conditions unless specified otherwise.
Typical values are at VIN = 5.0V, TAMB = 25°C
Symbol Name
CIN
Conditions
Min
Typ
Max Units
fcin
tcwh
tcwl
CIN Clock Frequency
25
MHz
ns
CIN Pulse Width High
CIN Pulse Width Low
18
18
ns
SIN
tssu
Setup time SIN to CIN
Hold time SIN to CIN
4
4
ns
ns
tsh
LIN
Tlwh
tlchd
tlcsu
LEDn
tledplon
tledploff
tledpbon
tledpboff
tledr
LIN Pulse width
20
4
ns
ns
ns
Hold time LIN to CIN
Setup time LIN to CIN
8
Turn on Propagation delay LIN
Turn off Propagation delay LIN
Turn on Propagation delay BIN
Turn off Propagation delay BIN
LED rise time (10% to 90%)
LED fall time (90% to 10%)
LIN to LED(n) on
380
130
380
130
160
140
ns
ns
ns
ns
ns
ns
LIN to LED(n) off
BIN to LED(n) on
BIN to LED(n) off
Pullup resistor = 50Ω to 3.0V
Pullup resistor = 50Ω to 3.0V
tledf
SOUT
tsr
SOUT rise time (10% to 90%)
SOUT fall time (90% to 10%)
Propagation delay time SOUT
Propagation delay time SOUT
CL = 15pF
5
5
6
6
ns
ns
ns
ns
tsf
CL = 15pF
tsdf
CIN falling to SOUT falling
CIN falling to SOUT rising
18
18
tsdr
COUT
tcr
COUT rise time (10% to 90%)
COUT fall time (90% to 10%)
Propagation delay time COUT
Propagation delay time COUT
CL = 15pF
5
5
4
4
ns
ns
ns
ns
tcf
CL = 15pF
tcdf
CIN falling to COUT falling
CIN rising to COUT rising
10
10
tcdr
LOUT
tlr
LOUT rise time (10% to 90%)
LOUT fall time (90% to 10%)
Propagation delay time LOUT
Propagation delay time LOUT
CL = 15pF
5
5
4
5
ns
ns
ns
ns
tlf
CL = 15pF
tldf
LIN falling to LOUT falling
LIN rising to LOUT rising
10
10
tldr
BOUT
tbr
BOUT rise time (10% to 90%)
BOUT fall time (90% to 10%)
Propagation delay time BOUT
Propagation delay time BOUT
CL = 15pF
5
5
6
8
ns
ns
ns
ns
tbf
CL = 15pF
tbdf
BIN falling to BOUT falling
BIN rising to BOUT rising
20
20
tbdr
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-5038, Rev. A
CAT4103
1/fcin
CIN
SIN
tssu
tsh
tcwl
tcwh
tsdf
tsdr
tlchd
tlcsu
SOUT
LIN
tlwd
Figure 2. Timing Diagram A
tledploff
tledplon
LIN
tledpboff
BIN
tledpbon
LED(n)
Figure 3. Timing Diagram B
Doc. No. MD-5038, Rev. A
4
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VDD = 5V, C1 = 1μF, TAMB = 25°C unless otherwise specified.
Quiescent Current vs. Input Voltage (ILED = 0mA)
Quiescent Current vs. RSET Current
1.2
8.0
6.0
4.0
2.0
0.0
No Load
1.0
0.8
0.6
0.4
3.0
3.5
4.0
4.5
5.0
5.5
0
100
200
300
400
INPUT VOLTAGE [V]
RSET CURRENT [μA]
Quiescent Current vs. Input Voltage (ILED = 175mA)
LED Current vs. LED Pin Voltage
6.0
200
Full Load
5.5
160
120
80
40
0
5.0
4.5
4.0
3.0
3.5
4.0
4.5
5.0
5.5
0.0
0.2
0.4
0.6
0.8
1.0
INPUT VOLTAGE [V]
LED PIN VOLTAGE [V]
LED Current Change vs. Input Voltage
LED Current Change vs. Temperature
200
200
160
120
80
40
0
160
120
80
40
0
3.0
3.5
4.0
4.5
5.0
5.5
-40
0
40
80
120
INPUT VOLTAGE [V]
TEMPERATURE [ºC]
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
5
Doc. No. MD-5038, Rev. A
CAT4103
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VDD = 5V, C1 = 1μF, TAMB = 25°C unless otherwise specified.
RSET Pin Voltage vs. Input Voltage
RSET Pin Voltage vs. Temperature
1.30
1.30
1.25
1.20
1.15
1.10
1.25
1.20
1.15
1.10
-40
0
40
80
120
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE [ºC]
INPUT VOLTAGE [V]
BIN Transient Response
LED Current vs. RSET Resistor
200
160
120
80
40
0
0
15
30
45
60
RSET [kΩ]
Doc. No. MD-5038, Rev. A
6
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
PIN DESCRIPTIONS
Name
GND
Pin Number Function
1
2
Ground Reference
BIN
Blank input pin
LIN
3
Latch Data input pin
SIN
4
Serial Data input pin
CIN
5
Serial Clock input pin
RSET3
RSET2
RSET1
LED3
LED2
LED1
COUT
SOUT
LOUT
BOUT
VDD
6
LED current set pin for LED3
LED current set pin for LED2
LED current set pin for LED1
LED channel 3 cathode terminal
LED channel 2 cathode terminal
LED channel 1 cathode terminal
Serial Clock output pin
Serial Data output pin
Latch Data output pin
7
8
9
10
11
12
13
14
15
16
Blank output pin
Device Supply pin
PIN FUNCTION
GND is the ground reference pin for the entire device.
This pin must be connected to the ground plane on
the PCB.
LED1 to LED3 are the LED current sink inputs. These
pins are connected to the bottom cathodes of the LED
strings. The current sinks bias the LEDs with a current
equal to 400 times the RSET pin current. For the LED
sink to operate correctly, the voltage on the LED pin
must be above 0.4V. Each LED channel can
withstand and operate with voltages up to 25V.
BIN is the blank input used to disable all channels.
When low, all LED channels are enabled according to
the output latch content. When high, all LED channels
are turned off. This pin can be used to turn all the
LEDs off while preserving the data in the output
latches.
COUT is a driven output of CIN and can be connected
to the next device in the cascade.
LIN is the latch data input. On the rising edge of LIN,
data is loaded from the 3-bit serial shift register into
the output register latch. On the falling edge of LIN the
data is latched in the output register and isolated from
the state of the serial shift register.
SOUT is the output of the 3-bit serial shift register.
Connect to SIN of the next device in the cascade.
SOUT is clocked on the falling edge of CIN.
LOUT is a driven output of LIN and can be connected
to the next chip in the cascade.
SIN is the serial data input. Data is loaded into the
internal register on each rising edge of CIN.
BOUT is a driven output of BIN and can be connected
to the next chip in the cascade.
CIN is the serial clock input. On each rising CIN edge,
data is transferred from SIN to the internal 3-bit serial
shift register.
VDD is the positive supply pin voltage for the
entire device. A small 1µF ceramic capacitor is
recommended close to the pin.
RSET1 to RSET3 are the LED current set inputs. The
current pulled out of these pins will be mirrored in the
corresponding LED channel with a gain of 400.
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
7
Doc. No. MD-5038, Rev. A
CAT4103
BLOCK DIAGRAM
LED1 LED2 LED3
Upon power-up, an under-voltage lockout circuit
clears all latches and shift registers and sets all
outputs to off. Once the VDD supply voltage is greater
than the under-voltage lockout threshold, the device
can be programmed.
1.2V Ref
RSET1
RSET2
RSET3
Current Setting
VDD
Current Setting
Current Setting
CURRENT
SINKS
Pull-up and pull-down resistors are internally provided
to set the state of the BIN and LIN pins to low current
off state when not externally driven.
BIN
LIN
BOUT
A high-speed 4-wire interface is provided to program
the state of each LED channel ON or OFF.
BLANK
LATCH
L0
S0
L1
S1
L2
S2
The 4-wire interface contains a 3-bit serial-to-parallel
shift register (S0-S2) and a 3-bit latch (L0-L2). The
shift register operates on a first-in first-out (FIFO)
basis. The most significant bit S2 corresponds to the
first data entered in from SIN. Programming the
serial-to-parallel register is accomplished via SIN and
CIN input pins. On each rising edge of the CIN signal
the data from SIN is moved through the shift register
serially. Data is also moved out of SOUT to the next
device if programming more than one device on the
same interface.
LOUT
SOUT
SIN
CIN
D
Q
SHIFT
REGISTER
CK
CLOCK
COUT
GND
Figure 1. CAT4103 Functional Block Diagram
BASIC OPERATION
On the rising edge of LIN, the data content of the serial
to parallel shift register is reflected in the latches. On
the falling edge of LIN, the state of the serial-to-parallel
register at that particular time is saved in the latches
and does not change regardless of the content of the
serial to parallel register.
The CAT4103 uses 3 independent current sinks to
accurately regulate the current in each LED channel
to 400 times the current sink from the corresponding
RSET pin. Each of the resistors tied to the RSET1,
RSET2, RSET3 pins set the current respectively in
the LED1, LED2, and LED3 channels. Table 1 shows
some standard resistor values for RSET and the
corresponding LED current.
BIN is used to disable all LEDs off at one time while
still maintaining the data contents of the latch register.
BIN is an active low input pin. When low the outputs
reflect the data in the latches. When high the outputs
are all high impedance (LEDs off).
Table 1. RSET Resistor Settings
LED Current [mA]
RSET[kΩ]
24.9
All 4-wire inputs have a corresponding output driver
for cascaded systems (SOUT, COUT, LOUT, BOUT).
These output buffers allow many CAT4103 drivers to
be cascaded without signal and timing degradation
due to long wire interconnections.
20
60
8.45
100
175
5.23
3.01
Tight current regulation for all channels is possible
over a wide range of input and LED voltages due to
independent current sensing circuitry on each
channel. The LED channels have a low dropout of
0.4V or less for all current ranges and supply
voltages. This helps improve heat dissipation and
efficiency over other competing solutions.
Doc. No. MD-5038, Rev. A
8
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
APPLICATION INFORMATION
CASCADING MULTIPLE DEVICES
The CAT4103 is designed to be cascaded for driving
multiple RGD LEDs. Figure 5 shows three CAT4103
drivers cascaded together. The programming data
from the controller travels serially through each
device. Figure 4 shows a programming example
turning on the following LED channels: BLUE3,
GREEN2 and RED1. The programming waveforms
are measured from the controller to the inputs of the
first CAT4103.
Figure 4. Programming Example
5V
C1
C2
C3
1µF
1µF
1µF
RED1
GREEN1 BLUE1
RED2
GREEN2 BLUE2
RED3
GREEN3 BLUE3
VDD LED1
BIN
LED2
LED3
VDD LED1
BIN
LED2
LED3
VDD LED1
BIN
LED2
LED3
BOUT
LOUT
SOUT
COUT
BOUT
LOUT
SOUT
COUT
BOUT
LOUT
SOUT
COUT
LIN
SIN
CIN
LIN
SIN
CIN
LIN
SIN
CIN
CAT4103
#1
CAT4103
#2
CAT4103
#3
GND RSET1 RSET2
RSET3
R3
GND RSET1 RSET2
R4 R5
RSET3
R6
GND RSET1 RSET2
R7 R8
RSET3
R9
R1
R2
Figure 5. Three Cascaded CAT4103 Devices
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
9
Doc. No. MD-5038, Rev. A
CAT4103
POWER DISSIPATION
RECOMMENDED LAYOUT
The power dissipation (PD) of the CAT4103 can be
calculated as follows:
Bypass capacitor C1 should be placed as close to the
IC as possible. RSET resistors should be directly
connected to the GND pin of the device. For better
thermal dissipation, multiple via can be used to
connect the GND pad to a large ground plane. It is
also recommended to use large pads and traces on
the PCB wherever possible to spread out the heat.
The LEDs for this layout are driven from a separate
supply (VLED+), but they can also be driven from the
same supply connected to VDD.
PD =
(
VDD ×IDD
)
+ Σ
(
VLEDN ×ILEDN
)
where VLEDN is the voltage at the LED pin, and ILEDN is
the associated LED current. Combinations of high
VLED voltage or high ambient temperature can cause
the CAT4103 to enter thermal shutdown. In
applications where VLEDN is high, a resistor can be
inserted in series with the LED string to lower PD.
Thermal dissipation of the junction heat consists
primarily of two paths in series. The first path is the
junction to the case (θJC) thermal resistance which is
defined by the package style, and the second path is
the case to ambient (θCA) thermal resistance, which is
dependent on board layout. The overall junction to
ambient (θJA) thermal resistance is equal to:
θJA = θJC + θCA
For a given package style and board layout, the
operating junction temperature TJ is a function of the
power dissipation PD, and the ambient temperature,
resulting in the following equation:
TJ = TAMB + PD (θJC + θCA)
= TAMB + PD θJA
When mounted on a double-sided printed circuit
board with two square inches of copper allocated for
“heat spreading”, the resulting θJA is about 74°C/W.
Figure 6. Recommended Layout
For example, at 60°C ambient temperature, the
maximum power dissipation is calculated as follow:
(TJmax - TAMB
)
(150 - 60)
PDmax
=
=
= 1.2W
θJA
74
Doc. No. MD-5038, Rev. A
10
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
PACKAGE OUTLINE DRAWING
SOIC 16-LEAD 150MILS (V) (1)(2)
SYMBOL
MIN
NOM
MAX
1.75
0.25
0.51
0.25
10.00
6.20
4.00
A
A1
b
1.35
0.10
0.33
0.19
9.80
5.80
3.80
c
E1
E
D
E
9.90
6.00
E1
e
3.90
1.27 BSC
h
0.25
0.40
0º
0.50
1.27
8º
L
θ
PIN#1 IDENTIFICATION
TOP VIEW
D
h
θ
A
c
e
b
L
A1
SIDE VIEW
END VIEW
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions in millimeters. Angle in degrees.
(2) Compiles with JEDEC standard-012.
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
11
Doc. No. MD-5038, Rev. A
CAT4103
EXAMPLE OF ORDERING INFORMATIONFFF(1)
Prefix
Device # Suffix
CAT
4103
V
–
G
T2
Package
V: SOIC
Tape & Reel
T: Tape & Reel
2: 2,000/Reel
Company ID
Product Number
4103
Lead Finish
G: NiPdAu
Blank: Matte-Tin
Notes:
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).
(2) The standard plated finish is NiPdAu.
(3) The device used in the above example is a CAT4103V-GT2 (SOIC, NiPdAu, Tape & Reel, 2,000/Reel).
(4) For additional temperature options, please contact your nearest ON Semiconductor Sales office.
Doc. No. MD-5038, Rev. A
12
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT4103
REVISION HISTORY
Date
Revision Description
Initial Issue
31-Oct-08
A
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to
any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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LITERATURE FULFILLMENT:
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Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
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Email: orderlit@onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
13
Doc. No. MD-5038, Rev. A
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