CS5204-2GDPR3 [ONSEMI]

4.0 A, 1.5 V Fixed Linear Regulator; 4.0 A, 1.5 V固定线性稳压器
CS5204-2GDPR3
型号: CS5204-2GDPR3
厂家: ONSEMI    ONSEMI
描述:

4.0 A, 1.5 V Fixed Linear Regulator
4.0 A, 1.5 V固定线性稳压器

稳压器 调节器 输出元件
文件: 总8页 (文件大小:59K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CS5204−2  
4.0 A, 1.5 V Fixed Linear  
Regulator  
The CS5204−2 linear regulator provides 4.0 A @ 1.5 V with an  
accuracy of ±2.0%.  
The fast loop response and low dropout voltage make this regulator  
ideal for GTL bus termination where low voltage operation and good  
transient response are important.  
http://onsemi.com  
The circuit is designed to operate with dropout voltages as low as 1.0 V  
depending on the output current level. The maximum quiescent current is  
only 10 mA at full load.  
TO−220−3  
T SUFFIX  
CASE 221A  
The regulator is fully protected against overload conditions with  
protection circuitry for Safe Operating Area (SOA), overcurrent and  
thermal shutdown.  
Tab = V  
OUT  
Pin 1. GND  
2
The regulator is available in TO−220−3 and surface mount D PAK−3  
2. V  
OUT  
1
2
3. V  
IN  
packages.  
2
3
3
2
Features  
Output Current to 4.0 A  
D PAK−3  
D2T SUFFIX  
CASE 418AB  
Output Voltage Trimmed to ±2.0%  
Dropout Voltage (typical) 1.10 V @ 4.0 A  
Fast Transient Response  
Fault Protection Circuitry  
Thermal Shutdown  
1
MARKING DIAGRAMS  
2
TO−220−3  
D PAK−3  
Overcurrent Protection  
Safe Area Protection  
CS5204−2  
AWLYWW  
CS5204−2  
AWLYWW  
V
OUT  
1
V
IN  
1
A
= Assembly Location  
WL, L = Wafer Lot  
YY, Y = Year  
WW, W = Work Week  
Output  
Current  
Limit  
Thermal  
Shutdown  
+
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
Error  
Amplifier  
dimensions section on page 5 of this data sheet.  
Bandgap  
GND  
Figure 1. Block Diagram  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
January, 2004 − Rev. 9  
CS5204−2/D  
CS5204−2  
MAXIMUM RATINGS*  
Parameter  
Value  
17  
Unit  
V
Supply Voltage, V  
CC  
Operating Temperature Range  
Junction Temperature  
−40 to +70  
150  
°C  
°C  
°C  
Storage Temperature Range  
Lead Temperature Soldering:  
−60 to +150  
Wave Solder (through hole styles only) Note 1  
Reflow (SMD styles only) Note 2  
260 Peak  
230 Peak  
°C  
°C  
1. 10 second maximum.  
2. 60 second maximum above 183°C  
*The maximum package power dissipation must be observed.  
ELECTRICAL CHARACTERISTICS (C = 10 mF, C  
= 22 mF Tantalum, V − V  
= 3.0 V, V 10 V, 0°C T 70°C,  
OUT IN A  
IN  
OUT  
IN  
T +150°C, unless otherwise specified, I  
= 4.0 A)  
J
full load  
Characteristic  
CS5204−2  
Test Conditions  
Min  
Typ  
Max  
Unit  
Output Voltage (Notes 3 and 4)  
V
IN  
− V  
= 1.5 V;  
1.47  
1.50  
1.53  
V
OUT  
0 I  
4.0 A  
(−2.0%)  
(+2.0%)  
OUT  
Line Regulation  
1.5 V V − V  
6.0 V; I = 10 mA  
OUT  
0.04  
0.05  
1.1  
0.20  
0.4  
%
%
V
IN  
OUT  
Load Regulation (Notes 3 and 4)  
Dropout Voltage (Note 5)  
Current Limit  
V
IN  
− V  
= 1.5 V; 10 mA I  
4.0 A  
OUT  
OUT  
I
= 4.0 A  
1.2  
OUT  
V
IN  
V
IN  
− V  
− V  
= 3.0 V; T 25°C  
= 15 V  
4.5  
8.5  
2.5  
A
A
OUT  
OUT  
J
Quiescent Current  
Thermal Regulation  
Ripple Rejection  
V
9.0 V; I  
= 10 mA  
5.0  
0.003  
75  
10  
mA  
%/W  
dB  
IN  
OUT  
30 ms Pulse, T = 25°C  
A
f = 120 Hz; I  
= 4.0 A  
OUT  
Temperature Stability  
0.5  
%
RMS Output Noise (%V  
Thermal Shutdown  
)
10 Hz f 10 kHz  
0.003  
180  
25  
%/V  
OUT  
OUT  
150  
°C  
°C  
Thermal Shutdown Hysteresis  
3. Load regulation and output voltage are measured at a constant junction temperature by low duty cycle pulse testing. Changes in output  
voltage due to thermal gradients or temperature changes must be taken into account separately.  
4. Specifications apply for an external Kelvin sense connection at a point on the output pin 1/4” from the bottom of the package.  
5. Dropout voltage is a measurement of the minimum input/output differential at full load.  
PACKAGE PIN DESCRIPTION  
Package Pin Number  
2
TO−220−3  
D PAK−3  
Pin Symbol  
Function  
1
2
3
1
2
3
GND  
Ground connection.  
V
OUT  
Regulated output voltage (case).  
Input voltage.  
V
IN  
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2
 
CS5204−2  
TYPICAL PERFORMANCE CHARACTERISTICS  
0.10  
0.08  
0.06  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
0.75  
0.70  
0.04  
T
= 0°C  
CASE  
0.02  
0.00  
−0.02  
−0.04  
−0.06  
−0.08  
−0.10  
−0.12  
T
= 125°C  
CASE  
T
= 25°C  
CASE  
0
1
2
3
4
0
10 20 30 40 50 60 70 80 90 100 110 120 130  
Output Current (A)  
T (°C)  
J
Figure 2. Dropout Voltage vs. Output  
Current  
Figure 3. Reference Voltage vs.  
Temperature  
0.200  
0.175  
0.150  
0.125  
0.100  
0.075  
0.050  
0.025  
0.000  
2.500  
2.175  
1.850  
1.525  
1.200  
0.875  
0.550  
T
= 0°C  
CASE  
T
= 25°C  
CASE  
T
= 25°C  
CASE  
T
= 125°C  
CASE  
T
= 125°C  
CASE  
7
T
= 0°C  
CASE  
3
0
1
2
4
1
2
3
4
5
6
8
9
Output Current (A)  
V
IN  
− V  
(V)  
OUT  
Figure 4. Load Regulation vs.  
Output Current  
Figure 5. Minimum Load Current  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
T
= 25°C  
= 4.0 A  
CASE  
I
OUT  
(V − V  
V
) = 3.0 V  
OUT  
IN  
= 1.6 V  
RIPPLE  
PP  
1
2
3
4
5
10  
10  
10  
10  
10  
Frequency (Hz)  
Figure 6. Ripple Rejection vs. Frequency  
http://onsemi.com  
3
CS5204−2  
APPLICATIONS INFORMATION  
Protection Diodes  
The CS5204−2 linear regulator provides fixed 1.5 V  
voltage at currents up to 4.0 A. The regulator is protected  
against short circuit, and includes thermal shutdown and  
safe area protection (SOA) circuitry. The SOA protection  
circuitry decreases the maximum available output current as  
the input−output differential voltage increase.  
When large external capacitors are used with a linear  
regulator it is sometimes necessary to add protection diodes.  
If the input voltage of the regulator gets shorted, the output  
capacitor will discharge into the output of the regulator. The  
discharge current depends on the value of the capacitor, the  
output voltage and the rate at which V drops. In the  
The CS5204−2 has a composite PNP−NPN output  
transistor and requires an output capacitor for stability. A  
detailed procedure for selecting this capacitor is included in  
the Stability Considerations section.  
IN  
CS5204−2 linear regulator, the discharge path is through a  
large junction and protection diodes are not usually needed.  
If the regulator is used with large values of output  
capacitance and the input voltage is instantaneously shorted  
to ground, damage can occur. In this case, a diode connected  
as shown in Figure 7 is recommended.  
Stability Considerations  
The output compensation capacitor helps determine three  
main characteristics of a linear regulator: start−up delay,  
load transient response, and loop stability.  
IN4002 (Optional)  
The capacitor value and type is based on cost, availability,  
size and temperature constraints. A tantalum or aluminum  
electrolytic capacitor is best, since a film or ceramic  
capacitor with almost zero ESR can cause instability. The  
aluminum electrolytic capacitor is the least expensive  
solution. However, when the circuit operates at low  
temperatures, both the value and ESR of the capacitor will  
vary considerably. The capacitor manufacturer’s data sheet  
provides this information.  
A 22 mF tantalum capacitor will work for most  
applications, but with high current regulators such as the  
CS5204−2 the transient response and stability improve with  
higher values of capacitance. The majority of applications  
for this regulator involve large changes in load current so the  
output capacitor must supply the instantaneous load current.  
The ESR of the output capacitor causes an immediate drop  
in output voltage given by:  
V
IN  
V
OUT  
V
IN  
V
OUT  
CS5204−2  
C
C
2
1
GND  
Figure 7. Protection Diode Scheme  
Output Voltage Sensing  
Since the CS5204−2 is a three terminal regulator, it is not  
possible to provide true remote load sensing. Load  
regulation is limited by the resistance of the conductors  
connecting the regulator to the load. For best results the  
regulator should be connected as shown in Figure 8.  
Conductor Parasitic  
Resistance  
R
DV + DI   ESR  
C
V
IN  
V
IN  
V
OUT  
For microprocessor applications it is customary to use an  
output capacitor network consisting of several tantalum and  
ceramic capacitors in parallel. This reduces the overall ESR  
and reduces the instantaneous output voltage drop under  
transient load conditions. The output capacitor network  
should be as close to the load as possible for the best results.  
CS5204−2  
R
LOAD  
GND  
Figure 8. Conductor Parasitic Resistance Effects Can  
Be Minimized With the Above Grounding Scheme  
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4
 
CS5204−2  
Calculating Power Dissipation and Heat Sink  
Requirements  
A heat sink effectively increases the surface area of the  
package to improve the flow of heat away from the IC and  
into the surrounding air.  
Each material in the heat flow path between the IC and the  
outside environment has a thermal resistance. Like series  
electrical resistances, these resistances are summed to  
The CS5204−2 linear regulator includes thermal  
shutdown and safe operating area circuitry to protect the  
device. High power regulators such as these usually operate  
at high junction temperatures so it is important to calculate  
the power dissipation and junction temperatures accurately  
to ensure that an adequate heat sink is used.  
determine R , the total thermal resistance between the  
qJA  
junction and the surrounding air.  
The case is connected to V  
on the CS5204−2,  
OUT  
1. Thermal Resistance of the junction to case, R  
qJC  
electrical isolation may be required for some applications.  
Thermal compound should always be used with high current  
regulators such as these.  
(°C/W)  
2. Thermal Resistance of the case to Heat Sink, R  
qCS  
(°C/W)  
The thermal characteristics of an IC depend on the  
following four factors:  
3. Thermal Resistance of the Heat Sink to the ambient  
air, R (°C/W)  
qSA  
These are connected by the equation:  
1. Maximum Ambient Temperature T (°C)  
A
2. Power dissipation P (Watts)  
3. Maximum junction temperature T (°C)  
D
R
+ R  
) R  
) R  
QSA  
(3)  
QJA  
QJC  
QCS  
J
4. Thermal resistance junction to ambient R  
(°C/W)  
qJA  
The value for R  
is calculated using equation (3) and the  
qJA  
result can be substituted in equation (1).  
is 1.6°C/Watt for the CS5204−2. For a high current  
These four are related by the equation  
R
qJC  
regulator such as the CS5204−2 the majority of the heat is  
generated in the power transistor section. The value for R  
T + T ) P   R  
QJA  
(1)  
J
A
D
qSA  
The maximum ambient temperature and the power  
dissipation are determined by the design while the  
maximum junction temperature and the thermal resistance  
depend on the manufacturer and the package type.  
depends on the heat sink type, while R  
depends on  
qCS  
factors such as package type, heat sink interface (is an  
insulator and thermal grease used?), and the contact area  
between the heat sink and the package. Once these  
calculations are complete, the maximum permissible value  
The maximum power dissipation for a regulator is:  
of R  
can be calculated and the proper heat sink selected.  
qJA  
{
}
I
P
+ V  
* V  
) V  
I
D(max)  
IN(max)  
OUT(min) OUT(max)  
IN(max) Q  
For further discussion on heat sink selection, see application  
note “Thermal Management,” document number  
AND8036/D, available through the Literature Distribution  
Center or via our website at http://onsemi.com.  
(2)  
where:  
V
V
is the maximum input voltage,  
IN(max)  
OUT(min)  
OUT(max)  
is the minimum output voltage,  
is the maximum output current, for the  
I
application  
I is the maximum quiescent current at I  
Q
.
OUT(max)  
ORDERING INFORMATION  
Orderable Part Number  
CS5204−2GT3  
Type  
Package  
Shipping  
4.0 A, 1.5 V Output  
4.0 A, 1.5 V Output  
4.0 A, 1.5 V Output  
TO−220−3, STRAIGHT  
50 Units / Rail  
50 Units / Rail  
750 / Tape & Reel  
2
CS5204−2GDP3  
D PAK−3  
2
CS5204−2GDPR3  
D PAK−3  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
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5
 
CS5204−2  
PACKAGE DIMENSIONS  
TO−220−3  
T SUFFIX  
CASE 221A−08  
ISSUE AA  
NOTES:  
SEATING  
PLANE  
−T−  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
F
−B−  
C
T
INCHES  
DIM MIN MAX  
MILLIMETERS  
S
MIN  
14.23  
9.66  
3.56  
0.64  
3.53  
MAX  
15.87  
10.66  
4.82  
A
B
C
D
F
0.560  
0.380  
0.140  
0.025  
0.139  
0.625  
0.420  
0.190  
0.035  
0.155  
4
Q
A
K
0.89  
3.93  
1
2
3
U
G
H
J
0.100 BSC  
2.54 BSC  
−−−  
0.012  
0.500  
0.045  
0.280  
0.045  
0.580  
0.060  
−−−  
0.31  
7.11  
1.14  
H
L
−Y−  
K
L
12.70  
1.15  
14.73  
1.52  
N
Q
R
S
T
0.200 BSC  
5.08 BSC  
0.100  
0.080  
0.020  
0.235  
0.000  
0.045  
0.135  
0.115  
0.055  
0.255  
0.050  
−−−  
2.54  
2.04  
0.51  
5.97  
0.00  
1.15  
3.42  
2.92  
1.39  
6.47  
1.27  
−−−  
R
J
V
G
U
V
D 3 PL  
M
M
0.25 (0.010)  
B
Y
N
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6
CS5204−2  
PACKAGE DIMENSIONS  
D2PAK−3  
DP SUFFIX  
CASE 418AB−01  
ISSUE O  
For D2PAK Outline and  
Dimensions − Contact Factory  
PACKAGE THERMAL DATA  
2
Parameter  
TO−220−3  
D PAK−3  
Unit  
°C/W  
°C/W  
R
R
Typical  
Typical  
1.6  
50  
1.6  
q
q
JC  
JA  
10−50*  
+ R  
*Depending on thermal properties of substrate. R  
= R  
q
JC  
q
q
CA  
JA  
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7
CS5204−2  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800−282−9855 Toll Free  
USA/Canada  
ON Semiconductor Website: http://onsemi.com  
Order Literature: http://www.onsemi.com/litorder  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
Japan: ON Semiconductor, Japan Customer Focus Center  
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051  
Phone: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
CS5204−2/D  

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