CSPEMI608G [ONSEMI]
8 沟道 LCD 滤波器阵列，带 ESD 保护;
| 型号： | CSPEMI608G |
| 厂家： | 
ONSEMI |
| 描述： | 8 沟道 LCD 滤波器阵列，带 ESD 保护 LTE CD |
| 文件： | 总12页 (文件大小：1291K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CSPEMI606/608
LCD EMI Filter Array with
ESD Protection
Description
The CSPEMI606 and CSPEMI608 are EMI filter arrays with ESD
protection, which integrate six and eight Pi−filters (C−R−C),
respectively. The CSPEMI606/608 has component values of 15 pF −
100 ꢀ − 15 pF. These devices include ESD protection diodes on every
pin, which provide a very high level of protection for sensitive
electronic components that may be subjected to electrostatic discharge
(ESD). The ESD diodes connected to the filter ports are designed and
characterized to safely dissipate ESD strikes of 15 kV, beyond the
maximum requirement of the IEC 61000−4−2 international standard.
Using the MIL−STD−883 (Method 3015) specification for Human
Body Model (HBM) ESD, the pins are protected for contact
discharges at greater than 30 kV.
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WLCSP15
CASE 567BS
WLCSP20
CASE 567BZ
MARKING DIAGRAM
These devices are particularly well suited for portable electronics
(e.g. wireless handsets, PDAs, notebook computers) because of their
small package format and easy−to−use pin assignments. They are ideal
for EMI filtering and protecting data lines from ESD for the LCD
display in clamshell handsets. The CSPEMI606 and CSPEMI608 are
available in space−saving, low−profile chip−scale packages.
606
EMI608
CSPEMI606
15−Bump CSP
CSPEMI608
20−Bump CSP
606
= CSPEMI606
Features
EMI608 = CSPEMI608
• Six and Eight Channels of EMI Filtering
•
15 kV ESD Protection on each Channel
(IEC 61000−4−2 Level 4, Contact Discharge)
30 kV ESD Protection on each Channel (HBM)
ORDERING INFORMATION
•
†
Device
Package
Shipping
• Better than 30 dB of Attenuation at 1 GHz to 3 GHz
• 15−Bump, 2.960 mm x 1.330 mm Footprint
Chip Scale Package (CSPEMI606)
CSPEMI606G
CSP−15 3500/Tape & Reel
(Pb−Free)
• 20−Bump, 4.000 mm x 1.458 mm Footprint
Chip Scale Package (CSPEMI608)
CSPEMI608G
CSP−20 3500/Tape & Reel
(Pb−Free)
• Chip Scale Package Features Extremely Low Lead Inductance for
Optimum Filter and ESD Performance
• These Devices are Pb−Free and are RoHS Compliant
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Applications
• LCD Data Lines in Clamshell Wireless Handsets
• EMI Filtering & ESD Protection for High−Speed I/O Data Ports
• Wireless Handsets / Cell Phones
• Notebook Computers
• PDAs / Handheld PCs
• EMI Filtering for High−Speed Data Lines
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
May, 2011 − Rev. 4
CSPEMI606/608/D
CSPEMI606/608
ELECTRICAL SCHEMATIC
100 ꢀ
FILTERn*
FILTERn*
15 pF
15 pF
GND
(Pins B1−Bn)
1 of 6 or 8 EMI Filtering + ESD Channels
*See Package/Pinout Diagrams for expanded pin information.
PACKAGE / PINOUT DIAGRAMS
Top View
Bottom View
(Bumps Down View)
(Bumps Up View)
Orientation
Marking
1
2
3
4
5
6
+
A
B
C
C1 C2 C3 C4 C5 C6
B1
B2
B3
Orientation
Marking
A1 A2 A3 A4 A5 A6
A1
CSPEMI606
CSP Package
Orientation
Marking
1
2
3
4
5
6
7
8
+
A
B
C
C1 C2 C3 C4 C5 C6 C7 C8
B1
B2
B3
B4
Orientation
Marking
A1 A2 A3 A4 A5 A6 A7 A8
A1
CSPEMI608
CSP Package
Table 1. PIN DESCRIPTIONS
Pin(s)
Pin(s)
CSPEMI606 CSPEMI608
CSPEMI606 CSPEMI608
Name
Description
Name
Description
Filter Channel 1
Filter Channel 2
Filter Channel 3
Filter Channel 4
Filter Channel 5
Filter Channel 6
Filter Channel 7
Filter Channel 8
A1
A2
A1
A2
FILTER1
FILTER2
FILTER3
FILTER4
FILTER5
FILTER6
FILTER7
FILTER8
GND
Filter Channel 1
Filter Channel 2
Filter Channel 3
Filter Channel 4
Filter Channel 5
Filter Channel 6
Filter Channel 7
Filter Channel 8
Device Ground
C1
C2
C3
C4
C5
C6
−
C1
C2
C3
C4
C5
C6
C7
C8
FILTER1
FILTER2
FILTER3
FILTER4
FILTER5
FILTER6
FILTER7
FILTER8
A3
A3
A4
A4
A5
A5
A6
A6
−
A7
−
A8
−
B1−B3
B1−B4
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2
CSPEMI606/608
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
−65 to +150
100
Units
°C
Storage Temperature Range
DC Power per Resistor
mW
mW
DC Package Power Rating
500
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. STANDARD OPERATING CONDITIONS
Parameter
Rating
Units
Operating Temperature Range
−40 to +85
°C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol
Parameter
Conditions
Min
80
Typ
100
15
Max
120
18
Units
ꢀ
R
C
Resistance
Capacitance
At 2.5 V DC, 1 MHz,
30 mV AC
12
pF
V
Diode Standoff Voltage
I
= 10 ꢁ A
6.0
V
nA
V
DIODE
DIODE
I
Diode Leakage Current (reverse bias)
V
= 3.3 V
200
LEAK
DIODE
V
Signal Voltage
Positive Clamp
Negative Clamp
I
= 10 mA
SIG
LOAD
5.6
−1.5
6.8
−0.8
9.0
−0.4
V
In−system ESD Withstand Voltage
a) Human Body Model, MIL−STD−883, Method 3015
b) Contact Discharge per IEC 61000−4−2 Level 4
(Notes 2 and 4)
kV
V
ESD
30
15
V
Clamping Voltage during ESD Discharge
MIL−STD−883 (Method 3015), 8 kV
Positive Transients
(Notes 2, 3 and 4)
CL
+12
−7
Negative Transients
f
C
Cut−off Frequency
R = 100 ꢀ, C = 15 pF
120
MHz
Z
= 50 ꢀ, Z
= 50 ꢀ
SOURCE
LOAD
1. T = 25°C unless otherwise specified.
A
2. ESD applied to input and output pins with respect to GND, one at a time.
3. Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A1, then clamping
voltage is measured at Pin C1.
4. Unused pins are left open.
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3
CSPEMI606/608
PERFORMANCE INFORMATION
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 1. Insertion Loss vs. Frequency (A1−C1 to GND B1)
Figure 2. Insertion Loss vs. Frequency (A2−C2 to GND B1)
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4
CSPEMI606/608
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 3. Insertion Loss vs. Frequency (A3−C3 to GND B2)
Figure 4. Insertion Loss vs. Frequency (A4−C4 to GND B2)
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5
CSPEMI606/608
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 5. Insertion Loss vs. Frequency (A5−C5 to GND B3)
Figure 6. Insertion Loss vs. Frequency (A6−C6 to GND B3)
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6
CSPEMI606/608
PERFORMANCE INFORMATION (Cont’d)
Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment)
Figure 7. Insertion Loss vs. Frequency
(A7−C7 to GND B4, CSPEMI608 Only)
Figure 8. Insertion Loss vs. Frequency
(A8−C8 to GND B4, CSPEMI608 Only)
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7
CSPEMI606/608
PERFORMANCE INFORMATION (Cont’d)
Figure 9. Filter Capacitance vs. Input Voltage over Temperature
(normalized to capacitance at 2.5 VDC and 255C)
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8
CSPEMI606/608
APPLICATION INFORMATION
Parameter
Value
0.240 mm
Pad Size on PCB
Pad Shape
Round
Pad Definition
Non−Solder Mask defined pads
0.290 mm Round
0.125 mm − 0.150 mm
0.300 mm Round
50/50 by volume
No Clean
Solder Mask Opening
Solder Stencil Thickness
Solder Stencil Aperture Opening (laser cut, 5% tapered walls)
Solder Flux Ratio
Solder Paste Type
Pad Protective Finish
OSP (Entek Cu Plus 106A)
50 ꢁ m
Tolerance − Edge To Corner Ball
Solder Ball Side Coplanarity
20 ꢁ m
Maximum Dwell Time Above Liquidous
Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste
60 seconds
260°C
Non−Solder Mask Defined Pad
0.240 mm DIA.
Solder Stencil Opening
0.300 mm DIA.
Solder Mask Opening
0.290 mm DIA.
Figure 10. Recommended Non−Solder Mask Defined Pad Illustration
250
200
150
100
50
0
1:00.0
2:00.0
3:00.0
4:00.0
Time (minutes)
Figure 11. Lead−free (SnAgCu) Solder Ball Reflow Profile
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP15, 2.96x1.33
CASE 567BS−01
ISSUE O
DATE 26 JUL 2010
SCALE 4:1
NOTES:
D
A
B
E
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
PIN A1
REFERENCE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
MILLIMETERS
DIM
A
A1
A2
b
MIN
0.56
0.21
0.40 REF
0.29
MAX
0.65
0.27
2X
0.05
0.05
C
2X
C
0.35
TOP VIEW
SIDE VIEW
D
E
eD
eE
2.96 BSC
1.33 BSC
0.50 BSC
0.435 BSC
A2
0.05
C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05
C
A1
PACKAGE
OUTLINE
SEATING
PLANE
NOTE 3
C
A1
eD/2
0.87
eD
15X
b
eE
0.05
0.03
C
C
A B
C
B
A
0.44
15X
0.25
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
1
2
3
4
5
6
7
8 9
BOTTOM VIEW
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON49826E
WLCSP15, 2.96X1.33
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP20, 4.00x1.46
CASE 567BZ−01
ISSUE O
DATE 26 JUL 2010
SCALE 4:1
D
A
NOTES:
B
E
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
PIN A1
REFERENCE
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
MILLIMETERS
DIM
A
A1
A2
b
D
E
MIN
0.56
0.21
0.40 REF
0.29
MAX
0.65
0.27
2X
0.05
0.05
C
0.35
2X
C
TOP VIEW
SIDE VIEW
4.00 BSC
1.46 BSC
0.50 BSC
0.435 BSC
A2
eD
eE
0.05
C
A
0.05
C
SEATING
PLANE
NOTE 3
C
A1
eD/2
eD
20X
b
eE
0.05
0.03
C
C
A B
C
B
A
1
2
3
4
5
6
7
8
9
10 11 12
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
A1
0.87
0.44
20X
0.25
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON49833E
WLCSP20, 4.00X1.46
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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