ESD7424MUT5G [ONSEMI]

30kV Capable Ultra-Low Capacitance 24V ESD Protection;


型号：	ESD7424MUT5G
厂家：	ONSEMI
描述：	30kV Capable Ultra-Low Capacitance 24V ESD Protection
文件：	总7页 (文件大小：186K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ESD7424

Ultra-Low Capacitance ESD

Protection

Micro−Packaged Diodes for ESD Protection

The ESD7424 is designed to protect voltage sensitive components

that require ultra−low capacitance from ESD and transient voltage

events. It has industry leading capacitance linearity over voltage

making it ideal for RF applications. This capacitance linearity

combined with the extremely small package and low insertion loss

makes this part well suited for use in antenna line applications for

wireless handsets and terminals.

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Features

MARKING

• Industry Leading Capacitance Linearity Over Voltage

• Ultra−Low Capacitance: < 1.0 pF Max

• Insertion Loss: 0.1 dB at 1 GHz; 0.50 dB at 3 GHz

• Low Leakage: < 1 mA

DIAGRAM

UDFN2

CASE 517CZ

• Protection for the following IEC Standards:

♦ IEC61000−4−2 (ESD): Level 4 30 kV Contact

♦ ISO 10605 (ESD) 330 pF/330 W 30 kV Contact

= Specific Device Code

= Date Code

• SZ Prefix for Automotive and Other Applications Requiring Unique

Site and Control Change Requirements; AEC−Q101 Qualified and

PPAP Capable

ORDERING INFORMATION

†

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Device

Package

Shipping

Compliant

ESD7424MUT5G

UDFN2

(Pb−Free)

8000 / Tape &

Reel

Typical Applications

SZESD7424MUT5G

UDFN2

(Pb−Free)

8000 / Tape &

Reel

• RF Signal ESD Protection

• Automotive Antenna ESD Protection

• Near Field Communications

• USB 2.0, USB 3.0

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Rating

Symbol

Value

Unit

IEC 61000−4−2 Contact (Note 1)

IEC 61000−4−2 Air

ISO 10605 Contact (330 pF / 330 W)

ISO 10605 Contact (330 pF / 2 kW)

ISO 10605 Contact (150 pF / 2 kW)

ESD

Total Power Dissipation (Note 2) @ T = 25°C

°P °

300

400

°C/W

Thermal Resistance, Junction−to−Ambient

Junction and Storage Temperature Range

T , T

−55 to

+150

°C

stg

Lead Solder Temperature − Maximum

(10 Second Duration)

260

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the

device. If any of these limits are exceeded, device functionality should not be

assumed, damage may occur and reliability may be affected.

1. Non−repetitive current pulse at T = 25°C, per IEC61000−4−2 waveform.

2. Mounted with recommended minimum pad size, DC board FR−4

Publication Order Number:

June, 2017 − Rev. 0

ESD7424/D

ESD7424

ELECTRICAL CHARACTERISTICS

(T = 25°C unless otherwise noted)

Symbol

Parameter

Maximum Reverse Peak Pulse Current

BR RWM

Clamping Voltage @ I

RWM BR C

RWM

Working Peak Reverse Voltage

Maximum Reverse Leakage Current @ V

RWM

Breakdown Voltage @ I

Test Current

Bi−Directional TVS

*See Application Note AND8308/D for detailed explanations of

datasheet parameters.

ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)

Parameter

Reverse Working Voltage

Breakdown Voltage

Symbol

Condition

Min

Typ

Max

Unit

RWM

I = 1 mA (Note 3)

Reverse Leakage Current

Clamping Voltage TLP

= 24 V

1.0

RWM

8 A (Note 4)

16 A (Note 4)

Junction Capacitance

= 0 V, f = 1 MHz

= 0 V, f = 1 GHz

0.6

1.0

0.7

Dynamic Resistance

Insertion Loss

TLP Pulse

1.05

DYN

f = 1 GHz

f = 3 GHz

0.10

0.50

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

3. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.

4. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.

TLP conditions: Z = 50 W, t = 100 ns, t = 4 ns, averaging window; t = 30 ns to t = 60 ns.

160

140

120

100

−20

−40

−60

−80

−100

−120

−140

−160

−20

−25

100

125

150 175

−25

100

125

150 175

TIME (ns)

Figure 1. IEC61000−4−2 +8 kV Contact ESD

Clamping Voltage

Figure 2. IEC61000−4−2 −8 kV Contact ESD

Clamping Voltage

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ESD7424

TYPICAL CHARACTERISTICS

1.E−02

1.E−03

1.E−04

1.E−05

1.E−06

1.E−07

1.E−08

1.E−09

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

1.E−10

1.E−11

f = 1 MHz

−40

−30

−20

−10

−24 −20 −16 −12 −8 −4

12 16 20 24

VOLTAGE (V)

Figure 3. Typical IV Characteristics

Figure 4. Typical CV Characteristics

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

−1

−2

−3

−4

−5

−6

−7

−8

0.1

−9

−10

1.E+07

= 0 V

1.E+08

1.E+09

1.E+10

0.E+00

1.E+09

2.E+09

3.E+09

FREQUENCY (Hz)

Figure 5. Typical Insertion Loss

ESD7424MUT5G

Figure 6. Typical Capacitance over Frequency

ESD7424MUT5G

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ESD7424

IEC61000−4−2 Waveform

IEC 61000−4−2 Spec.

peak

First Peak

Current

(A)

100%

90%

Test Volt-

age (kV)

Current at

30 ns (A)

Current at

60 ns (A)

Level

7.5

I @ 30 ns

22.5

I @ 60 ns

10%

= 0.7 ns to 1 ns

Figure 7. IEC61000−4−2 Spec

Oscilloscope

ESD Gun

TVS

50 W

Cable

50 W

Figure 8. Diagram of ESD Clamping Voltage Test Setup

The following is taken from Application Note

AND8308/D − Interpretation of Datasheet Parameters

for ESD Devices.

systems such as cell phones or laptop computers it is not

clearly defined in the spec how to specify a clamping voltage

at the device level. ON Semiconductor has developed a way

to examine the entire voltage waveform across the ESD

protection diode over the time domain of an ESD pulse in the

form of an oscilloscope screenshot, which can be found on

the datasheets for all ESD protection diodes. For more

information on how ON Semiconductor creates these

screenshots and how to interpret them please refer to

AND8307/D.

ESD Voltage Clamping

For sensitive circuit elements it is important to limit the

voltage that an IC will be exposed to during an ESD event

to as low a voltage as possible. The ESD clamping voltage

is the voltage drop across the ESD protection diode during

an ESD event per the IEC61000−4−2 waveform. Since the

IEC61000−4−2 was written as a pass/fail spec for larger

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ESD7424

−20

−18

−16

−14

−12

−10

−8

−6

−4

−2

10 15

20 25

30 35

40 45 50

10 15

20 25

30 35

40 45

VC, VOLTAGE (V)

Figure 9. Positive TLP I−V Curve

Figure 10. Negative TLP I−V Curve

NOTE: TLP parameter: Z = 50 W, t = 100 ns, t = 300 ps, averaging window: t = 30 ns to t = 60 ns. V is the equivalent voltage

IEC

stress level calculated at the secondary peak of the IEC 61000−4−2 waveform at t = 30 ns with 2 A/kV. See TLP description

below for more information.

50 W Coax

Cable

Transmission Line Pulse (TLP) Measurement

Attenuator

Transmission Line Pulse (TLP) provides current versus

voltage (I−V) curves in which each data point is obtained

from a 100 ns long rectangular pulse from a charged

transmission line. A simplified schematic of a typical TLP

system is shown in Figure 11. TLP I−V curves of ESD

protection devices accurately demonstrate the product’s

ESD capability because the 10s of amps current levels and

under 100 ns time scale match those of an ESD event. This

is illustrated in Figure 12 where an 8 kV IEC 61000−4−2

current waveform is compared with TLP current pulses at

8 A and 16 A. A TLP I−V curve shows the voltage at which

the device turns on as well as how well the device clamps

voltage over a range of current levels.

50 W Coax

Cable

10 MW

DUT

Oscilloscope

Figure 11. Simplified Schematic of a Typical TLP

System

Figure 12. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms

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MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

UDFN2 1.6x1.0, 1.1P

CASE 517CZ

ISSUE D

SCALE 4:1

DATE 02 JUL 2020

GENERIC

MARKING DIAGRAM*

XXM

= Specific Device Code

= Date Code

*This information is generic. Please refer

to device data sheet for actual part

marking. Pb−Free indicator, “G”, may

or not be present. Some products may

not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DOCUMENT NUMBER:

DESCRIPTION:

98AON88716F

UDFN2 1.6x1.0, 1.1P

PAGE 1 OF 1

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

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TECHNICAL PUBLICATIONS:

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For additional information, please contact your local Sales Representative at

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

ESD7424MUT5G [ONSEMI]

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