EVAL-ADT7483EB [ONSEMI]

Dual Channel Temperature Sensor and Over Temperature Alarm; 双通道温度传感器和超温报警
EVAL-ADT7483EB
型号: EVAL-ADT7483EB
厂家: ONSEMI    ONSEMI
描述:

Dual Channel Temperature Sensor and Over Temperature Alarm
双通道温度传感器和超温报警

传感器 温度传感器
文件: 总24页 (文件大小:316K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Dual Channel Temperature Sensor  
and Over Temperature Alarm  
ADT7483A  
FEATURES  
GENERAL DESCRIPTION  
1 local and 2 remote temperature sensors  
0.25°C resolution/1°C accuracy on remote channels  
1°C resolution/1°C accuracy on local channel  
Extended, switchable temperature measurement range  
0°C to 127°C (default) or –64°C to +191°C  
2-wire SMBus serial interface with SMBus alert support  
Programmable over/under temperature limits  
Offset registers for system calibration  
The ADT7483A1 is a three-channel digital thermometer and  
under/over temperature alarm, intended for use in PCs and  
thermal management systems. It can measure the temperature  
in two remote locations, for example, the remote thermal diode  
in a CPU or GPU, or a discrete diode connected transistor. It can  
also measure its own ambient temperature. The temperature of the  
remote thermal diode and ambient temperature can be accurately  
measured to 1°C. The temperature measurement range defaults to  
0°C to 127°C, compatible with ADM1032, but can be switched  
to a wider measurement range, from −64°C to +191°C.  
Up to 2 overtemperature fail-safe  
Small 16-lead QSOP package  
outputs  
THERM  
240 μA operating current, 5 μA standby current  
The ADT7483A communicates over a 2-wire serial interface  
compatible with system management bus (SMBus) standards.  
The SMBus address is set by the ADD0 and ADD1 pins. As  
many as nine different SMBus addresses are possible.  
APPLICATIONS  
Desktop and notebook computers  
Industrial controllers  
Smart batteries  
An ALERT output signals when the on-chip or remote  
temperature is outside the programmed limits. The THERM  
output is a comparator output that allows, for example, on/off  
control of a cooling fan. The ALERT output can be reconfigured  
as a second THERM output, if required.  
Automotive  
Embedded systems  
Burn-in applications  
Instrumentation  
FUNCTIONAL BLOCK DIAGRAM  
ADDRESS POINTER  
REGISTER  
ONE-SHOT  
REGISTER  
CONVERSION RATE  
LOCAL TEMPERATURE  
THERM LIMIT REGISTER  
ON-CHIP TEMP  
SENSOR  
REGISTER  
LOCAL TEMPERATURE  
VALUE REGISTER  
LOCAL TEMPERATURE  
LOW LIMIT REGISTER  
3
4
D1+  
D1–  
LOCAL TEMPERATURE  
HIGH LIMIT REGISTER  
ANALOG  
MUX  
11-BIT A-TO-D  
CONVERTER  
D2+ 12  
REMOTE 1 AND 2 TEMP  
THERM LIMIT REGISTER  
BUSY RUN/STANDBY  
11  
D2–  
REMOTE 1 AND 2 TEMP  
VALUE REGISTERS  
REMOTE 1 AND 2 TEMP  
LOW LIMIT REGISTERS  
REMOTE 1 AND 2 TEMP  
HIGH LIMIT REGISTERS  
REMOTE 1 AND 2 TEMP  
OFFSET REGISTERS  
CONFIGURATION  
REGISTERS  
EXTERNAL DIODES OPEN-CIRCUIT  
INTERRUPT  
MASKING  
13  
ALERT/THERM2  
STATUS REGISTERS  
SMBus INTERFACE  
ADT7483A  
2
6
14  
15  
5
16  
1
V
GND  
SDATA SCLK  
ADD0 ADD1  
DD  
THERM  
Figure 1.  
1 Protected by U.S. Patents 5,195,827, 5,867,012, 5,982,221, 6,097,239, 6,133,753, 6,169,442, other patents pending.  
©2008 SCILLC. All rights reserved.  
February 2008 – Rev. 1  
Publication Order Number:  
ADT7483A/D  
ADT7483A  
TABLE OF CONTENTS  
Features...............................................................................................1  
Registers .......................................................................................11  
Serial Bus Interface .....................................................................17  
Addressing the Device................................................................17  
Applications .......................................................................................1  
General Description..........................................................................1  
Functional Block Diagram...............................................................1  
Revision History................................................................................2  
Specifications .....................................................................................2  
SMBus Timing Specifications......................................................4  
Absolute Maximum Ratings ............................................................5  
Thermal Characteristics...............................................................5  
ESD Caution ..................................................................................5  
Pin Configuration and Function Descriptions .............................6  
Typical Performance Characteristics..............................................7  
Theory of Operation.........................................................................9  
Temperature Measurement Method...........................................9  
Temperature Measurement Results ..........................................10  
Temperature Measurement Range............................................10  
Temperature Data Format..........................................................10  
ALERT  
Output ............................................................................19  
Masking the ALERT Output .....................................................19  
Low Power Standby Mode.........................................................19  
Sensor Fault Detection...............................................................20  
Interrupt System..........................................................................20  
Applications .....................................................................................22  
Noise Filtering .............................................................................22  
Factors Affecting Diode Accuracy ...........................................22  
Thermal Inertia and Self-Heating ............................................22  
Layout Considerations ...............................................................23  
Application Circuit .....................................................................23  
Outline Dimensions........................................................................24  
Ordering Guide...........................................................................24  
REVISION HISTORY  
02/08—Rev 1: Conversion to ON Semiconductor  
07/05—Revision 0: Initial Version  
Rev. 1 | Page 2 of 24 | www.onsemi.com  
ADT7483A  
SPECIFICATIONS  
TA = −40°C to +125°C, VDD = 3 V to 3.6 V, unless otherwise noted.  
Table 1.  
Parameter  
Min Typ Max Unit Test Conditions  
POWER SUPPLY  
Supply Voltage, VDD  
Average Operating Supply Current, IDD  
3.0  
3.30 3.6  
240 350  
V
μA  
μA  
V
0.0625 conversions/sec rate1  
Standby mode  
VDD input, disables ADC, rising edge  
5
2.55  
30  
2.5  
1
Undervoltage Lockout Threshold  
Power-On-Reset Threshold  
TEMPERATURE-TO-DIGITAL CONVERTER2  
1
V
Local Sensor Accuracy  
°C  
0°C ≤ TA ≤ 70°C  
0°C ≤ TA ≤ 85°C  
−40 ≤ TA ≤ 100°C  
1.5 °C  
2.5 °C  
°C  
Resolution  
Remote Diode Sensor Accuracy  
1
3
1
°C  
0°C ≤ TA ≤ 70°C, −55°C ≤ TD ≤ 150°C  
1.5 °C  
2.5 °C  
°C  
0°C ≤ TA ≤ 85°C, −55°C ≤ TD3 ≤ 150°C  
−40 ≤ TA ≤ 100°C, −55°C ≤ TD3 ≤ +150°C  
Resolution  
Remote Sensor Source Current3  
0.25  
233  
14  
μA  
μA  
High level  
Low level  
Conversion Time  
73  
94  
ms  
From stop bit to conversion complete (all channels),  
one-shot mode with averaging switched on  
11  
14  
ms  
One-shot mode with averaging off,  
(conversion rate = 16, 32, or 64 conversions/sec)  
OPEN-DRAIN DIGITAL OUTPUTS (  
,
/
)
THERM ALERT THERM2  
Output Low Voltage, VOL  
High Level Output Leakage Current, IOH  
SMBus INTERFACE3, 4  
Logic Input High Voltage, VIH, SCLK, SDATA  
Logic Input Low Voltage, VIL, SCLK, SDATA  
Hysteresis  
SDA Output Low Voltage, VOL  
Logic Input Current, IIH, IIL  
0.4  
1
V
μA  
IOUT = −6.0 mA  
VOUT = VDD  
0.1  
500  
2.1  
−1  
V
V
mV  
V
μA  
pF  
kHz  
ms  
μs  
0.8  
0.4  
+1  
IOUT = −6.0 mA  
SMBus Input Capacitance, SCLK, SDATA  
SMBus Clock Frequency  
SMBus Timeout5  
5
400  
32  
1
25  
User programmable  
Master clocking in data  
SCLK Falling Edge to SDATA Valid Time  
1 See Table 11 for information on other conversion rates.  
2 Temperature accuracy guaranteed with averaging enabled.  
3 Guaranteed by design, but not production tested.  
4 See the SMBus Timing Specifications section for more information.  
5 Disabled by default. Instructions to enable it are in the Serial Bus Interface section.  
Rev. 1 | Page 3 of 24 | www.onsemi.com  
ADT7483A  
SMBUS TIMING SPECIFICATIONS  
Table 2.  
Parameter1  
Limit at TMIN, TMAX  
Unit  
Description  
fSCLK  
tLOW  
tHIGH  
tR  
tF  
tSU; STA  
tHD; STA  
tSU; DAT  
tSU; STO  
tBUF  
400  
4.7  
4
kHz max  
μs min  
μs min  
μs max  
ns max  
μs min  
μs min  
ns min  
μs min  
μs min  
Clock low period, between 10% points  
Clock high period, between 90% points  
Clock/data rise time  
Clock/data fall time  
Start condition setup time  
Start condition hold time  
Data setup time  
Stop condition setup time  
Bus free time between stop and start conditions  
1
300  
4.7  
4
250  
4
2
3
4
4.7  
1 Guaranteed by design, but not production tested.  
2 Time from 10% of SDATA to 90% of SCLK.  
3 Time for 10% or 90% of SDATA to 10% of SCLK.  
4 Time for 90% of SCLK to 10% of SDATA.  
tR  
tF  
tHD;STA  
tLOW  
SCLK  
tHIGH  
tHD;STA  
tSU;STA  
tSU;STO  
tHD;DAT  
tSU;DAT  
SDATA  
tBUF  
STOP START  
START  
STOP  
Figure 2. Serial Bus Timing  
Rev. 1 | Page 4 of 24 | www.onsemi.com  
ADT7483A  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Parameter  
Rating  
Positive Supply Voltage (VDD) to GND  
−0.3 V, +3.6 V  
D+  
D− to GND  
SCLK, SDATA,  
−0.3 V to VDD + 0.3 V  
−0.3 V to +0.6 V  
−0.3 V to +3.6 V  
−1 mA, +50 mA  
,
ALERT THERM  
Input Current, SDATA,  
Input Current, D−  
THERM  
1 mA  
THERMAL CHARACTERISTICS  
16-lead QSOP package:  
ESD Rating, All Pins (Human Body Model)  
1,500 V  
150°C  
Maximum Junction Temperature (TJ MAX  
)
θ
θ
JA = 150°C/W  
JC = 38.8°C/W  
Storage Temperature Range  
IR Reflow Peak Temperature  
−65°C to +150°C  
220°C  
IR Reflow Peak Temperature Pb-Free  
Lead Temperature (Soldering 10 sec)  
260°C  
300°C  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on  
the human body and test equipment and can discharge without detection. Although this product features  
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy  
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance  
degradation or loss of functionality.  
Rev. 1 | Page 5 of 24 | www.onsemi.com  
ADT7483A  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
ADD1  
ADD0  
SCLK  
SDATA  
V
DD  
ADT7483A  
TOP VIEW  
(Not to Scale)  
D1+  
D1–  
ALERT/THERM2  
D2+  
THERM  
GND  
D2–  
NC  
NC  
NC  
NC  
NC = NO CONNECT  
Figure 3.16-Lead QSOP Pin Configuration  
Table 4. Pin Function Descriptions  
Pin No.  
Mnemonic  
ADD1  
VDD  
D1+  
D1−  
Description  
1
2
3
4
5
Address 1 Pin. Tri-state input to set the SMBus address.  
Positive Supply, 3 V to 3.6 V.  
Positive Connection. Connects to the first remote temperature sensor.  
Negative Connection. Connects to the first remote temperature sensor.  
Open-Drain Output. Turns a fan on/off, or throttles a CPU clock in the event of an overtemperature  
condition.  
THERM  
6
7
GND  
NC  
Supply Ground Connection.  
No Connect.  
8
NC  
No Connect.  
9
NC  
No Connect.  
10  
11  
12  
13  
NC  
D2−  
D2+  
No Connect.  
Negative Connection. Connects to the second remote temperature sensor.  
Positive Connection. Connects to the second remote temperature sensor.  
Open-Drain Logic Output. Used as interrupt or SMBus alert. This may also be configured as a second  
output. Requires a pull-up resistor.  
ALERT THERM2  
/
THERM  
14  
15  
16  
SDATA  
SCLK  
ADD0  
Logic Input/Output, SMBus Serial Data. Open-drain output. Requires a pull-up resistor.  
Logic Input, SMBus Serial Clock. Requires a pull-up resistor.  
Address 0 Pin. Tri-state input to set the SMBus address.  
Rev. 1 | Page 6 of 24 | www.onsemi.com  
ADT7483A  
TYPICAL PERFORMANCE CHARACTERISTICS  
3.5  
10  
5
DEV 1  
DEV 2  
DEV 3  
DEV 4  
DEV 5  
DEV 6  
DEV 7  
DEV 8  
DEV 9  
DEV 10  
DEV 11  
DEV 12  
DEV 13  
DEV 14  
DEV 15  
DEV 16  
MEAN  
HIGH 4Σ  
LOW 4Σ  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
D+ TO GND  
0
–5  
D+ TO V  
CC  
–10  
–15  
–20  
–25  
–0.5  
–1.0  
–50  
0
50  
100  
150  
1
10  
LEAKAGE RESISTANCE (MΩ)  
100  
TEMPERATURE (°C)  
Figure 4. Local Temperature Error vs. Temperature  
Figure 7. Temperature Error vs. D+/D− Leakage Resistance  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0
–2  
–4  
–6  
–8  
DEV 1  
DEV 2  
DEV 3  
DEV 4  
DEV 5  
DEV 6  
DEV 7  
DEV 8  
DEV 9  
DEV 15  
DEV 16  
HIGH 4Σ  
LOW 4Σ  
DEV 10  
DEV 11  
DEV 12  
DEV 13  
DEV 14  
–10  
DEV 3  
–12  
–14  
–16  
–18  
DEV 2  
DEV 4  
–0.5  
–1.0  
–50  
0
50  
100  
150  
0
5
10  
15  
20  
25  
TEMPERATURE (°C)  
CAPACITANCE (nF)  
Figure 5. Remote 1 Temperature Error vs. Temperature  
Figure 8. Temperature Error vs. D+/D− Capacitance  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
DEV 8  
DEV 9  
DEV 15  
DEV 16  
MEAN  
HIGH 4Σ  
LOW 4Σ  
DEV 1  
DEV 2  
DEV 3  
DEV 4  
DEV 5  
DEV 6  
DEV 7  
DEV 2BC  
DEV 10  
DEV 11  
DEV 12  
DEV 13  
DEV 14  
DEV 4BC  
DEV 3BC  
–0.5  
–1.0  
–50  
0
50  
100  
150  
0.01  
0.1  
1
10  
100  
TEMPERATURE (°C)  
CONVERTION RATE (Hz)  
Figure 6. Remote 2 Temperature Error vs. Temperature  
Figure 9. Operating Supply Current vs. Conversion Rate  
Rev. 1 | Page 7 of 24 | www.onsemi.com  
ADT7483A  
422  
420  
418  
416  
414  
412  
410  
25  
20  
15  
10  
5
DEV 2BC  
100mV  
DEV 3BC  
DEV 4BC  
50mV  
20mV  
408  
3.0  
0
3.1  
3.2  
3.3  
(V)  
3.4  
3.5  
3.6  
0
100  
200  
300  
400  
500  
600  
NOISE FREQUENCY (MHz)  
V
DD  
Figure 10. Operating Supply Current vs. Voltage  
Figure 13. Temperature Error vs. Common-Mode Noise Frequency  
4.4  
4.2  
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
80  
70  
DEV 2  
60  
100mV  
50  
40  
30  
DEV 3  
DEV 4  
50mV  
20  
10  
20mV  
0
–10  
3.0  
3.1  
3.2  
3.3  
(V)  
3.4  
3.5  
3.6  
0
100  
200  
300  
400  
500  
600  
V
NOISE FREQUENCY (MHz)  
DD  
Figure 11. Standby Supply Current vs. Voltage  
Figure 14. Temperature Error vs. Differential Mode Noise Frequency  
35  
30  
25  
20  
15  
10  
5
DEV 2BC  
DEV 3BC  
DEV 4BC  
0
1
10  
100  
1000  
FSCL (kHz)  
Figure 12. Standby Supply Current vs. SCLK Frequency  
Rev. 1 | Page 8 of 24 | www.onsemi.com  
ADT7483A  
THEORY OF OPERATION  
The ADT7483A is a local and 2x remote temperature sensor  
and over/under temperature alarm. When the ADT7483A is  
operating normally, the on-board ADC operates in a free-  
running mode. The analog input multiplexer alternately selects  
either the on-chip temperature sensor or one of the remote  
temperature sensors to measure its local temperature. The ADC  
digitizes these signals, and the results are stored in the local,  
Remote 1, and Remote 2 temperature value registers.  
emitter voltage (VBE) of a transistor, operated at constant  
current. Unfortunately, this technique requires calibration to  
null the effect of the absolute value of VBE, which varies from  
device to device. The technique used in the ADT7483A is to  
measure the change in VBE when the device is operated at two  
different currents.  
Figure 15 shows the input signal conditioning used to measure  
the output of a remote temperature sensor. This figure shows  
the remote sensor as a substrate transistor, but it could equally  
be a discrete transistor. If a discrete transistor is used, the  
collector is not grounded and should be linked to the base. To  
prevent ground noise interfering with the measurement, the  
more negative terminal of the sensor is not referenced to ground  
but is biased above ground by an internal diode at the D− input.  
C1 can be optionally added as a noise filter (recommended  
maximum value 1,000 pF).  
The local and remote measurement results are compared with  
the corresponding high, low, and THERM temperature limits  
stored in on-chip registers. Out-of-limit comparisons generate  
flags that are stored in the status register. A result that exceeds  
the high temperature limit, the low temperature limit, or a  
remote diode open circuit causes the ALERT output to assert  
low. Likewise, exceeding THERM temperature limits causes the  
THERM output to assert low. The ALERT output can be  
reprogrammed as a second THERM output.  
To measure ΔVBE, the operating current through the sensor is  
switched among two related currents, I and N × I. The currents  
through the temperature diode are switched between I and N × I,  
giving ΔVBE. The temperature is then calculated using the ΔVBE  
measurement.  
The limit registers can be programmed, and the device  
controlled and configured, via the serial SMBus. The contents  
of any register can also be read back via the SMBus.  
Control and configuration functions consist of:  
The resulting ΔVBE waveforms pass through a 65 kHz low-pass  
filter to remove noise and then to a chopper-stabilized  
amplifier. This amplifies and rectifies the waveform to produce  
a dc voltage proportional to ΔVBE. The ADC digitizes this  
voltage and produces a temperature measurement. To reduce  
the effects of noise, digital filtering is performed by averaging  
the results of 16 measurement cycles for low conversion rates.  
At rates of 16, 32, and 64 conversions/second, no digital  
averaging takes place.  
Switching the device between normal operation and  
standby mode.  
Selecting the temperature measurement scale.  
Masking or enabling the ALERT output.  
Switching Pin 13 between ALERT and THERM2.  
Selecting the conversion rate.  
TEMPERATURE MEASUREMENT METHOD  
A simple method of measuring temperature is to exploit the  
negative temperature coefficient of a diode, measuring the base-  
Signal conditioning and measurement of the local temperature  
sensor is performed in the same manner.  
V
DD  
I
BIAS  
I
N × I  
V
OUT+  
D+  
1
TO ADC  
C1  
REMOTE  
SENSING  
TRANSISTOR  
LPF  
fC = 65kHz  
D–  
V
OUT–  
BIAS  
DIODE  
1
CAPACITOR C1 IS OPTIONAL. IT IS ONLY NECESSARY IN NOISY ENVIRONMENTS. C1 = 1000pF MAX.  
Figure 15. Input Signal Conditioning  
Rev. 1 | Page 9 of 24 | www.onsemi.com  
ADT7483A  
When reading the full remote temperature value, both the high  
and low byte, the two registers should be read LSB first and then  
the MSB. This is because reading the LSB will cause the MSB to  
be locked until it is read, guaranteeing that the two values read  
are a result of the same temperature measurement.  
TEMPERATURE MEASUREMENT RESULTS  
The results of the local and remote temperature measurements  
are stored in the local and remote temperature value registers  
and are compared with limits programmed into the local and  
remote high and low limit registers.  
TEMPERATURE MEASUREMENT RANGE  
The local temperature measurement is an 8-bit measurement  
with 1°C resolution. The remote temperature measurements are  
10-bit measurements, with eight MSBs stored in one register  
and two LSBs stored in another register. Table 5 lists the  
temperature measurement registers.  
The temperature measurement range for both local and remote  
measurements is, by default, 0°C to 127°C. However, the  
ADT7483A can be operated using an extended temperature  
range from −64°C to +191°C. This means, the ADT7483A can  
measure the full temperature range of a remote thermal diode,  
from −55°C to +150°C. The user can switch between these two  
temperature ranges by setting or clearing Bit 2 in the Configura-  
tion 1 register. A valid result is available in the next measurement  
cycle after changing the temperature range.  
Table 5. Register Address for the Temperature Values  
Temperature  
Channel  
MSB Register  
Address  
LSB Register  
Address  
Local  
Remote 1  
Remote 2  
0x00  
0x01  
0x30  
N/A  
0x10 (2 MSBs)  
0x33 (2 MSBs)  
In extended temperature mode, the upper and lower temperatures  
that can be measured by the ADT7483A are limited by the remote  
diode selection. The temperature registers themselves can have  
values from −64°C to +191°C. However, most temperature sensing  
diodes have a maximum temperature range of −55°C to +150°C.  
By setting Bit 3 of the Configuration 1 Register to 1, the  
Remote 2 temperature values can be read from the following  
register addresses:  
Remote 2, MSBs = 0x01  
Remote 2, LSBs = 0x10  
Note that although both local and remote temperature measure-  
ments can be made while the part is in extended temperature  
mode, the ADT7483A should not be exposed to temperatures  
greater than those specified in theAbsolute Maximum Ratings  
section. Further, the device is only guaranteed to operate as  
specified at ambient temperatures from −40°C to +120°C.  
The above is true only when Bit 3 of the Configuration 1  
register is set. To read the Remote 1 temperatures, this bit needs  
to be switched back to 0.  
Only the two MSBs in the remote temperature low byte are  
used. This gives the remote temperature measurement a  
resolution of 0.25°C. Table 6 shows the data format for the  
remote temperature low byte.  
TEMPERATURE DATA FORMAT  
The ADT7483A has two temperature data formats. When the  
temperature measurement range is from 0°C to 127°C (default),  
the temperature data format for both local and remote temperature  
results is binary. When the measurement range is in extended  
mode, an offset binary data format is used for both local and  
remote results. Temperature values in the offset binary data  
format are offset by +64. Examples of temperatures in both data  
formats are shown in Table 7.  
Table 6. Extended Temperature Resolution  
(Remote Temperature Low Byte)  
Extended Resolution  
Remote Temperature Low Byte  
0.00°C  
0.25°C  
0.50°C  
0.75°C  
0 000 0000  
0 100 0000  
1 000 0000  
1 100 0000  
Rev. 1 | Page 10 of 24 | www.onsemi.com  
ADT7483A  
Table 7. Temperature Data Format (Local and Remote Temperature High Byte)  
Temperature  
Binary  
Offset Binary1  
0 000 1001  
0 100 0000  
0 100 0001  
0 100 1010  
0 101 1001  
0 111 0010  
1 000 1011  
1 010 0100  
1 011 1101  
1 011 1111  
1 101 0110  
–55°C  
0°C  
+1°C  
+10°C  
0 000 00002  
0 000 0000  
0 000 0001  
0 000 1010  
0 001 1001  
0 011 0010  
0 100 1011  
0 110 0100  
0 111 1101  
0 111 1111  
0 111 11113  
+25°C  
+50°C  
+75°C  
+100°C  
+125°C  
+127°C  
+150°C  
1 Offset binary scale temperature values are offset by +64.  
2 Binary scale temperature measurement returns 0 for all temperatures <0°C.  
3 Binary scale temperature measurement returns 127 for all temperatures >127°C.  
The user may switch between measurement ranges at any time.  
Switching the range also switches the data format. The next  
temperature result following the switching is reported back to  
the register in the new format. However, the contents of the  
limit registers do not change. It is up to the user to ensure that  
when the data format changes, the limit registers are  
reprogrammed as necessary (for more information, see the  
Limit Registers section).  
power-on without first writing to the address pointer, the value  
of the local temperature will be returned, since its register  
address is 0x00.  
Temperature Value Registers  
The ADT7483A has five registers to store the results of local  
and remote temperature measurements. These registers can  
only be written to by the ADC and can be read by the user over  
the SMBus.  
REGISTERS  
The local temperature value register is at Address 0x00.  
The registers in the ADT7483A are eight bits wide. These  
registers are used to store the results of remote and local  
temperature measurements, and high and low temperature  
limits, and to configure and control the device. A description of  
these registers is provided in this section.  
The Remote 1 temperature value high byte register is  
at Address 0x01, with the Remote 1 low byte register at  
Address 0x10.  
The Remote 2 temperature value high byte register is  
at Address 0x30, with the Remote 2 low byte register  
at Address 0x33.  
Address Pointer Register  
The address pointer register does not have, nor does it require,  
an address because the first byte of every write operation is  
automatically written to this register. The data in this first byte  
always contains the address of another register on the ADT7483A,  
which is stored in the address pointer register. It is to this other  
register address that the second byte of a write operation is  
written, or to which a subsequent read operation is performed.  
The Remote 2 temperature values can be read from  
Address 0x01 for the high byte and Address 0x10 for  
the low byte if Bit 3 of Configuration Register 1 is set to 1.  
To read the Remote 1 temperature values, Bit 3 of  
Configuration Register 1 should be set to 0.  
The power-on default value of the address pointer register is  
0x00, so if a read operation is performed immediately after  
The power-on default for all five registers is 0x00.  
Rev. 1 | Page 11 of 24 | www.onsemi.com  
ADT7483A  
Configuration 1 Register  
Table 8. Configuration 1 Register (Read Address = 0x03, Write Address = 0x09)  
Bit Mnemonic  
Function  
7
Mask  
Setting this bit to 1 masks all  
s on the  
ALERT  
pin. Default = 0 =  
enabled. This applies only if Pin 13  
ALERT  
ALERT  
is configured as  
, otherwise it has no effect.  
ALERT  
6
Mon/STBY  
Setting this bit to 1 places the ADT7483A in standby mode, that is, suspends all temperature measurements  
ALERT  
(ADC). The SMBus remains active and values can be written to, and read from, the registers.  
and  
THERM  
are also active in standby mode. Changes made to the limit registers in standby mode that affect the  
or  
THERM  
outputs will cause these signals to be updated. Default = 0 = temperature monitoring enabled.  
ALERT  
This bit selects the function of Pin 13. Default = 0 =  
5
AL/TH  
. Setting this bit to 1 configures Pin 13 as the  
ALERT  
pin.  
THERM2  
4
3
Reserved  
Reserved for future use.  
Remote 1/Remote 2 Setting this bit to 1 enables the user to read the Remote 2 values from the Remote 1 registers.  
Default = 0 = Remote 1 temperature values and limits are read from these registers. This bit is not lockable.  
2
1
0
Temp Range  
Mask R1  
Setting this bit to 1 enables the extended temperature measurement range (−50°C to +150°C).  
Default = 0 = 0°C to +127°C.  
Setting this bit to 1 masks  
Default = 0.  
s due to the Remote 1 temperature exceeding a programmed limit.  
ALERT  
Mask R2  
Setting this bit to 1 masks  
Default = 0.  
s due to the Remote 2 temperature exceeding a programmed limit.  
ALERT  
Configuration 2 Register  
Table 9. Configuration 2 Register (Address = 0x24)  
Bit  
Mnemonic  
Function  
7
Lock Bit  
Setting this bit to 1 locks all lockable registers to their current values. This prevents settings being  
tampered with until the device is powered down. Default = 0.  
<6:0>  
Reserved  
Reserved for future use.  
This register can be written to and read back over the SMBus.  
The default value of this register is 0x07, giving a rate of  
8 conversions/second.  
Conversion Rate/Channel Selector Register  
The conversion rate/channel selector register is at Address 0x04  
for reads, and Address 0x0A for writes. The four LSBs of this  
register are used to program the conversion times from 15.5 ms  
(Code 0x0A) to 16 seconds (Code 0x00). To program the  
ADT7483A to perform continuous measurements, set the  
conversion rate register to 0x0B. For example, a conversion rate  
of 8 conversions/second means that beginning at 125 ms  
intervals, the device performs a conversion on the local and the  
remote temperature channels.  
Bit 7 in this register can be used to disable averaging of the  
temperature measurements. The ADT7483A can be configured  
to take temperature measurements of either a single temperature  
channel or all temperature channels. Bit 5 and Bit 4 can be used  
to specify which temperature channel or channels are  
measured.  
Rev. 1 | Page 12 of 24 | www.onsemi.com  
ADT7483A  
Table 10. Conversion Rate/Channel Selector Register  
Bit  
Mnemonic  
Function  
7
Averaging  
Setting this bit to 1 disables averaging of the temperature measurements at the slower conversion rates  
(averaging cannot take place at the three faster rates, hence, setting this bit has no effect).  
Default = 0 = averaging enabled.  
6
Reserved  
Reserved for future use. Do not write to this bit.  
<5:4> Channel  
Selector  
These bits are used to select the temperature measurement channels.  
00 = round robin = default = all channels.  
01 = local temperature.  
10 = Remote 1 temperature.  
11 = Remote 2 temperature.  
<3:0> Conversion  
Rates  
These bits set how often the ADT7483A measures each temperature channel.  
Conversions/second  
0000 = 0.0625  
0001 = 0.125  
0010 = 0.25  
Time (seconds)  
16  
8
4
0011 = 0.5  
2
0100 = 1  
1
0101 = 2  
0110 = 4  
0111 = 8 = default  
1000 = 16  
1001 = 32  
500 m  
250 m  
125 m  
62.5 m  
31.25 m  
1010 = continuous measurements  
Limit Registers  
exceeding either the local limit or remote high limit asserts  
THERM2 low. A default hysteresis value of 10°C is provided  
that applies to both THERM channels. This hysteresis value may  
be reprogrammed to any value after power-up using Register  
Address 0x21.  
The ADT7483A has three limits for each temperature channel:  
high, low, and THERM temperature limits for local, Remote 1,  
and Remote 2 temperature measurements. The remote temperature  
high and low limits span two registers each to contain an upper  
and lower byte for each limit. There is also a THERM hysteresis  
register. All limit registers can be written to and read back over  
the SMBus. See Table 8 for details of the limit registers’ addresses  
and their power-on default values.  
It is important to remember that the data format for temperature  
limits is the same as the temperature measurement data format.  
Thus, if the temperature measurement uses the default (binary),  
then the temperature limits also use the binary scale. If the  
temperature measurement scale is switched, however, the  
temperature limits do not automatically switch. The user must  
reprogram the limit registers to the desired value in the correct  
data format. For example, if the remote low limit is set at 10°C  
and the default binary scale is being used, the limit register  
value should be 0000 1010b. If the scale is switched to offset  
binary, the value in the low temperature limit register should be  
reprogrammed to be 0100 1010b.  
When Pin 13 is configured as an ALERT output, the high limit  
registers perform a > comparison while the low limit registers  
perform a ≤ comparison. For example, if the high limit register  
is programmed with 80°C, then measuring 81°C will result in  
an out-of-limit condition, setting a flag in the status register. If  
the low limit register is programmed with 0°C, measuring 0°C  
or lower will result in an out-of-limit condition.  
Exceeding either the local or remote THERM limit asserts  
THERM low. When Pin 13 is configured as THERM2,  
Rev. 1 | Page 13 of 24 | www.onsemi.com  
ADT7483A  
The ALERT interrupt latch is not reset by reading the status  
register. It is reset when the ALERT output has been serviced by  
the master reading the device address, provided the error  
condition has gone away and the status register flag bits have  
been reset.  
Status Registers  
The status registers are read-only registers, at Address 0x02  
(Status Register 1) and Address 0x23 (Status Register 2). They  
contain status information for the ADT7483A.  
Table 11. Status Register 1 Bit Assignments  
When Flag 1 and/or Flag 0 of Status Register 1, or Flag 1 of  
Status Register 2 are set, the THERM output goes low to  
indicate that the temperature measurements are outside the  
programmed limits. The THERM output does not need to be  
reset, unlike the ALERT output. Once the measurements are  
within the limits, the corresponding status register bits are  
automatically reset and the THERM output goes high. The user  
may add hysteresis by programming Register 0x21. The  
THERM output will be reset only when the temperature falls  
Bit Mnemonic Function  
ALERT  
7
6
BUSY  
Bit set to 1 when ADC converting  
Bit set to 1 when local high  
temperature limit tripped  
Bit set to 1 when local low  
temperature limit tripped  
Bit set to 1 when remote 1 high  
temperature limit tripped  
Bit set to 1 when remote 1 low  
temperature limit tripped  
Bit set to 1 when remote 1 sensor  
open circuit  
No  
Yes  
LHIGH1  
5
4
3
2
1
0
LLOW1  
Yes  
Yes  
Yes  
Yes  
No  
No  
R1HIGH1  
R1LOW1  
D1 OPEN1  
R1THRM1  
LTHRM1  
below the  
THERM  
limit minus hysteresis.  
When Pin 13 is configured as THERM2, only the high  
temperature limits are relevant. If Flag 6, Flag 4 of Status  
Register 1, or Flag 4 of Status Register 2 are set, the THERM2  
output goes low to indicate that the temperature measurements  
are outside the programmed limits. Flag 5 and Flag 3 of Status  
Register 1, and Flag 3 of Status Register 2 have no effect on  
THERM2. The behavior of THERM2 is otherwise the same as  
THERM.  
THERM  
Bit set to 1 when remote1  
limit tripped  
THERM  
Bit set to 1 when local  
tripped  
limit  
1 These flags stay high until the status register is read, or they are reset by POR.  
Table 12. Status Register 2 Bit Assignments  
Bit Mnemonic Function  
ALERT  
No  
No  
No  
Yes  
7
6
5
4
Res  
Res  
Res  
R2HIGH1  
Reserved for future use  
Reserved for future use  
Reserved for future use  
Bit set to 1 when Remote 2 high  
temperature limit tripped  
Bit 0 of Status Register 2 is set whenever the ALERT output of  
the ADT7483A is asserted low. This means that the user need  
only read Status Register 2 to determine if the ADT7483A is  
responsible for the ALERT. Bit 0 of Status Register 2 is reset  
when the ALERT output is reset. If the ALERT output is  
masked, then this bit is not set.  
3
2
1
0
R2LOW1  
D2 OPEN1  
R2THRM1  
ALERT  
Bit set to 1 when Remote 2 low  
temperature limit tripped  
Bit set to 1 when Remote 2 sensor  
open circuit  
Yes  
Yes  
Offset Register  
THERM No  
Bit set to 1 when Remote2  
limit tripped  
Offset errors may be introduced into the remote temperature  
measurement by clock noise or by the thermal diode being  
located away from the hot spot. To achieve the specified  
accuracy on this channel, these offsets must be removed.  
ALERT  
No  
Bit set to 1 when  
exists  
condition  
1 These flags stay high until the status register is read, or they are reset by POR.  
The offset values are stored as 10-bit, twos complement values.  
The Remote 1 offset MSBs are stored in Register 0x11, and the  
LSBs are stored 0x12 (low byte, left justified). The Remote 2  
offset MSBs are stored in Register 0x34, and the LSBs are stored  
0x35 (low byte, left justified). The Remote 2 offset can be  
written to, or read from, the Remote 1 offset registers if Bit 3 of  
the Configuration 1 register is set to 1. This bit should be set to  
0 (default) to read the Remote 1 offset values.  
The eight flags that can generate an ALERT are NORd together,  
so if any of them are high, the ALERT interrupt latch is set and  
the ALERT output goes low (provided they are not masked out).  
Reading the Status 1 register will clear the five flags, Bit 6 to  
Bit 2 in Status Register 1, provided the error conditions that  
caused the flags to be set have gone away. Reading the Status 2  
register will clear the three flags, Bit 4 to Bit 2 in Status Register 2,  
provided the error conditions that caused the flags to be set  
have gone away. A flag bit can only be reset if the corresponding  
value register contains an in-limit measurement or if the sensor  
is good.  
Only the upper 2 bits of the LSB registers are used. The MSB of  
the MSB offset registers is the sign bit. The minimum offset that  
can be programmed is −128°C, and the maximum is +127.75°C.  
Rev. 1 | Page 14 of 24 | www.onsemi.com  
ADT7483A  
The value in the offset register is added or subtracted to the  
measured value of the remote temperature.  
conversion. The data written to this address is irrelevant and is  
not stored.  
Consecutive ALERT Register  
The offset register powers up with a default value of 0°C and  
will have no effect unless the user writes a different value to it.  
The value written to this register determines how many out-of-  
limit measurements must occur before an ALERT is generated.  
The default value is that one out-of-limit measurement generates  
an ALERT. The maximum value that can be chosen is 4. The  
purpose of this register is to allow the user to perform some  
filtering of the output. This is particularly useful at the fastest  
three conversion rates, where no averaging takes place. This  
register is at Address 0x22.  
Table 13. Sample Offset Register Codes  
Offset Value  
−128°C  
−4°C  
−1°C  
−0.25°C  
0°C  
+0.25°C  
+1°C  
+4°C  
0x11/0x34  
1000 0000  
1111 1100  
1111 1111  
1111 1111  
0000 0000  
0000 0000  
0000 0001  
0000 0100  
0111 1111  
0x12/0x35  
00 00 0000  
00 00 0000  
00 000000  
10 00 0000  
00 00 0000  
01 00 0000  
00 00 0000  
00 00 0000  
11 00 0000  
Table 14. Consecutive ALERT Register Bit  
Register  
Value  
Number of Out-of-Limit  
Measurements Required  
+127.75°C  
yzax 000x  
yzax 001x  
yzax 011x  
1
2
3
4
One-Shot Register  
The one-shot register is used to initiate a conversion and  
comparison cycle when the ADT7483A is in standby mode,  
after which the device returns to standby. Writing to the one-  
shot register address (0x0F) causes the ADT7483A to perform  
a conversion and comparison on both the local and the remote  
temperature channels. This is not a data register as such, and it  
is the write operation to Address 0x0F that causes the one-shot  
yzax 111x  
x = don’t care bit.  
y = SMBus SCL timeout bit. Default = 0. See the SMBus section for more  
information.  
z = SMBus SDA timeout bit. Default = 0. See the SMBus section for more  
information.  
ALERT  
a = mask internal  
s
Rev. 1 | Page 15 of 24 | www.onsemi.com  
ADT7483A  
Table 15. List of ADT7483A Registers  
Read  
Address  
(Hex)  
Write  
Address  
(Hex)  
Mnemonic  
Power-On Default  
Undefined  
Comment  
Lock  
No  
N/A  
00  
01  
01  
02  
03  
04  
05  
06  
07  
07  
08  
08  
N/A  
10  
10  
11  
11  
12  
12  
13  
13  
14  
14  
19  
19  
20  
N/A  
N/A  
N/A  
N/A  
N/A  
09  
0A  
0B  
0C  
Address Pointer  
Local Temperature Value  
0000 0000 (0x00)  
0000 0000 (0x00)  
0000 0000 (0x00)  
Undefined  
0000 0000 (0x00)  
0000 0111 (0x07)  
0101 0101 (0x55) (85°C)  
0000 0000 (0x00) (0°C)  
0101 0101 (0x55) (85°C)  
0101 0101 (0x55) (85°C)  
0000 0000 (0x00) (0°C)  
0000 0000 (0x00) (0°C)  
No  
No  
No  
No  
Remote 1 Temperature Value High Byte  
Remote 2 Temperature Value High Byte  
Status Register 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Configuration Register 1  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
N/A  
No  
Conversion Rate/Channel Selector  
Local Temperature High Limit  
Local Temperature Low Limit  
Remote 1 Temp High Limit High Byte  
Remote 2 Temp High Limit High Byte  
Remote 1 Temp Low Limit High Byte  
Remote 2 Temp Low Limit High Byte  
One-Shot  
Remote 1 Temperature Value Low Byte  
Remote 2 Temperature Value Low Byte  
Remote 1 Temperature Offset High Byte  
Remote 2 Temperature Offset High Byte  
Remote 1 Temperature Offset Low Byte  
Remote 2 Temperature Offset Low Byte  
Remote 1 Temp High Limit Low Byte  
Remote 2 Temp High Limit Low Byte  
Remote 1 Temp Low Limit Low Byte  
Remote 2 Temp Low Limit Low Byte  
0D  
0D  
0E  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
0E  
0F1  
N/A  
N/A  
11  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0000 0000  
0101 0101 (0x55) (85°C)  
0101 0101 (0x55) (85°C)  
0101 0101 (0x55) (85°C)  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
Bit 3 Conf Reg = 0  
Bit 3 Conf Reg = 1  
No  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
11  
12  
12  
13  
13  
14  
14  
19  
THERM  
THERM  
Remote 1  
Remote 2  
Limit  
Limit  
19  
20  
THERM  
Local  
Limit  
21  
21  
Hysteresis  
0000 1010 (0x0A) (10°C)  
Yes  
THERM  
22  
23  
24  
30  
31  
32  
33  
34  
35  
36  
37  
39  
FE  
FF  
22  
Consecutive  
0000 0001 (0x01)  
Yes  
No  
Yes  
No  
ALERT  
N/A  
24  
N/A  
31  
32  
N/A  
34  
35  
36  
37  
39  
Status Register 2  
Configuration 2 Register  
0000 0000 (0x00)  
0000 0000 (0x00)  
0000 0000 (0x00)  
0101 0101 (0x55) (85°C)  
0000 0000 (0x00) (0°C)  
0000 0000 (0x00)  
0000 0000 (0x00)  
0000 0000 (0x00)  
0000 0000 (0x00) (0°C)  
0000 0000 (0x00) (0°C)  
0101 0101 (0x55) (85°C)  
0100 0001 (0x41)  
Remote 2 Temperature Value High Byte  
Remote 2 Temp High Limit High Byte  
Remote 2 Temp Low Limit High Byte  
Remote 2 Temperature Value Low Byte  
Remote 2 Temperature Offset High Byte  
Remote 2 Temperature Offset Low Byte  
Remote 2 Temp High Limit Low Byte  
Remote 2 Temp Low Limit Low Byte  
Yes  
Yes  
No  
Yes  
Yes  
Yes  
Yes  
Yes  
N/A  
N/A  
Remote 2  
limit  
THERM  
Manufacturer ID  
Die Revision Code  
N/A  
N/A  
1001 0100 (0x94)  
1 Writing to Address 0F causes the ADT7483A to perform a single measurement. It is not a data register, as such, and it does not matter what data is written to it.  
Rev. 1 | Page 16 of 24 | www.onsemi.com  
ADT7483A  
The serial bus protocol operates as follows:  
SERIAL BUS INTERFACE  
1. The master initiates data transfer by establishing a start  
condition, defined as a high-to-low transition on the serial  
data line (SDATA), while the serial clock line (SCLK)  
remains high. This indicates that an address/data stream  
follows. All slave peripherals connected to the serial bus  
respond to the start condition and shift in the next eight  
bits, consisting of a 7-bit address (MSB first) plus an R/W  
bit, which determines the direction of the data transfer,  
that is, whether data will be written to, or read from, the  
slave device. The peripheral whose address corresponds to  
the transmitted address responds by pulling the data line  
low during the low period before the ninth clock pulse,  
known as the acknowledge bit. All other devices on the bus  
now remain idle while the selected device waits for data  
to be read from or written to it. If the R/W bit is a 0, the  
master writes to the slave device. If the R/W bit is a 1, the  
master reads from the slave device.  
Control of the ADT7483A is carried out via the serial bus. The  
ADT7483A is connected to the serial bus as a slave device,  
under the control of a master device.  
The ADT7483A has an SMBus timeout feature. When this is  
enabled, the SMBus typically times out after 25 ms of no activity.  
However, this feature is not enabled by default. Bit 7 (SCL  
timeout bit) of the consecutive  
register (Address = 0x22)  
ALERT  
should be set to enable the SCL timeout. Bit 6 (SDA timeout bit)  
of the consecutive register (Address = 0x22) should be set  
ALERT  
to enable the SDA timeout.  
The ADT7483A supports packet error checking (PEC) and its  
use is optional. It is triggered by supplying the extra clock for  
the PEC byte. The PEC byte is calculated using CRC-8. The  
frame check sequence (FCS) conforms to CRC-8 by the  
polynomial  
2. Data is sent over the serial bus in a sequence of nine clock  
pulses, eight bits of data followed by an acknowledge bit  
from the slave device. Transitions on the data line must  
occur during the low period of the clock signal and remain  
stable during the high period, since a low-to-high transition  
when the clock is high may be interpreted as a stop signal.  
The number of data bytes that can be transmitted over the  
serial bus in a single read or write operation is limited only  
by what the master and slave devices can handle.  
C
(
x
= x8 + x2 + x1 +1  
)
Consult the SMBus 1.1 specification for more information  
(www.smbus.org).  
ADDRESSING THE DEVICE  
Address Pins  
In general, every SMBus device has a 7-bit device address  
(except for some devices that have extended, 10-bit addresses).  
When the master device sends a device address over the bus,  
the slave device with that address will respond. The ADT7483A  
has two address pins, ADD0 and ADD1, to allow selection of  
the device address, so that several ADT7483As can be used on  
the same bus, and/or to avoid conflict with other devices.  
3. When all data bytes have been read or written, stop  
conditions are established. In write mode, the master will  
pull the data line high during the tenth clock pulse to assert  
a stop condition. In read mode, the master device will  
override the acknowledge bit by pulling the data line high  
during the low period before the ninth clock pulse. This is  
known as no acknowledge. The master will then take the  
data line low during the low period before the tenth clock  
pulse, then high during the tenth clock pulse to assert a  
stop condition.  
Although only two address pins are provided, these are three-  
state, and can be grounded, left unconnected, or tied to VDD, so  
that a total of nine different addresses are possible, as shown in  
Table 16. It should be noted that the state of the address pins is  
only sampled at power-up, so changing them after power-up  
has no effect.  
Any number of bytes of data may be transferred over the serial  
bus in one operation, but it is not possible to mix read and write  
in one operation because the type of operation is determined at  
the beginning and cannot subsequently be changed without  
starting a new operation. For the ADT7483A, write operations  
contain either one or two bytes, while read operations contain  
one byte.  
Table 16. Device Addresses  
ADD1  
ADD0  
0
NC  
1
0
NC  
1
0
NC  
1
Device Address  
0011 000  
0011 001  
0011 010  
0101 001  
0101 010  
0101 011  
1001 100  
1001 101  
1001 110  
0
0
0
NC  
NC  
NC  
1
1
1
To write data to one of the device data registers, or to read data  
from it, the address pointer register must be set so that the  
correct data register is addressed. The first byte of a write  
operation always contains a valid address that is stored in the  
address pointer register. If data is to be written to the device, the  
Rev. 1 | Page 17 of 24 | www.onsemi.com  
ADT7483A  
write operation contains a second data byte that is written to the  
register selected by the address pointer register (see Figure 16).  
the address of the internal data register to be written to, which  
is stored in the address pointer register. The second data byte is  
the data to be written to the internal data register.  
The device address is sent over the bus followed by R/W set  
to 0. This is followed by two data bytes. The first data byte is  
1
9
1
9
SCL  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0
1
R/W  
0
0
1
1
1
SDA  
ACK. BY  
ADT7483A  
ACK. BY  
ADT7483A  
START BY  
MASTER  
FRAME 1  
FRAME 2  
SERIAL BUS ADDRESS BYTE  
ADDRESS POINTER REGISTER BYTE  
1
9
SCL (CONTINUED)  
SDA (CONTINUED)  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
ACK. BY  
ADT7483A  
STOP BY  
MASTER  
FRAME 3  
DATA  
BYTE  
Figure 16. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register  
1
9
1
9
SCL  
SDA  
1
0
0
1
1
0
1
R/W  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
ACK. BY  
ADT7483A  
ACK. BY STOP BY  
ADT7483A MASTER  
START BY  
MASTER  
FRAME 2  
FRAME 1  
SERIAL BUS ADDRESS BYTE  
ADDRESS POINTER REGISTER BYTE  
Figure 17. Writing to the Address Pointer Register Only  
1
1
9
1
9
SCL  
SDA  
0
0
1
1
0
1
R/W  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
ACK. BY  
ADT7483A  
ACK. BY STOP BY  
MASTER MASTER  
START BY  
MASTER  
FRAME 2  
DATA BYTE FROM ADT7483A  
FRAME 1  
SERIAL BUS ADDRESS BYTE  
Figure 18. Reading from a Previously Selected Register  
When reading data from a register there are two possibilities:  
A read operation is then performed consisting of the serial  
bus address, R/W bit set to 1, followed by the data byte  
read from the data register (see Figure 18).  
If the address pointer register value of the ADT7483A is  
unknown or not the desired value, it is first necessary to set  
it to the correct value before data can be read from the  
desired data register. This is done by performing a write to  
the ADT7483A as before, but only the data byte containing  
the register read address is sent, as data is not to be written  
to the register (see Figure 17).  
If the address pointer register is known to be already at the  
desired address, data can be read from the corresponding  
data register without first writing to the address pointer  
register and the bus transaction shown in Figure 17 can  
be omitted.  
Rev. 1 | Page 18 of 24 | www.onsemi.com  
ADT7483A  
added. The address of the device is now known and it can  
be interrogated in the usual way.  
Notes  
It is possible to read a data byte from a data register  
without first writing to the address pointer register.  
However, if the address pointer register is already at the  
correct value, it is not possible to write data to a register  
without writing to the address pointer register because the  
first data byte of a write is always written to the address  
pointer register.  
4. If more than one device’s ALERT output is low, the one  
with the lowest device address will have priority, in  
accordance with normal SMBus arbitration.  
5. Once the ADT7483A has responded to the alert response  
address, it will reset its  
output, provided that the  
ALERT  
error condition that caused the  
no longer exists. If  
ALERT  
line remains low, the master will send the  
Remember that some of the ADT7483A registers have  
different addresses for read and write operations. The write  
address of a register must be written to the address pointer  
if data is to be written to that register, but it may not be  
possible to read data from that address. The read address  
of a register must be written to the address pointer before  
data can be read from that register.  
the  
SMBALERT  
ARA again, and so on, until all devices whose  
were low have responded.  
outputs  
ALERT  
MASKING THE  
OUTPUT  
ALERT  
The ALERT output can be masked for local, Remote 1,  
Remote 2, or all three channels. This is done by setting the  
appropriate mask bits in either the Configuration 1 register  
(read address = 0x03, write address = 0x09) or in the  
consecutive ALERT register (address = 0x22)  
ALERT  
OUTPUT  
This is applicable when Pin 13 is configured as an ALERT  
output. The ALERT output goes low whenever an out-of-limit  
measurement is detected, or if the remote temperature sensor is  
open circuit. It is an open-drain output and requires a pull-up  
to VDD. Several ALERT outputs can be wire-ORed together, so  
that the common line will go low if one or more of the ALERT  
outputs goes low.  
To mask ALERTs due to local temperature, set Bit 5 of the  
consecutive ALERT register to 1. Default = 0.  
To mask ALERTs due to Remote 1 temperature, set Bit 1 of the  
Configuration 1 register to 1. Default = 0.  
The ALERT output can be used as an interrupt signal to a  
processor, or it can be used as an SMBALERT. Slave devices on  
the SMBus cannot normally signal to the bus master that they  
want to talk, but the SMBALERT function allows them to do so.  
To mask ALERTs due to Remote 2 temperature, set Bit 0 of the  
Configuration 1 register to 1. Default = 0.  
To mask ALERTs due to any channel, set Bit 7 of the  
Configuration 1 register to 1. Default = 0.  
One or more ALERT outputs can be connected to a common  
SMBALERT line connected to the master. When the  
SMBALERT line is pulled low by one of the devices, the  
following procedure occurs, as shown in Figure 19.  
LOW POWER STANDBY MODE  
The ADT7483A can be put into low power standby mode by  
setting Bit 6 (Mon/STBY bit) of the Configuration 1 register  
(read address = 0x03, write address = 0x09) to 1. When Bit 6 is  
0, the ADT7483A operates normally. When Bit 6 is 1, the ADC  
is inhibited, and any conversion in progress is terminated  
without writing the result to the corresponding value register.  
MASTER  
RECEIVES  
SMBALERT  
ALERT RESPONSE  
ADDRESS  
DEVICE  
ADDRESS  
NO  
START  
RD ACK  
STOP  
ACK  
MASTER SENDS  
ARA AND READ  
COMMAND  
DEVICE SENDS  
ITS ADDRESS  
The SMBus is still enabled. Power consumption in the standby  
mode is reduced to less than 5 μA.  
Figure 19. Use of SMBALERT  
1. SMBALERT is pulled low.  
When the device is in standby mode, it is still possible to initiate  
a one-shot conversion of both channels by writing to the one-  
shot register (Address 0x0F), after which the device will return  
to standby. It does not matter what is written to the one-shot  
register, all data written to it is ignored.  
2. Master initiates a read operation and sends the alert  
response address (ARA = 0001 100). This is a general call  
address that must not be used as a specific device address.  
3. The device whose ALERT output is low responds to the  
alert response address, and the master reads its device  
address. The device address is seven bits, so an LSB of 1 is  
It is also possible to write new values to the limit register while  
in standby mode. If the values stored in the temperature value  
Rev. 1 | Page 19 of 24 | www.onsemi.com  
ADT7483A  
registers are now outside the new limits, an ALERT is  
generated, even though the ADT7483A is still in standby.  
Similarly, the THERM output asserts low if the Remote 1,  
Remote 2, or local temperature exceeds the programmed  
THERM limits. The THERM temperature limits should  
normally be equal to or greater than the high temperature  
limits. THERM is automatically reset when the temperature  
falls back within the (THERM − Hysteresis) limit. The local and  
remote THERM limits are set by default to 85°C. An hysteresis  
value can be programmed, in which case, THERM resets when  
the temperature falls to the limit value minus the hysteresis  
value. This applies to both local and remote measurement  
channels. The power-on hysteresis default value is 10°C, but this  
may be reprogrammed to any value after power-up.  
SENSOR FAULT DETECTION  
The ADT7483A has internal sensor fault detection circuitry  
located at its D+ input. This circuit can detect situations where  
a remote diode is not connected, or is incorrectly connected, to  
the ADT7483A. A simple voltage comparator trips if the voltage  
at D+ exceeds VDD − 1 V (typical), signifying an open circuit  
between D+ and D−. The output of this comparator is checked  
when a conversion is initiated. Bit 2 (D1 OPEN flag) of the  
Status Register 1 (Address 0x02) is set if a fault is detected on  
the Remote 1 channel. Bit 2 (D2 OPEN flag) of the Status  
Register 2 (Address 0x23) is set if a fault is detected on the  
Remote 2 channel. If the ALERT pin is enabled, setting this flag  
will cause ALERT to assert low.  
The hysteresis loop on the THERM outputs is useful when  
THERM is used for on/off control of a fan. The users system  
can be set up so that when THERM asserts, a fan can be  
switched on to cool the system. When THERM goes high again,  
the fan can be switched off. Programming an hysteresis value  
protects from fan jitter, wherein the temperature hovers around  
the THERM limit and the fan is constantly being switched.  
If a remote sensor is not used with the ADT7483A, then the D+  
and D− inputs of the ADT7483A need to be tied together to  
prevent the OPEN flag from being continuously set.  
Most temperature sensing diodes have an operating temperature  
range of −55°C to +150°C. Above 150°C, they lose their  
Table 17. THERM Hysteresis  
Hysteresis  
THERM  
Binary Representation  
semiconductor characteristics and approximate conductors  
instead. This results in a diode short, setting the OPEN flag. The  
remote diode in this case no longer gives an accurate temperature  
measurement. A read of the temperature result register will give  
the last good temperature measurement. The user should be  
aware that, while the diode fault is triggered, the temperature  
measurement on the remote channels may not be accurate.  
0°C  
1°C  
10°C  
0 000 0000  
0 000 0001  
0 000 1010  
Figure 20 shows how the THERM and ALERT outputs operate.  
The ALERT output can be used as an SMBALERT to signal to  
the host via the SMBus that the temperature has risen. If the  
temperature continues to increase, the THERM output can be  
used to turn on a fan to cool the system. This method ensures  
that there is a fail-safe mechanism to cool the system, without  
the need for host intervention.  
INTERRUPT SYSTEM  
The ADT7483A has two interrupt outputs, ALERT and  
THERM. Both outputs have different functions and behavior.  
ALERT is maskable and responds to violations of software  
programmed temperature limits or an open-circuit fault on the  
remote diode. THERM is intended as a fail-safe interrupt  
output that cannot be masked.  
TEMPERATURE  
100°C  
90°C  
80°C  
70°C  
60°C  
50°C  
40°C  
THERM LIMIT  
THERM LIMIT-HYSTERESIS  
HIGH TEMP LIMIT  
If the Remote 1, Remote 2, or local temperature exceeds the  
programmed high temperature limits, or equals or exceeds the  
low temperature limits, the ALERT output is asserted low. An  
open-circuit fault on the remote diode also causes ALERT to  
assert. ALERT is reset when serviced by a master reading its  
device address, provided the error condition has gone away and  
the status register has been reset.  
RESET BY MASTER  
1
4
ALERT  
THERM  
2
3
Figure 20. Operation of the ALERT and THERM Outputs  
Rev. 1 | Page 20 of 24 | www.onsemi.com  
ADT7483A  
TEMPERATURE  
If the measured temperature exceeds the high temperature  
limit, the ALERT output asserts low.  
90°C  
80°C  
70°C  
60°C  
50°C  
40°C  
30°C  
THERM LIMIT  
THERM2 LIMIT  
If the temperature continues to increase and exceeds the  
THERM limit, the THERM output asserts low. This can  
be used to throttle the CPU clock or switch on a fan.  
The THERM output deasserts (goes high) when the  
temperature falls to THERM limit minus hysteresis. In  
Figure 20, the default hysteresis value of 10°C is shown.  
1
4
THERM2  
THERM  
3
2
The ALERT output deasserts only when the temperature  
has fallen below the high temperature limit, and the master  
has read the device address and cleared the status register.  
Figure 21. Operation of the THERM and THERM2 Interrupts  
When the THERM2 limit is exceeded, the THERM2 signal  
asserts low.  
Pin 13 on the ADT7483A can be configured as either an  
ALERT output or as an additional THERM output. THERM2  
will assert low when the temperature exceeds the programmed  
local and/or remote high temperature limits. It is reset in the  
same manner as THERM, and it is not maskable. The programmed  
hysteresis value also applies to THERM2. Figure 21 shows how  
THERM and THERM2 might operate together to implement two  
methods of cooling the system. In this example, the THERM2  
limits are set lower than the THERM limits. The THERM2 output  
can be used to turn on a fan. If the temperature continues to  
rise and exceeds the THERM limits, the THERM output can  
provide additional cooling by throttling the CPU.  
If the temperature continues to increase and exceeds the  
THERM limit, the THERM output asserts low.  
The THERM output deasserts (goes high) when the  
temperature falls to THERM limit minus hysteresis. In  
Figure 21, there is no hysteresis value shown.  
As the system cools further, and the temperature falls  
below the THERM2 limit, the THERM2 signal resets.  
Again, no hysteresis value is shown for THERM2.  
The temperature measurement can be either the local or the  
remote temperature measurement.  
Rev. 1 | Page 21 of 24 | www.onsemi.com  
ADT7483A  
APPLICATIONS  
If a discrete transistor is used with the ADT7483A, the best  
accuracy is obtained by choosing devices according to the  
following criteria:  
NOISE FILTERING  
For temperature sensors operating in noisy environments,  
previous practice was to place a capacitor across the D+ and D−  
pins to help combat the effects of noise. However, large capacitances  
affect the accuracy of the temperature measurement, leading to a  
recommended maximum capacitor value of 1,000 pF.  
Base-emitter voltage greater than 0.25 V at 6 μA, at the  
highest operating temperature.  
Base-emitter voltage less than 0.95 V at 100 μA, at the  
lowest operating temperature.  
FACTORS AFFECTING DIODE ACCURACY  
Remote Sensing Diode  
Base resistance less than 100 Ω.  
The ADT7483A is designed to work with substrate transistors  
built into processors or with discrete transistors. Substrate  
transistors will generally be PNP types with the collector  
connected to the substrate. Discrete types can be either a PNP  
or NPN transistor connected as a diode (base shorted to  
collector). If an NPN transistor is used, the collector and base  
are connected to D+ and the emitter to D−. If a PNP transistor  
is used, the collector and base are connected to D− and the  
emitter to D+.  
Small variation in hFE (50 to 150) that indicates tight  
control of VBE characteristics.  
Transistors such as 2N3904, 2N3906, or equivalents in SOT-23  
packages, are suitable devices to use.  
THERMAL INERTIA AND SELF-HEATING  
Accuracy depends on the temperature of the remote sensing  
diode and/or the local temperature sensor being at the same  
temperature as that being measured. A number of factors can  
affect this. Ideally, the sensor should be in good thermal contact  
with the part of the system being measured. If it is not, the  
thermal inertia caused by the sensors mass causes a lag in the  
response of the sensor to a temperature change. In the case of  
the remote sensor, this should not be a problem, since it will  
either be a substrate transistor in the processor or a small  
package device, such as SOT-23, placed in close proximity to it.  
To reduce the error due to variations in both substrate and  
discrete transistors, the following factors should be taken into  
consideration:  
The ideality factor, nf, of the transistor is a measure of the  
deviation of the thermal diode from ideal behavior. The  
ADT7483A is trimmed for an nf value of 1.008. Use the  
following equation to calculate the error introduced at a  
temperature,T (°C) when using a transistor whose nf does  
not equal 1.008. Consult the processor data sheet for the nf  
values.  
The on-chip sensor, however, is often remote from the  
processor and only monitors the general ambient temperature  
around the package. In practice, the ADT7483A package will be  
in electrical, and hence thermal, contact with a PCB and may  
also be in a forced airflow. How accurately the temperature of  
the board and/or the forced airflow reflects the temperature to  
be measured will also affect the accuracy. Self-heating, due to  
the power dissipated in the ADT7483A or the remote sensor,  
causes the chip temperature of the device or remote sensor to  
rise above ambient. However, the current forced through the  
remote sensor is so small that self-heating is negligible. In the  
case of the ADT7483A, the worst-case condition occurs when  
the device is converting at 64 conversions per second while  
sinking the maximum current of 1 mA at the ALERT and  
THERM output. In this case, the total power dissipation in the  
device is about 4.5 mW. The thermal resistance, θJA, of the  
QSOP-16 package is about 150°C/W.  
ΔT =  
(
nf –1.008  
)
/1.008×  
(
273.15 Kelvin +T  
)
To factor this in, write the ΔT value to the offset register. It  
is then automatically added to, or subtracted from, the  
temperature measurement by the ADT7483A.  
Some CPU manufacturers specify the high and low current  
levels of the substrate transistors. The high current level of  
the ADT7483A, IHIGH, is 200 μA, and the low level current,  
I
LOW, is 12 μA. If the ADT7483A current levels do not match  
the current levels specified by the CPU manufacturer, it may  
be necessary to remove an offset. Refer to the CPU data  
sheet to determine whether this offset needs to be removed  
and how to calculate it. This offset is programmed to the  
offset register. It is important to note that if more than one  
offset must be considered, program the algebraic sum of  
these offsets to the offset register.  
Rev. 1 | Page 22 of 24 | www.onsemi.com  
ADT7483A  
Place a 0.1 μF bypass capacitor close to the VDD pin. In  
LAYOUT CONSIDERATIONS  
extremely noisy environments, place an input filter  
capacitor across D+ and D− close to the ADT7483A. This  
capacitance can effect the temperature measurement, so  
care must be taken to ensure that any capacitance seen at  
D+ and D− is a maximum of 1,000 pF. This maximum  
value includes the filter capacitance, plus any cable or stray  
capacitance between the pins and the sensor diode.  
Digital boards can be electrically noisy environments, and the  
ADT7483A measures very small voltages from the remote  
sensor, so care must be taken to minimize noise induced at the  
sensor inputs. Follow these precautions:  
Place the ADT7483A as close as possible to the remote  
sensing diode. Provided that the worst noise sources such  
as clock generators, data/address buses, and CRTs are  
avoided, this distance can be 4 inches to 8 inches.  
If the distance to the remote sensor is more than 8 inches,  
the use of twisted pair cable is recommended. A total of  
6 feet to 12 feet is needed.  
Route the D+ and D– tracks close together, in parallel,  
with grounded guard tracks on each side. To minimize  
inductance and reduce noise pickup, a 5 mil track width  
and spacing is recommended. Provide a ground plane  
under the tracks, if possible.  
For very long distances (up to 100 feet), use shielded  
twisted pair, such as Belden No. 8451 microphone cable.  
Connect the twisted pair to D+ and D−, and the shield to  
GND close to the ADT7483A. Leave the remote end of the  
shield unconnected to avoid ground loops.  
5MIL  
5MIL  
5MIL  
5MIL  
5MIL  
5MIL  
5MIL  
GND  
Because the measurement technique uses switched current  
sources, excessive cable or filter capacitance can affect the  
measurement. When using long cables, the filter capacitance  
can be reduced or removed.  
D+  
D–  
APPLICATION CIRCUIT  
GND  
Figure 23 shows a typical application circuit for the ADT7483A,  
using discrete sensor transistors. The pull-ups on SCLK,  
SDATA, and ALERT are required only if they are not already  
provided elsewhere in the system.  
Figure 22. Typical Arrangement of Signal Tracks  
Minimize the number of copper/solder joints that can cause  
thermocouple effects. Where copper/solder joints are used,  
make sure that they are in both the D+ and D− path and at  
the same temperature.  
The SCLK and SDATA pins of the ADT7483A can be interfaced  
directly to the SMBus of an I/O controller, such as the Intel® 820  
chipset.  
Thermocouple effects should not be a major problem as  
1°C corresponds to approximately 200 mV, and thermo-  
couple voltages are about 3 mV/°C of temperature difference.  
Unless there are two thermocouples with a large temperature  
differential between them, thermocouple voltages should  
be much less than 200 mV.  
V
3V TO 3.6V  
DD  
ADT7483A  
D1+  
0.1μF  
TYP 10kΩ  
SCLK  
2N3904/06  
OR  
CPU THERMAL  
DIODE  
5V OR 12V  
SMBUS  
CONTROLLER  
D1–  
SDATA  
D2+  
ALERT  
V
THERM  
D2–  
DD  
ADD0  
TYP 10kΩ  
FAN ENABLE  
ADD1  
GND  
FAN CONTROL  
CIRCUIT  
Figure 23. Typical Application Circuit  
Rev. 1 | Page 23 of 24 | www.onsemi.com  
ADT7483A  
OUTLINE DIMENSIONS  
0.193  
BSC  
16  
1
9
8
0.154  
BSC  
0.236  
BSC  
PIN 1  
0.069  
0.053  
0.065  
0.049  
8°  
0°  
0.010  
0.004  
COPLANARITY  
0.004  
0.025  
BSC  
0.012  
0.008  
0.050  
0.016  
SEATING  
PLANE  
0.010  
0.006  
COMPLIANT TO JEDEC STANDARDS MO-137-AB  
Figure 24. 16-Lead Shrink Small Outline Package [QSOP]  
(RQ-16)  
Dimensions shown in inches  
ORDERING GUIDE  
Model  
ADT7483AARQZ1  
ADT7483AARQZ-RL1  
ADT7483AARQZ-R71  
EVAL-ADT7483EB  
Operating Temperature Range  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
−40°C to +125°C  
Package Description  
16-Lead QSOP Package  
16-Lead QSOP Package  
16-Lead QSOP Package  
Evaluation Board  
Package Option  
RQ-16  
RQ-16  
RQ-16  
1Z = Pb-free part.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any  
products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising  
out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical”  
parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating  
parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the  
rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to  
support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or  
use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors  
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such  
unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action  
Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800-282-9855  
Toll Free USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81-3-5773-3850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada  
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
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Rev. 1 | Page 24 of 24 | www.onsemi.com  

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SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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