FAN48695UC190X [ONSEMI]
2.5 MHz, Fixed-Output Synchronous TinyBoost® Regulator;
| 型号： | FAN48695UC190X |
| 厂家： | 
ONSEMI |
| 描述： | 2.5 MHz, Fixed-Output Synchronous TinyBoost® Regulator |
| 文件： | 总14页 (文件大小：690K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Synchronous Regulator,
TINYBOOST), 2.5 MHz
FAN48695
Description
The FAN48695 is a low−power boost regulator designed to provide
a regulated output voltage from a single cell Lithium or Li−Ion battery.
The device maintains output voltage regulation within the
recommended operating conditions. The combination of built−in
power transistors, synchronous rectification and low supply current
make the FAN48695 ideal for battery−powered applications.
The FAN48695 is available in a 9−bump, 0.4 mm pitch,
Wafer−Level Chip Scale Package (WLCSP).
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WLCSP9
CASE 567VH
Features
MARKING DIAGRAM
• Input Voltage Range: 2.5 V to 5.5 V
• 1 A Load Capability
• PFM / PWM for high efficiency
• 2.5 MHz Fixed Frequency PWM Operation
• Synchronous Rectification
• Reverse Current Blocking
• Automatic Pass−Through Operation
• Forced Pass−Through Mode
• Over Temperature Protection
• Over Current Protection
12KK
XYZ
12
= Alphanumeric Device Code
(See Ordering Information
for specific device marking)
= Lot Run Number
= Alphabetical Year Code
= 2−weeks Date Code
KK
X
Y
• Under Voltage Protection
Z
= Assembly Plant Code
• 3 Stage Soft Start
• These Devices are Pb−Free and are RoHS Compliant
Applications
• NFC/USB/Power Amp
• Cell Phones, Smart Phones, Portable Instruments
SW
VOUT
VOUT
L1
SW
PVIN
FAN48695
COUT
CIN
GND
GND
EN
PT
Figure 1. Typical Application
Table 1. ORDERING INFORMATION
Operating Temperature
Range
†
Part Number
V
OUT
*
Package
Packing
Device Marking
FAN48695UC190X
5.0 V
−40°C to 85°C
9−Bump, 0.4 mm Pitch,
3000 / Tape & Reel
2G
WLCSP Package
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
*Additional Output voltage options are available upon request.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
March, 2020 − Rev. 1
FAN48695/D
FAN48695
Block Diagram
L1
SW
SW
VOUT
VOUT
Q2
COUT
PVIN
Q1
Synchronous
Rectifier
Control
CIN
GND
GND
EN
Modulator,
Logic, and
Control
PT
Figure 2. IC Block Diagram
Table 2. RECOMMENDED EXTERNAL COMPONENTS
REF
Description
Part Number
C
10 mF, 6.3 V, 20%, X5R, 0402
Murata
IN
GRM155R60J106ME15
L1
1 mH / I
= 3.6 A / I
= 2.7 A / R = 57 mW
Murata
SAT
RAT
DC
DFE201610E−1R0M
C
22 mF, 10 V, 20%, X5R, 0603
Murata
OUT
GRM187R61A226ME15
NOTE: For improved ripple performance, additional output capacitance can be added.
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2
FAN48695
Pin Configuration
VOUT
VOUT
PVIN
A1
A2
A3
SW
SW
EN
B1
B2
B3
GND
GND
PT
C1
C2
C3
Top View
Figure 3. WLCSP
Table 3. PIN DEFINITIONS
Pin
A1
A2
A3
Name
Description
VOUT
Output Voltage: Output of Boost Regulator. Connect C to this pin using the lowest impedance trace pos-
OUT
sible.
PVIN
SW
Input Voltage: Input power source for Boost Regulator. Connect C directly to this pin using the lowest im-
IN
pedance trace possible.
Switching Node: Connect L1 to this pin.
B1
B2
B3
C1
C2
C3
EN
Enable: A logic HIGH enables the device. A logic LOW disables the device.
GND
Ground: Power and signal ground reference for the IC. C and C
should be connected to this pin using
IN
OUT
the lowest impedance trace possible.
PT
Pass−Through: A logic HIGH will place the device in Forced Pass−Through mode.
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3
FAN48695
Table 4. MAXIMUM RATINGS
Symbol
Parameter
Conditions
Min
−0.3
−0.3
−0.3
−0.3
Max
6.0
Units
V
V
IN
Input Voltage
PVIN pin
V
OUT
Output Voltage
VOUT pin
6.0
V
V
SW
Continuous Switch Node Voltage
Control Voltage
SW pin
6.5
V
V
CTRL
EN and PT pins
(Note 1)
V
ESD
Electrostatic Discharge Protection Level Human Body Model
Charged Device Model
2.0
1.0
kV
kV
°C
°C
°C
T
J
Junction Temperature
−40
−65
+150
+150
+260
T
STG
Storage Temperature
T
L
Soldering Temperature (10 Seconds)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Lesser of 6 V or V + 0.3 V.
IN
Table 5. RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage Range
Conditions
Min
Typ
Max
Units
V
V
IN
PV
2.5
5.5
IN
L
Inductor
1.0
10
22
mH
mF
C
Input Capacitance
IN
C
Output Capacitance (Note 2)
Output Current (Note 3)
Operating Ambient Temperature
Junction Temperature
3.5
1000
−40
mF
OUT
OUT
I
PV ≥ 2.8 V
mA
°C
IN
T
A
+85
T
J
−40
+125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
2. The effective capacitance (CEFF) of small, high−value, ceramic capacitors will decrease as bias voltage increases. The effects of bias
voltage (DC bias characteristics), tolerance, and temperature must be considered.
3. Refer to Figure 17 in Application Information Section.
Table 6. THERMAL PROPERTIES
Symbol
Parameter
Junction−to−Ambient Thermal Resistance
Typical
Unit
q
50
°C/W
JA
NOTE: Junction−to−ambient thermal resistance is a function of application and board layout. This data is measured with two−layer 2s2p
boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature T at a
J(max)
given ambient temperature T .
A
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4
FAN48695
Table 7. ELECTRICAL SPECIFICATIONS (Note 4)
Minimum and maximum values are at PV = 2.5 to 5.5 V and PV < V
− 300 mV, EN = 1.8 V, PT = 0 V, T = −40°C to +85°C unless
IN
IN
OUT
A
otherwise specified. Typical values are at T = 25°C, PV = 3.8 V, EN = 1.8 V, PT = 0 V.
A
IN
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER SUPPLIES
I
Quiescent Current
No Load, Non Switching,
PV ≤ V − 300 mV
27
40
mA
Q_PFM
IN
OUT
I
Auto Pass−Through Operating IQ
No Load, PV = 5.5 V
40
9
60
15
mA
mA
Q_APT
IN
I
Forced Pass−Through Mode Operating
Current
No Load, PV = 3.8 V, PT = 1.8 V
Q_FPT
IN
I
Shutdown Current
EN = 0 V
3
8
mA
V
SD
V
Under−Voltage Lockout Threshold
Under−Voltage Lockout Threshold
Rising PV
2.10
2.00
2.15
2.05
2.20
2.10
UVLO_R
IN
V
Falling PV
V
UVLO_F
IN
OUTPUT VOLTAGE ACCURACY
Regulated Output Voltage
V
PV = 3.8 V, No Load (PFM Mode)
4.884
4.900
5.035
5.000
5.186
5.100
V
V
O_ACC
IN
PV = 3.8 V, I
= 200 mA (PWM
IN
LOAD
Mode)
REGULATOR
F
PWM Switching Frequency
PV = 3.8 V
2.25
2.34
2.50
55
2.75
100
100
2.84
MHz
mW
mW
A
SW
IN
RDS
RDS
PMOS Resistance, SW to VOUT
NMOS Resistance, SW to PGND
Inductor Peak Current Limit
ON_P
55
ON_N
I
2.63
280
SW_LIM
LIN1
First Stage Linear Soft Start Input
Current Limit
V
V
= 2.0 V
= 2.0 V
mA
OUT
LIN2
Linear Soft Start Input Current Limit
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
600
145
28
mA
°C
OUT
T
I
= 10 mA
SD
LOAD
T
HYS
°C
LOGIC PINS (EN, PT)
V
Logic Low threshold
Logic High threshold
Pull−Down Resistance
0.4
V
V
IL
IH
V
1.2
R
Logic Low state only
300
kW
PD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Specifications in the Electrical Characteristics table reflect open−loop, steady−state data.
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5
FAN48695
TYPICAL CHARACTERISTICS
Unless otherwise specified, circuit of Figure 1 using recommended external components and layout, T = 25°C, PV = 3.8 V, EN = 1.8 V.
A
IN
35
30
25
20
15
10
8
7
6
5
4
3
2
1
0
+85C
+25C
−40C
+85C
+25C
−40C
2.5
3
3.5
4
4.5
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
Figure 4. Quiescent Current (Non−Switching)
Figure 5. Shutdown Current vs. Input Voltage
vs. Input Voltage
100
98
96
94
92
90
88
86
84
82
80
100
98
96
94
92
90
88
86
84
82
80
−40C
+25C
+85C
2.8Vin
3.3Vin
3.0Vin
3.8Vin
4.35Vin 4.7Vin
1
10
100
1000
1
10
100
1000
Load Current (mA)
Load Current (mA)
Figure 6. Efficiency vs. Load Current and Input
Figure 7. Efficiency vs. Load Current and
Voltage, L = DFE201610E−1R0M
Temperature, L = DFE201610E−1R0M
100
98
96
94
92
90
88
86
84
82
80
100
98
96
94
92
90
88
86
84
82
80
−40C
+25C
+85C
2.8Vin
3.3Vin
3.0Vin
3.8Vin
4.35Vin 4.7Vin
1
10
100
1000
1
10
100
1000
Load Current (mA)
Load Current (mA)
Figure 8. Efficiency vs. Load Current and Input
Figure 9. Efficiency vs. Load Current and
Voltage, L = DFE201610R−H−1R0M
Temperature, L = DFE201610R−H−1R0M
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FAN48695
TYPICAL CHARACTERISTICS
Unless otherwise specified, circuit of Figure 1 using recommended external components and layout, T = 25°C, PV = 3.8 V, EN = 1.8 V.
A
IN
10
8
100
90
80
70
60
50
40
30
20
10
0
Iload=1A
Iload=500mA
Iload=200mA
Iload=100mA
2.8Vin
3.3Vin
4.35Vin
3.0Vin
3.8Vin
4.7Vin
6
4
2
0
−2
−4
−6
−8
−10
0
200
400
600
800
1000
2.8
3
3.2 3.4 3.6 3.8
4
4.2 4.4 4.6
Load Current (mA)
Input Voltage (V)
Figure 10. Output Ripple vs. Load Current
Figure 11. Line Regulation, Deviation from 3.8
PVIN Measurement
160
140
120
100
80
5.09
5.07
5.05
5.03
5.01
4.99
4.97
4.95
+85C
+25C
−40C
60
PWM Entry
PFM Entry
40
20
0
0
200
400
600
800
1000
2.5
3
3.5
4
4.5
Input Voltage (V)
Load Current (mA)
Figure 12. Load Regulation
Figure 13. PWM/PFM Entry Thresholds vs.
Input Voltage
Figure 14. Load Transient, 50 mA $ 500 mA,
1 ms Edge
Figure 15. Line Transient, 3.0 V $ 3.6 V,
10 ms Edge, 10 mA Load
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FAN48695
TYPICAL CHARACTERISTICS
Unless otherwise specified, circuit of Figure 1 using recommended external components and layout, T = 25°C, PV = 3.8 V, EN = 1.8 V.
A
IN
Figure 16. Start−Up into 50 W Load
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FAN48695
APPLICATION INFORMATION
1100
1000
900
stage linear soft−start to limit inrush currents from the
source.
Linear Soft−Start State
An internal fixed current source of LIN1 is applied to
V
OUT
for up to 500 ms. If V does not reach V − 300 mV
OUT IN
within 500 msec, the current source is increased to LIN2 for
up to an additional 1 ms.
Boost Mode:
800
• If any time during the Linear Soft−Start State V
OUT
charges up to V − 300 mV, the fixed current source
IN
700
will be disabled and the device then proceeds to the
Switching Soft−Start State.
2.5
3
3.5
4
4.5
Input Voltage (V)
• If V
fails to charge up to V − 300 mV by the end
OUT
IN
Figure 17. Load Capability vs. Input Voltage
Operation Description
The FAN48695 is a low−power boost regulator designed
to provide a regulated output voltage from a single cell
Lithium or Li−Ion battery. It maintains the output in
regulation within the devices recommended operating
conditions. For higher efficiency at low load conditions, the
device will transition into PFM Mode.
Automatic Pass−Through Mode will occur during boost
Mode if the input voltage rises close to or above the desired
output voltage. Additionally, the device can be put into
Forced Pass−Through Mode when boosting the output is not
required by setting the PT pin to HIGH.
of LIN2, the fixed current source is disabled, a fault
condition is declared, and the device waits 20 ms to
attempt an automatic restart.
FPT Mode:
• If V
charges up to V , Forced Pass−Through
OUT
IN
Mode is achieved.
• If V fails to charge up to V by the end of LIN2,
OUT
IN
the fixed current source is disabled, a fault condition is
declared, and the device waits 20 ms to attempt an
automatic restart.
Switching Soft−Start State
The regulator begins switching in PFM operation with
I
set to one−quarter its normal value until V
SW_LIM
OUT
Startup Description
The FAN48695 can startup in either Boost Mode or
Forced Pass−Through (FPT) Mode. Both modes use a two
reaches its target voltage or 100 ms has elapsed. The device
will then transition to BOOST Mode with I
to its typical value.
returned
SW_LIM
VOUTRegulation
VOUT= VIN – 300mV
VOUT
LIN2
LIN1
PFM
Input Current
EN
< 500us
< 1ms
Linear Soft−Start
Switching Soft−Start
Figure 18. Boost Mode Startup
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FAN48695
Shutdown Description
The boost can be disabled by asserting the EN pin low.
The output (VOUT) will discharge into the prevailing load.
node) signal is low, will grow as the battery voltage in a
mobile device decays.
Boost PFM Mode
Modes of Operation
The FAN48695 has PFM operation which improves
efficiency at light loads. The device operates in PFM when
the load current falls below approximately 80 mA. In PFM
mode, the average output voltage is regulated higher than the
average PWM output voltage to improve transient dips.
Boost PWM Mode
During PWM mode, the boost regulates the output using
a fixed switching frequency of ~2.5 MHz. As the load
increases, the inductor current will have an increasing DC
offset. The period of when the V (voltage at switching
SW
PFM Operation
PWM Operation
VSW
VOUT
PFM Average
PFM Offset (35 mV)
PWM Average
Figure 19. Boost Mode Operation
Automatic Pass−Through Operation
Forced Pass−Through Mode
In normal operation, the device automatically transitions
When the PT pin is set to a logic HIGH and EN=HIGH,
Forced Pass−Through mode occurs. In Pass−Through
from Boost Mode to Pass−Through Operation if V is
IN
more than the boost target voltage minus 250 mV for ≥5
msec. In Pass−Through Mode, the device has a low
Mode, the device has a low impedance path between V
IN
and V
(RDS
+ L ).
DCR
OUT
ON_P
impedance path between V and V
(RDS
+
ON_P
IN
OUT
L
). The device will automatically exit Pass−Through
DCR
Mode when V is 350 mV less than the target boost voltage.
IN
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10
FAN48695
Protection Features
External Component Selection
Refer to Table 2: Recommended External Components.
V
OUT
Fault
If the output voltage is pulled down to 300 mV below
by a heavy load, the device will fault to protect itself, the
source, and the load.
Output Capacitance (C
)
OUT
V
IN
It is recommended to use the output capacitor shown in the
Recommended External Components table. If a different
component is chosen, it is important that its effective
capacitance is equal to or greater than that of the
recommended component. See the Recommended
Operating Conditions table for details. For better ripple
performance, additional output capacitance can be added.
Soft Start Fault
Refer to the Start−up section for additional detail. If the
device fails to drive the output up to V − 300 mV within
IN
1.5 ms the device will fault due to sensing a heavy load. If
the device is unable to bring the output up to regulation
within 100 ms after exiting the linear charging phases, the
device will fault. In either case, the device will attempt a
restart 20 ms later.
Output Voltage Ripple
Output voltage ripple is inversely proportional to C
.
OUT
During t , when the boost switch is on, all load current is
ON
supplied by C
.
OUT
Current Limit (OCP)
ILOAD
FAN48695 has a current limit feature which protects
itself, the inductor, and load during overload conditions.
When the inductor peak current limit is reached and held for
2 ms, the device enters fault state.
(eq. 1)
(eq. 2)
VRIPPLE(P*P) + tON
@
COUT
And
VIN
During an output overload condition, if V
falls
OUT
@ ǒ1 * Ǔ
tON + tSW @ D + tSW
VOUT
300 mV below V the device enters fault state without
IN
waiting 2 ms.
therefore:
In fault state, Q2 is completely opened to prevent current
flow between PVIN and VOUT, in either direction. The
device will attempt an automatic restart every 20 ms.
ILOAD
VIN
@ ǒ1 * Ǔ@
VOUT
(eq. 3)
(eq. 4)
VRIPPLE(P*P) + tSW
COUT
1
tSW
+
Automatic Pass−Through Mode Protection
During Automatic Pass−Through Mode, the device is
short−circuit protected. If the voltage difference between
fSW
For better ripple performance, more output capacitance
can be added.
V
IN
and V
exceed more than 350 mV for ≤10 ms, a fault
OUT
is declared. The part will automatically attempt a restart
every 20ms until the short condition ceases.
Input Capacitance (C )
The 10uF ceramic 0402 input capacitor should be placed
IN
as close as possible between the PV pin and GND to
minimize the parasitic inductance.
IN
Forced Pass−Through Mode Protection
In Forced Pass−Through Mode, fault protection occurs
when V
is dragged below V − 450 mV. The device will
NOTE: The effective capacitance value decreases as
OUT
IN
automatically attempt a restart every 20 ms.
V
IN
increases due to DC bias effects. A high
quality capacitor with ample voltage rating
should be used for C
Thermal Shutdown (TSD)
IN.
When the die temperature increases, due to a high load
condition and/or a rising ambient temperature, the output
switching is disabled until the die temperature falls to the
hysteresis threshold. The junction temperature at which the
thermal shutdown activates is nominally T with T
Inductor (L1)
The FAN48695 employs peak current limiting and there
is a finite amount of time between when the peak current is
detected and when the switch turns off. During overload
SD
HYS
hysteresis.
conditions, peak currents will be safely limited to I
SW_LIM
when using a properly rated inductor. Saturation effects
should be considered during inductor selection.
Under−Voltage Lockout (UVLO)
If the EN pin is HIGH, once rising V reaches V
,
IN
UVLO_R
the part will begin the Soft Start process. When falling V
IN
reaches V , the output will go to a high Z state and the
UVLO_F
output voltage will decay into the prevailing load.
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11
FAN48695
Layout Guideline
The Recommended Layout shows all components on the
top layer, top copper in RED and bottom copper in BLUE.
For thermal reasons, it is recommended to maximize the
pour area for all planes other than SW.
Via
L1
VIN
VOUT
COUT
GND
CIN
Figure 20. Recommended Layout
TINYBOOST is a registered trademark of of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries. All other brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders.
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP9, 1.365x1.315x0.586
CASE 567VH
ISSUE O
DATE 03 NOV 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON78327G
WLCSP9, 1.365x1.315x0.586
PAGE 1 OF 1
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