FAN6862HRTY [ONSEMI]
用于 100 KHz 反激式转换器的 6 引脚绿色模式 PWM 控制器;型号: | FAN6862HRTY |
厂家: | ONSEMI |
描述: | 用于 100 KHz 反激式转换器的 6 引脚绿色模式 PWM 控制器 控制器 开关 光电二极管 转换器 |
文件: | 总17页 (文件大小:872K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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FAN6862H / FAN6862HR
Highly Integrated Green-Mode PWM Controller
Features
Description
A highly integrated PWM controller, FAN6862H(HR)
provides several features to enhance the performance
of flyback converters. To minimize standby power
.
.
.
Low Startup Current: 8µA
Low Operating Current in Green Mode: 2mA
consumption,
a
proprietary Green-Mode function
Peak-Current Mode Operation with Cycle-by-Cycle
Current Limiting
provides off-time modulation to continuously decrease
the switching frequency under light-load conditions.
Under zero-load conditions, the power supply enters
Burst Mode, which completely shuts off PWM output.
Output restarts just before the supply voltage drops
below the UVLO lower limit. This Green-Mode function
enables power supplies to meet international power
conservation requirements.
.
PWM Frequency Continuously Decreasing with
Burst Mode at Light Loads
.
.
.
.
VDD Over-Voltage Protection (OVP)
Constant Output Power Limit (Full AC Input Range)
Internal Latch Circuit (FAN6862H) for OVP, OTP
The FAN6862H(HR) is designed for SMPS and
integrates frequency-hopping function internally, which
helps reduce EMI emission of a power supply with
minimum line filters. The built-in synchronized slope
compensation is proprietary saw-tooth compensation for
constant output power limit over universal AC input
range. The gate output is clamped at 18V to protect the
external MOSFET from over-voltage damage.
Fixed PWM Frequency (100KHz) with Frequency
Hopping
.
.
Feedback Open-Loop Protection with 56ms Delay
Soft Startup Time: 5ms
Applications
Other protection functions include VDD Over-Voltage
Protection (OVP) and Over-Temperature Protection
(OTP). For over-temperature protection, an external
NTC thermistor can be applied to sense the ambient
temperature. When VDD OVP or OTP is activated, an
internal latch circuit latches off the controller.
General-purpose switched-mode power supplies and
flyback power converters, including:
.
.
.
Power Adapters
Open-Frame SMPS
SMPS with Surge-Current Output, such as for
Printers, Scanners, Motor Drivers
Ordering Information
Operating
Temperature
Range
Packing
Method
Part Number
OVP OLP OTP/OTP2
Package
6-Pin, Super Small Outline
Package, SuperSOT™-6
FAN6862HTY
-40 to +105°C
-40 to +105°C
Latch A/R
Latch
Tape & Reel
Tape & Reel
6-Pin, Super Small Outline
Package, SuperSOT™-6
FAN6862HRTY
Auto-Restart (A/R)
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN6862H(HR) • Rev. 2, Feb-2020
Typical Application
Figure 1. Typical Application
Block Diagram
GND
1
FAN6862H
Auto-
VDD
OVP
Recovery
Protection
OLP
VDD-OVP
Soft
Driver
OVP
OTP
Latch-Off
Protection
S
6
GATE
Latch-Off Release
Q
FAN6862HR
R
OLP
OVP
VDD-LH
Auto-
Recovery
Protection
Internal
OTP
BIAS
5
VDD
VLIMIT_RAMP
(Include Soft-Start)
Blanking
Circuit
4
SENSE
UVLO
OSC
Slope
Compensation
5.2V
Green
Mode
Controller
2.5R
16V/8.5V
2
FB
R
FB
OTP1
Debounce
OTP
OLP
Delay
OLP
1V
IRT
4.6V
3
OTP2
Debounce
RT
0.7V
Figure 2. Block Diagram
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
2
Marking Information
ABx:
TT:
ABO: FAN6862HTY
ABP: FAN6862HRTY
Wafer Lot Code
• • • •
ABxTT
- - -
: Year Code
Week Code
_ _ _:
Figure 3. Top Mark
Pin Configuration
Figure 4. Pin Assignments
Pin Definitions
Pin #
Name
Function
Description
1
GND
Ground
Ground
Feedback. The FB pin provides the output voltage regulation signal. It provides
feedback to the internal PWM comparator, so the PWM comparator can control
the duty cycle. This pin also provides OCP: once VFB is larger than the trigger
level and lasts for a long time, the controller stops and restarts.
2
3
4
FB
RT
Feedback
For over-temperature protection, an external NTC thermistor is connected from
Temperature this pin to the GND pin. The impedance of the NTC thermistor decreases at high
Detection
temperatures. Once the voltage of the RT pin drops below a threshold, PWM
output is disabled.
This pin senses the voltage across a resistor. When the voltage reaches the
internal threshold, PWM output is disabled. This activates over-current
protection. This pin also provides current amplitude information for current-mode
control.
SENSE Current Sense
5
6
VDD
Power Supply Power supply
GATE
Driver Output The totem-pole output driver for driving the power MOSFET.
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with
respect to GND pin.
Symbol
VDD
VL
Parameter
Min.
Max.
30
Unit
V
Supply Voltage
Input Voltage to FB, SENSE, RT Pins
Power Dissipation at TA<50°C
-0.3
7.0
V
PD
300
115
+125
+150
+260
4
mW
°C/W
°C
ΘJC
TJ
Thermal Resistance (Junction-to-Case)
Operating Junction Temperature
-40
-55
TSTG
TL
Storage Temperature Range
°C
Lead Temperature, Wave Soldering, 10 Seconds
Human Body Model, JESD22-A114
Charge Device Model, JESD22-C101
°C
ESD
kV
2
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Unit
TA
Operating Ambient Temperature
-40
+105
°C
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
4
Electrical Characteristics
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Conditions Min.
Typ.
Max. Unit
VDD Section
VDD-OP
Continuously Operating Voltage
Turn-On Threshold Voltage
Turn-Off Voltage
24
17
9.5
5
V
V
VDD-ON
15
16
8.5
4
VDD-OFF
VDD-LH
7.5
V
Threshold voltage for Latch-Off release
Startup Current
3
V
IDD-ST
VTH-ON – 0.16V
8
30
μA
With 1nF Load on
Gate, VFB ≥ VFB-N
IDD-OP
IDD-BM
Normal Operating Supply Current
3
4
mA
mA
GATE Open,
VFB = VFB-G
Green Mode Operating Supply Current
2.5
FAN6862H Latch,
VDD-OVP
VDD Over Voltage Protection
FAN6862HR Auto-
Restart
24
25
26
V
tD-VDDOVP
IDD-LH
VDD OVP Debounce Time
Latch-Off Holding Current
30
40
50
65
μs
VDD = 5V
μA
Feedback Input Section
AV
ZFB
Input-Voltage to Current-Sense Attenuation
1/4.0
1/3.5
6
1/3.0
V/V
kΩ
V
Input Impedance
VFBO
VFB-OLP
tD-OLP
FB Pin Open Voltage
5.0
4.3
5.2
4.6
56
5.4
4.9
Threshold Voltage for Open-Loop Protection
Open-Loop Protection Delay
V
ms
Current Sense Section
tPD
Delay to Output
100
360
0.55
0.40
5
250
ns
ns
V
tLEB
Leading-Edge Blanking Time
270
0.52
0.37
4
VSTHFL
VSTHVA
Flat Threshold Voltage for Current Limit
Valley Threshold Voltage for Current Limit
Duty>51%
Duty = 0%
Startup Time
0.58
0.43
6
V
tSOFT-START Period During Startup
ms
Oscillator Section
Center Frequency
Hopping Range
Hopping Range(1)
V
FB > VFB-N
95.5
100.0
±6.5
104.5
±5.9
±7.3
VFB ≥ VFB-N
fOSC
Normal PWM Frequency
kHz
±2.9
VFB = VFB-G
thop-1
thop-3
Hopping Period 1(1)
Hopping Period 3(1)
4.4
11.5
25
ms
ms
VFB ≥ VFB-N
VFB = VFB-G
fOSC-G
Green Mode Minimum Frequency
23
2.4
1.9
27
2.8
2.3
kHz
FB Threshold Voltage For Frequency
Reduction
VFB-N
2.6
V
VFB-G
VFB-ZDC
fDV
FB Voltage at fOSC-G
2.1
1.7
V
V
FB Threshold Voltage for Zero Duty
Frequency Variation vs. VDD Deviation
VDD = 11.5V to 20V
TA = -40 to +105°C
0.02
%
Frequency Variation vs. Temperature
Deviation
fDT
2
%
Continued on following page…
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
5
Electrical Characteristics (Continued)
VDD = 15V, TA = 25°C, unless noted.
Symbol
Parameter
Test Conditions Min.
Typ.
Max. Unit
PWM Output Section
DCYMAX
VOL
Maximum Duty Cycle
Output Voltage Low
60
65
70
%
V
VDD = 15V,
IO = 50mA
1.5
VDD = 8V,
IO = 50mA
VOH
Output Voltage High
6
V
tR
tF
Rising Time
GATE = 1nF
GATE = 1nF
150
35
200
80
ns
ns
V
Falling Time
VCLAMP
Gate Output Clamping Voltage
VDD = 20V
15.0
16.5
18.0
Over-Temperature Protection (OTP) Section
IRT
Output Current of RT Pin
92
0.97
15
100
108
1.07
19
μA
FAN6862H Latch,
FAN6862HR Auto-
Restart
Threshold Voltage for Over-Temperature
Protection
VOTP
1.00
V
VFB = VFB-N
17
51
tDOTP
Over-Temperature Debounce Time
ms
(1)
VFB = VFB-G
FAN6862H Latch,
FAN6862HR Auto-
Restart
2nd Threshold Voltage for Over-Temperature
Protection
VOTP2
0.65
80
0.70
200
0.75
250
V
tDOTP2
Note:
2nd Over-Temperature Debounce Time
μs
1. Guarantee by design.
Figure 5. PWM Frequency
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
6
Typical Performance Characteristics
Figure 6. Turn-On Threshold Voltage (VDD-ON
)
Figure 7. Turn-Off Threshold Voltage (VDD-OFF
)
vs. Temperature
vs. Temperature
Figure 8. Operating Current (IDD-OP) vs. Temperature
Figure 9. VDD Over-Voltage Protection (VDD-OVP
vs. Temperature
)
Figure 10. Center Frequency (fOSC) vs. Temperature
Figure 11. FB Threshold Voltage for Frequency
Reduction (VFB-N) vs. Temperature
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
7
Typical Performance Characteristics (Continued)
Figure 12. FB Voltage at fOSC-G (VFB-G) vs. Temperature
Figure 13. Threshold Voltage for Open-Loop
Protection (VFB-OLP) vs. Temperature
Figure 14. Open-Loop Protection Delay (tD-OLP
vs. Temperature
)
Figure 15. Flat Threshold Voltage for Current Limit
(VSTHFL) vs. Temperature
Figure 16. Valley Threshold Voltage for Current Limit Figure 17. GATE Output Clamping Voltage (VCLAMP
(VSTHVA) vs. Temperature vs. Temperature
)
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
8
Typical Performance Characteristics (Continued)
Figure 18. Maximum Duty Cycle (DCYMAX
vs. Temperature
)
Figure 19. Rising Time (tR) vs. Temperature
Figure 20. Falling Time (tF) vs. Temperature
Figure 21. Output Current of RT Pin (IRT
)
vs. Temperature
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
9
Operation Description
Startup Operation
Figure 22 shows a typical startup circuit and transformer
auxiliary winding for a FAN6862H(HR) application.
Before FAN6862H(HR) begins switching, it consumes
only startup current (typically 8µA) and the current
supplied through the startup resistor charges the VDD
capacitor (CDD). When VDD reaches a turn-on voltage of
16V (VDD-ON), switching begins and the current
consumed increases to 2mA. Then, the power required
is supplied from the transformer auxiliary winding. The
large hysteresis of VDD (8.5V) provides more holdup
time, which allows using a small capacitor for VDD. The
startup resistor is typically connected to the AC line for a
fast reset of latch protection.
Figure 23. PWM Frequency
Figure 22. Startup Circuit
Figure 24. Burst-Mode Operation
Green-Mode Operation
The FAN6862H(HR) uses feedback voltage (VFB) as an
indicator of the output load and modulates the PWM
frequency, as shown in Figure 23, such that the
switching frequency decreases as load decreases. In
heavy-load conditions, the switching frequency is
65KHz. Once VFB decreases below VFB-N (2.6V), the
PWM frequency starts to linearly decrease from 100KHz
to 25kHz to reduce the switching losses. As VFB
decreases below VFB-G (2.1V), the switching frequency is
fixed at 25kHz and FAN6862H(HR) enters “deep” Green
Mode, where the operating current decreases to 2.5mA
(maximum), further reducing the standby power
consumption. As VFB decreases below VFB-ZDC (1.7V),
FAN6862H(HR) enters Burst Mode. When VFB drops
below VFB-ZDC, FAN6862H(HR) stops switching and the
output voltage starts to drop, which causes the feedback
voltage to rise. Once VFB rises above VFB-ZDC, switching
resumes. Burst Mode alternately enables and disables
switching, reducing switching loss in standby mode, as
shown in Figure 24.
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. An internal frequency hopping circuit changes
the switching frequency between 93.5kHz and 106.5kHz
with a period of 4.4ms, as shown in Figure 25.
Figure 25. Frequency Hopping
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
10
Protections
cycle when the sensing voltage of MOSFET drain
current reaches the threshold. The other threshold is for
the over-current protection, which shuts down the
MOSFET gate when the sensing voltage of MOSFET
drain current is above the threshold longer than the
shutdown delay (56ms).
Self-protective functions include VDD Over-Voltage
Protection (OVP), Open-Loop / Overload Protection
(OLP), Over-Current Protection (OCP), Short-Circuit
Protection (SCP), and Over-Temperature Protection
(OTP). OLP, OCP, and SCP are Auto-Restart Mode
protections; OVP and OTP are Latch-Mode protections.
In FAN6862HR, all of these protections are applied with
Auto-Restart Mode.
Open-Loop / Overload Protection (OLP)
When the upper branch of the voltage divider for the
shunt regulator (KA431 shown in Figure 27) is broken,
no current flows through the opto-coupler transistor,
which pulls up the feedback voltage to 5.2V.
Auto-Restart Mode Protections
Once
terminated and the MOSFET remains off. This causes
DD to fall because no more power is delivered from the
a fault condition is detected, switching is
V
When feedback voltage is above 4.6V for longer than
56ms, OLP is triggered. This protection is also triggered
when the SMPS output drops below the nominal value
for longer than 56ms due to the overload condition.
auxiliary winding. When VDD falls to VDD-OFF (8.5V), the
protection is reset and the operating current reduces to
startup current, which causes VDD to rise.
FAN6862H(HR) resumes normal operation when VDD
reaches VDD-ON (16V). In this manner, the auto-restart
can alternately enable and disable MOSFET switching
until the fault condition is eliminated (see Figure 26).
Figure 27. OLP Operation
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents IC damage caused
by over voltage on the VDD pin. The OVP is triggered
when VDD reaches 25V. A debounce time (typically
30µs) prevents false triggering by switching noise.
Figure 26. Auto-Restart Operation
Latch-Mode Protections
Once this protection is triggered, switching is terminated
and the MOSFET remains off. The latch is reset only
when VDD is discharged below 4V by unplugging the
AC power line.
Over-Temperature Protection (OTP)
The OTP circuit is composed of current source and
voltage comparators. Typically, an NTC thermistor is
connected between the RT and GND pins. If the voltage
of this pin drops below a threshold of 1.0V, PWM output
is disabled after tDOTP debounce time. If this pin drops
below 0.7V, it triggers the latch-off protection
immediately after tDOTP2 debounce time.
Over-Current Protection (OCP)
FAN6862H(HR) has two over-current protection
thresholds. One is for pulse-by-pulse current limit, which
turns off MOSFET for the remainder of the switching
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
11
Typical Application Circuit (Netbook Adapter by Flyback)
Application
Fairchild Devices
Input Voltage Range
Output
Netbook Adapter
FAN6862H(HR)
90~265VAC
19V / 2.1A (40W)
Features
.
.
.
High efficiency (>85.3% at full-load condition), meeting EPS regulation with enough margin
Low standby (pin<0.15W at no-load condition)
Soft-start time: 5ms
230VAC 50Hz (87% avg.)
115VAC 60Hz (87.2% avg.)
85.29% (Energy Star V2.0)
Figure 28. Measured Efficiency and Power Saving
Figure 29. Schematic of Typical Application Circuit
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
12
Transformer Specification
.
.
Core: RM 8
Bobbin: RM 8
1
2
Primary Winding II
nd Shield
2
11
Fly+
Fly-
Secondary
Winding
1st Shield
11
2
3
Primary Winding I
10
11
Auxiliary Winding
BOBBIN
Figure 30. Transformer
Terminal
Insulation
Barrier
Primary Secondary
NO
Wire
Ts
S
11
3
F
10
2
Ts
3
N1
N2
0.37 • 1
0.37 • 1
7
22
1.2
8
1
11
Fly-
11
2
COPPER SHIELD
0.75 • 2
3
N3
N4
Fly+
1
1
COPPER SHIELD
0.37 • 1
1.2
22
3
4
CORE ROUNDING TAPE
3
Pin
3-1
3-1
Specification
Remark
Primary-Side Inductance
610µH ±5%
100kHz, 1V
Primary-Side Effective Leakage
15µH Maximum Short One of the Secondary Windings
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
13
Physical Dimensions
Figure 31. 6-Pin, SuperSOT™6, JEDEC MO-193, 1.6mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
© 2010 Fairchild Semiconductor Corporation
FAN6862H(HR) • Rev. 2, Feb-2020
www.fairchildsemi.com
14
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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