FAN7080M-GF085 概述
Half Bridge Gate Driver MOSFET 驱动器
FAN7080M-GF085 规格参数
是否无铅: | 不含铅 | 生命周期: | Active |
包装说明: | SOP, SOP8,.25 | Reach Compliance Code: | unknown |
风险等级: | 5.7 | JESD-30 代码: | R-PDSO-G8 |
端子数量: | 8 | 最高工作温度: | 125 °C |
最低工作温度: | -40 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装等效代码: | SOP8,.25 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
电源: | 15 V | 认证状态: | Not Qualified |
筛选级别: | AEC-Q100 | 子类别: | MOSFET Drivers |
标称供电电压: | 15 V | 表面贴装: | YES |
温度等级: | AUTOMOTIVE | 端子形式: | GULL WING |
端子节距: | 1.27 mm | 端子位置: | DUAL |
Base Number Matches: | 1 |
FAN7080M-GF085 数据手册
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PDF下载FAN7080-GF085
Half Bridge Gate Driver
Description
Features
The FAN7080-GF085 is a half-bridge gate drive IC w ith
reset input and adjustable dead time control. It is
designed for high voltage and high speed driving of
MOSFET or IGBT, w hich operates up to 600 V. ON
Semiconductor's high-voltage process and common-
mode noise cancellation technique provide stable
operation in the high side driver under high-dV/dt noise
circumstances. An advanced level-shift circuit allow s
high-side gate driver operation up to VS=-5 V (typical) at
VBS=15 V. Logic input is compatible w ith standard
CMOS outputs. The UVLO circuits for both channels
prevent from malfunction w hen VCC and VBS are low er
than the specified threshold voltage. Combined pin
function for dead time adjustment and reset shutdow n
make this IC packaged w ith space saving SOIC-8
Package. Minimum source and sink current capability of
output driver is 250 mA and 500 mA respectively, w hich
is suitable for junction box application and half and full
bridge application in the motor drive system.
.
.
.
.
.
.
.
.
.
Automotive Qualified to AEC Q100
Floating Channel for Bootstrap Operation to +600 V
Tolerance to Negative Transient Voltage on VS Pin
VS-pin dv/dt Immune
Gate Drive Supply Range from 5.5 V to 20 V
Under-Voltage Lockout (UVLO)
CMOS Schmitt-triggered Inputs w ith Pull-dow n
High Side Output In-phase w ith Input
IN input is 3.3 V/5 V Logic Compatible and
Available on 15 V Input
.
.
Matched Propagation Delay for both Channels
Dead Time Adjustable
Applications
.
.
Junction Box
Half and full bridge application in the motor drive
system Related Product Resources
Figure 1.
8-Lead, SOIC, Narrow Body
Ordering Information
Operating
Temperature Range
Part Number
Package
Packing Method
FAN7080M-GF085
Tube
8-Lead, Small Outline Integrated Circuit (SOIC),
JEDEC MS-012, .150 inch Narrow Body
-40°C ~ 125°C
FAN7080MX-
GF085
Tape & Reel
© 2012 Semiconductor Components Industries, LLC.
September-2017, Rev.2
Publication Order Number:
FAN7080-GF085/D
Typical Application
Up to 600V
VCC
1
2
8
7
VB
VCC
IN
IN
HO
To Load
R1
VDT
3
4
6
5
VS
LO
SD/DT
COM
SHUTDOWN
/DEAD TIME
R2
VDT = Vdd*R2 / (R1+R2). Vdd is output voltage of Microcontroller.
The operating range that allows a VDT range of 1.2~3.3V.
When pulled lower than VDT [Typ. 0.5V] the device is shutdown.
Care must be taken to avoid below threshold spikes on pin 3 that can cause undesired shut down of the IC.
For this reason the connection of the components between pin 3 and ground has to be as short as possible.
And a capacitor (Typ. 0.02µF )between pin3 and COM can prevent this spike. This pin can not be left
floating for the same reason.
Figure 2.
Typical Application
Block Diagram
VCC
VB
UVLO
R
R
S
vreg
Q
HO
VS
PULSE
FILTER
PULSE
GENERATOR
IN
DEADTIME
CONTROL
500kΩ
vreg
VCC
VCC
UVLO
SD/DT
LO
DELAY
500kΩ
COM
Figure 3.
Block Diagram
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2
Pin Configuration
1
2
8
7
VB
VCC
IN
HO
3
4
6
5
VS
LO
SD/DT
COM
Figure 4.
Pin Assignment (Top Through View)
Pin Descriptions
Pin # Name
I/O
Pin Function Description
1
2
3
4
5
6
7
8
VCC
IN
P
I
Driver Supply Voltage
Logic input for high and low side gate drive output
Shutdow n Input and dead time setting
Ground
/SD/DT
COM
LO
I
P
A
A
A
P
Low side gate drive output for MOSFET Gate connection
High side floating offset for MOSFET Source connection
High side drive output for MOSFET Gate connection
Driver Output Stage Supply
VS
HO
VB
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3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VS
Parameter
Min.
VB-25
-0.3
Max.
VB+0.3
625
Unit
V
High-Side Floating Offset Voltage
VB
High-Side Floating Supply Voltage
High-Side Floating Output Voltage
Low -Side Floating Output Voltage
Supply Voltage
V
VHO
VLO
VS-0.3
-0.3
VB+0.3
Vcc+0.3
25
V
V
VCC
VIN
-0.3
V
Input Voltage f or IN
-0.3
VCC+0.3
+1
V
(1)
I
IN
Input Injection Current
mA
W
(2.3)
PD
θJA
TJ
Pow er Dissipation
0.625
200
(2)
Thermal Resistance, Junction to Ambient
Junction Temperature
°C/W
°C
°C
150
TSTG
Storage Temperature
-55
150
Human Body Model (HBM)
Charge Device Model (CDM)
1000
500
ESD
V
Notes:
1. Guaranteed by design. Full function, no latchup. Tested at 10 V and 17 V.
2. The Thermal Resistance and pow er dissipation rating are measured per below conditions:
JESD51-2: Integral circuits thermal test method environmental conditions, natural convection/Still Air
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.
3. Do not exceed pow er dissipation (PD) under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance. ON Semiconductor does not recommend
exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Unit
(4)
VB
High-Side Floating Supply Voltage (DC) Transient: -10 V at 0.1 µS
VS+6
VS+20
V
High-Side Floating Supply Offset Voltage (DC)
Transient: -25 V(max.) at 0.1 µS at VBS < 25 V
VS
-5
600
V
VHO
VLO
VCC
VIN
High-Side Output Voltage
Low -Side Output Voltage
Supply Voltage for Logic Input
Logic Input Voltage
VS
0
VB
VCC
20
V
V
5.5
0
V
VCC
50
V
(5)
dv/dt
TPULSE
FS
Allow able Offset Voltage Slew Rate
V/nS
nS
KHz
°C
(5,6)
Minimum Pulse Width
1100
-40
(6)
Sw itching Frequency
200
125
TA
Operating Ambient Temperature
Notes:
4. The VS offset is tested w ith all supplies based at 15 V differential
5. Guaranteed by design.
6. When VDT = 1.2 V. Refer to Figures 5, 6, 7 and 8.
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4
Electrical Characteristics
Unless otherw ise specified -40°C ≤ TA ≤ 125°C, VCC = 15 V, VBS=15 V, VS = 0 V, CL =1 nF
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
VCC and VBS Supply Characteristics
VCCUV+ VCC and VBS Supply Under-Voltage
VBSUV+ Positive going Threshold
4.2
3.6
0.6
5.5
V
V
V
VCCUV- VCC and VBS Supply Under-Voltage
VBSUV- Negative going Threshold
2.8
0.2
VCCUVH
VCC and VBS Supply Under-Voltage
VBSUVH Hysteresis
VCC: 6 V2.5 V or 2.5 V6 V
VBS: 6 V2.5 V or 2.5 V6 V
VB = VS = 600 V
0.5
0.5
20
20
tDUVCC
tDUVBS
Under-Voltage Lockout Response Time
µs
ILK
Offset Supply Leakage Current
Quiescent VBS Supply Current
Quiescent VCC Supply Current
20
75
50
µA
µA
µA
IQBS
IQCC
VIN = 0 or 5 V, VSDT = 1.2 V
VIN = 0 or 5 V, VSDT = 1.2 V
20
150
1000
350
Input Characteristics
VIH
VIL
High Logic level Input Voltage
2.7
V
V
Low Logic Level Input Voltage
Logic Input High Bias Current
Logic Input Low Bias Current
VDT Dead Time Setting Range
VSD Shutdow n Threshold Voltage
0.8
50
I
VIN = 5 V
VIN = 0 V
10
0
µA
IN+
I
IN-
2
µA
V
VDT
VSD
1.2
5.0
1.2
1100
0.8
V
RSDT
High Logic Level Resistance for /SD /DT VSDT = 5 V
100
500
kΩ
Low Logic Level Input bias Current for
VSDT = 0 V
ISDT-
1
2
µA
/SD /DT
Output Characteristics
VOH(HO) High Level Output Voltage (VCC - VHO
VOL(HO) Low Level Output Voltage (VHO
IO+(HO) Output High, Short-Circuit Pulse Current
)
IO = 0
IO = 0
0.1
0.1
V
V
)
250
500
300
600
mA
mA
IO-(HO)
ROP(HO)
RON(HO)
Output Low , Short-Circuit Pulse Current
60
30
Equivalent Output Resistance
Ω
VOH(LO) High Level Output Voltage (VB – VLO
)
IO = 0
IO = 0
0.1
0.1
V
V
VOL(LO) Low Level Output Voltage (VLO
)
IO+(LO)
IO-(LO)
ROP(LO)
RON(LO)
Output High, Short-Circuit Pulse Current
Output Low , Short-Circuit Pulse Current
250
500
mA
mA
60
30
Equivalent Output Resistance
Ω
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5
Dynamic Electrical Characteristics
Unless otherw ise specified -40°C ≤ TA ≤ 125°C, VCC = 15 V, VBS=15 V, VS = 0 V, CL =1 nF
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
tON
tOFF
tR
Turn-On Propagation Delay(7)
Turn-Off Propagation Delay
Turn-On Rise Time
VS=0 V
VS=0 V
750
130
40
1500
250
150
400
ns
ns
ns
ns
tF
Turn-Off Fall Time
25
V
IN = 0 or 5 V at VDT = 1.2 V
250
650
1200
2600
Dead Time, LS Turn-off to HS Turn-on
and HS Turn-on to LS Turn-off
DT
ns
VIN = 0 or 5 V at VDT = 1.2 V 1600
2100
35
DT1 – DT2 at VDT = 1.2 V
DT1 – DT2 at VDT = 3.3 V
VDT = 1.2 V
110
300
110
60
MDT
Dead Time Matching Time
ns
MTON
Delay Matching, HS and LS Turn-on
25
15
ns
ns
ns
MTOFF Delay Matching, HS and LS Turn-off
VDT = 1.2 V
tSD
Shutdow n Propagation Delay
180
330
200
200
FS1
FS2
VCC = VBS = 20 V
VCC = VBS = 5.5 V
Sw itching Frequency
Khz
Notes:
7. tON includes DT
Typical Waveforms
Figure 5.
Short Pulse Width Test Circuit and Pulse Width Waveform
Figure 6.
Abnormal Output Waveform with Pulse
Width
Figure 7.
Recommendation of Pulse width Output
Waveform
Figure 8.
Pulse Width vs. VDT
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6
Typical Performance Characteristics
IN
SD/DT
HO
LO
Figure 9.
Input/Output Timing Diagram
Figure 10. Dead Time vs. VDT
(VCC=VBS=15 V, -40°C < TJ < 125°C)
SD
50%
tsd
90%
HO
LO
Figure 11. Switching Time Waveform Definitions
Figure 12. Shutdown Waveform Definitions
PWM(LO)
50%
50%
PWM(HO)
LO
HO
10%
MTON
MTOFF
HO
90%
LO
Figure 13. Delay Matching Waveform Definitions
Figure 14. Dead Time Waveform Definitions
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7
Typical Performance Characteristics
Figure 15. Turn-on Delay Time of HO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 16. Turn-on Delay Time of HO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
Figure 17. Turn-on Delay Time of LO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 18. Turn-on Delay Time of LO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
Figure 19. Turn-off Delay Time of HO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 20. Turn-off Delay Time of HO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
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8
Typical Performance Characteristics
Figure 21. Turn-off Delay Time of LO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 22. Turn-off Delay Time of LO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
Figure 23. Turn-on Rise Time of HO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 24. Turn-on Rise Time of HO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
Figure 25. Turn-on Rise Time of LO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 26. Turn-on Rise Time of LO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
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9
Typical Performance Characteristics
Figure 27. Turn-off Fall Time of HO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 28. Turn-off Fall Time of HO vs. VBS Supply
Voltage (VCC=15 V, CL=1 nF, TA=25°C)
Figure 29. Turn-off Fall Time of LO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 30. Turn-off Fall Time of LO vs.
Temperature (VCC=VBS=15 V, CL=1 nF)
Figure 31. Logic Low Input Voltage vs.
Temperature
Figure 32. Logic High Input Voltage vs.
Temperature
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10
Typical Performance Characteristics
Figure 33. High Level Output of HO vs.
Temperature (VCC=VBS=15 V)
Figure 34. High Level Output of HO vs. VBS Supply
Voltage (VCC=15 V, TA=25°C)
Figure 35. High Level Output of LO vs.
Temperature (VCC=VBS=15 V)
Figure 36. High Level Output of LO vs. VBS Supply
Voltage (VCC=15 V, TA=25°C)
Figure 37. Low Level Output of HO vs.
Temperature (VCC=VBS=15 V)
Figure 38. Low Level Output of HO vs. VBS Supply
Voltage (VCC=15 V, TA=25°C)
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11
Typical Performance Characteristics
Figure 39. Low Level Output of LO vs.
Temperature (VCC=VBS=15 V)
Figure 40. Low Level Output of LO vs. VCC Supply
Voltage (VCC=15 V, TA=25°C)
Figure 41. Offset Supply Leakage Current vs.
Temperature (VCC=VBS=600 V)
Figure 42. Offset Supply Leakage Current vs.
VB Boost Voltage(VCC=15 V, TA=25°C)
Figure 43. VBS Supply Current vs.
Temperature (VBS=15 V)
Figure 44. VCC Supply Current vs.
Temperature (VCC=15 V)
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12
Typical Performance Characteristics
Figure 45. Logic High Input Current vs.
Temperature (VIN=5 V)
Figure 46. Logic Low Input Current vs.
Temperature (VIN=5 V)
Figure 47. VCC Under-Voltage Threshold (+) vs.
Temperature
Figure 48. VCC Under-Voltage Threshold (-) vs.
Temperature
Figure 49. VBS Under-Voltage Threshold (+) vs.
Temperature
Figure 50. VBS Under-Voltage Threshold (-) vs.
Temperature
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13
Typical Performance Characteristics
Figure 51. Output Source Current of HO vs.
Temperature (VCC=VBS=15 V)
Figure 52. Output Sink Current of HO vs.
Temperature (VCC=VBS=15 V
Figure 53. Output Source Current of LO vs.
Temperature (VCC=VBS=15 V)
Figure 54. Output Sink Current of LO vs.
Temperature (VCC=VBS=15 V
Figure 55. Logic Low Input Current of SD/DT vs.
Temperature
Figure 56. Shutdown Threshold Voltage vs.
Temperature
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14
Typical Performance Characteristics
Figure 57. Deadtime vs. Temperature
(VCC=VBS=15 V, VDT=1.2 V)
Figure 58. Deadtime Matching Time vs.
Temperature (VCC=VBS=15 V, VDT=1.2 V)
Figure 59. Turn-on Delay Matching vs. Temperature
(VCC=VBS=15 V, VDT=1.2 V)
Figure 60. Turn-off Delay Matching vs.
Temperature (VCC=VBS=15 V, VDT=1.2 V)
Figure 61. Shutdown Propagation Delay vs.
Temperature
Figure 62. Maximum vs. Negative Offset Voltage
vs. Temperature (VCC=VBS=15 V)
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15
Physical Dimensions
A
4.90±0.10
0.65
(0.635)
8
5
B
1.75
6.00±0.20
5.60
3.90±0.10
1
4
PIN ONE
INDICATOR
1.27
1.27
LAND PATTERN RECOMMENDATION
0.25
C B A
SEE DETAIL A
0.175±0.075
0.22±0.03
C
1.75 MAX
0.10
0.42±0.09
(0.86)
OPTION A - BEVEL EDGE
x 45°
R0.10
R0.10
GAGE PLANE
OPTION B - NO BEVEL EDGE
0.36
NOTES:
8°
0°
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
SEATING PLANE
0.65±0.25
(1.04)
D) LANDPATTERN STANDARD: SOIC127P600X175-8M
E) DRAWING FILENAME: M08Arev16
DETAIL A
SCALE: 2:1
8-Lead, Small Outline Integrated Circuit (SOIC), JEDEC M S-012, .150 inch Narrow Body
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16
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