FCH040N65S3-F155 [ONSEMI]
N 沟道 SuperFET® III MOSFET;
| 型号： | FCH040N65S3-F155 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道 SuperFET® III MOSFET 局域网 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：511K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FCH040N65S3
MOSFET – Power,
N-Channel, SUPERFET) III,
Easy Drive
650 V, 65 A, 40 mW
www.onsemi.com
Description
SUPERFET III MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provides superior switching performance, and
withstand extreme dv/dt rate.
V
R
MAX
I MAX
D
DSS
DS(ON)
650 V
40 mW @ 10 V
65 A
D
Consequently, SUPERFET III MOSFET Easy drive series helps
manage EMI issues and allows for easier design implementation.
Features
G
• 700 V @ T = 150°C
J
• Typ. R
= 35.4 mW
DS(on)
S
• Ultra Low Gate Charge (Typ. Q = 136 nC)
g
POWER MOSFET
• Low Effective Output Capacitance (Typ. C
= 1154 pF)
oss(eff.)
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant
Applications
• Telecom / Server Power Supplies
• Industrial Power Supplies
• UPS / Solar
G
D
S
TO−247 LONG LEADS
CASE 340CH
MARKING DIAGRAM
$Y&Z&3&K
FCH
040N65S3
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
FCH040N65S3
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
August, 2019 − Rev. 5
FCH040N65S3/D
FCH040N65S3
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Symbol
Parameter
FCH040N65S3−F155
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
650
30
− DC
V
− AC (f > 1 Hz)
30
I
D
Drain Current
− Continuous (T = 25°C)
65
A
C
− Continuous (T = 100°C)
41
C
I
Drain Current
− Pulsed (Note 1)
162.5
358
A
mJ
A
DM
E
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 2)
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
AS
AS
I
8.1
E
4.17
100
mJ
V/ns
AR
dv/dt
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
20
P
(T = 25°C)
417
W
W/°C
°C
D
C
− Derate Above 25°C
3.33
−55 to +150
300
T , T
Operating and Storage Temperature Range
J
STG
T
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse width limited by maximum junction temperature.
2. I = 8.1 A, R = 25 W, starting T = 25°C.
AS
G
J
3. I ≤ 32.5 A, di/dt ≤ 200 A/ms, V ≤ 400 V, starting T = 25°C.
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
FCH040N65S3−F155
Unit
R
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
0.3
40
_C/W
q
JC
JA
R
q
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Reel Size
N/A
Tape Width
Quantity
FCH040N65S3−F155
FCH040N65S3
TO−247 G03
Tube
N/A
30 Units
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
650
700
−
−
−
−
−
−
V
V
V
V
I
= 0 V, I = 1 mA, T = 25_C
DSS
GS
D
J
= 0 V, I = 1 mA, T = 150_C
GS
D
J
DBV
/ DT
Breakdown Voltage Temperature
Coefficient
= 1 mA, Referenced to 25_C
0.64
V/_C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 650 V, V = 0 V
−
−
−
−
4.5
−
1
mA
DSS
GS
= 520 V, T = 125_C
−
C
I
Gate to Body Leakage Current
=
30 V, V = 0 V
100
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 1.7 mA
2.5
−
−
4.5
40
−
V
mW
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 32.5 A
35.4
46
D
g
FS
= 20 V, I = 32.5 A
−
D
www.onsemi.com
2
FCH040N65S3
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 400 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
4740
120
1154
171
136
33
−
−
−
−
−
−
−
−
pF
pF
pF
pF
nC
nC
nC
W
iss
DS
GS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
Total Gate Charge at 10 V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
V
DS
V
DS
V
DS
= 0 V to 400 V, V = 0 V
GS
oss(eff.)
C
= 0 V to 400 V, V = 0 V
GS
oss(er.)
Q
= 400 V, I = 32.5 A, V = 10 V
D GS
g(tot)
(Note 4)
Q
gs
gd
Q
59
ESR
f = 1 MHz
0.7
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V
V
= 400 V, I = 32.5 A,
−
−
−
−
35
51
95
30
−
−
−
−
ns
ns
ns
ns
d(on)
DD
GS
D
= 10 V, R = 3.3 W
g
t
r
(Note 4)
t
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
−
−
−
−
−
−
−
65
162.5
1.2
−
A
A
S
I
SM
V
SD
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 32.5 A
−
V
GS
SD
t
rr
= 0 V, I = 32.5 A,
534
13.6
ns
mC
GS
SD
dI /dt = 100 A/ms
F
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
TYPICAL PERFORMANCE CHARACTERISTICS
300
100
200
100
V
GS
=10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
150°C
25°C
10
1
10
1
−55°C
250 ms Pulse Test
= 25°C
V
= 20 V
DS
T
C
250 ms Pulse Test
0.2
1
10
20
3
4
V
5
6
7
8
9
V
DS
, Drain−Source Voltage (V)
, Gate−Source Voltage (V)
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
www.onsemi.com
3
FCH040N65S3
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
0.06
0.05
1000
100
10
150°C
0.04
0.03
0.02
V
= 10 V
GS
1
0.1
V
GS
= 20 V
25°C
0.01
0.001
V
GS
= 0 V
250 ms Pulse Test
T
C
= 25°C
0.01
0.0
0.5
1.0
1.5
0
60
120
180
V
SD
, Body Diode Forward Voltage (V)
I , Drain Current (A)
D
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 3. On−Resistance Variation vs.
Drain Current and Gate Voltage
105
104
103
102
101
100
10−1
10
8
C
C
iss
V
DS
= 130 V
6
V
DS
= 400 V
oss
4
V
= 0 V
GS
f = 1 MHz
C
rss
2
C
C
C
10−1
= C + C (C = shorted)
iss
gs gd ds
= C + C
oss
rss
ds
gd
I
D
= 32.5 A
= C
gd
0
1
10
102
103
0
50
100
150
Q , Total Gate Charge (nC)
V
DS
, Drain−Source Voltage (V)
g
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
1.2
1.1
1.0
0.9
0.8
3.0
2.5
2.0
1.5
V
= 0 V
= 10 mA
GS
I
D
1.0
0.5
0.0
V
= 10 V
= 32.5 A
GS
I
D
−50
50
100
150
0
−50
0
50
100 150
T , Junction Temperature (5C)
T , Junction Temperature (5C)
J
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On−Resistance Variation
vs. Temperature
www.onsemi.com
4
FCH040N65S3
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
200
100
80
30 ms
100 ms
1 ms
60
DC
10
1
10 ms
Operation in this Area
40
is Limited by R
DS(on)
20
0
0.1
T
= 25°C
C
T = 150°C
J
Single Pulse
0.01
150
1
10
100
1000
25
50
75
100
125
T , Case Temperature (5C)
V
DS
, Drain−Source Voltage (V)
C
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
30
25
20
15
10
5
0
0
130
DS
260
390
520
650
V
, Drain to Source Voltage (V)
Figure 11. EOSS vs. Drain to Source Voltage
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.5
0.2
P
DM
0.1
0.1
0.01
0.05
0.02
0.01
t
1
t
2
Z
q
(t) = r(t) x R
q
JC
JC
R
= 0.3°C/W
q
JC
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
q
JC C
J
DM
SINGLE PULSE
1
2
0.001
−4
−3
−2
−1
0
1
10−5
10
10
10
10
10
10
t, Rectangular Pulse Duration (sec)
Figure 12. Transient Thermal Response Curve
www.onsemi.com
5
FCH040N65S3
V
GS
R
Q
g
L
V
DS
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
t
d(off)
t
r
t
f
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
EAS
+
@ LIAS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
www.onsemi.com
6
FCH040N65S3
+
DUT
V
DS
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
www.onsemi.com
7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD
CASE 340CH
ISSUE A
DATE 09 OCT 2019
GENERIC
MARKING DIAGRAM*
XXXXXXXXX
AYWWG
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
WW = Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13853G
TO−247−3LD
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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