FDB0300N1007L [ONSEMI]
N 沟道，PowerTrench® MOSFET，100V，200A，3mΩ;
| 型号： | FDB0300N1007L |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，100V，200A，3mΩ |
| 文件： | 总8页 (文件大小：403K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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March 2016
FDB0300N1007L
N-Channel PowerTrench MOSFET
100 V, 200 A, 3 mΩ
®
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advance PowerTrench® process that has
been especially tailored to minimize the on-state resistance
while maintaining superior ruggedness and switching
performance for industrial applications.
Max rDS(on) = 3 mΩ at VGS = 10 V, ID = 26 A
Max rDS(on) = 4.5 mΩ at VGS = 6 V, ID = 20 A
Fast Switching Speed
Low Gate Charge
Applications
High Performance Trench Technology for Extremely Low
Industrial Motor Drive
Industrial Power Supply
Industrial Automation
Battery Operated tools
Battery Protection
Solar Inverters
RDS(on)
High Power and Current Handling Capability
RoHS Compliant
UPS and Energy Inverters
Energy Storage
Load Switch
D(Pin4, tab)
1. Gate
4
2. Source/Kelvin Sense
3. Source/Kelvin Sense
4. Drain
5. Source
6. Source
G
(Pin1)
1
7. Source
2
3
5
6
7
D2-PAK
(TO263)
S(Pin2,3,5,6,7)
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted.
Symbol
VDS
VGS
Parameter
Ratings
100
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
V
V
±20
TC = 25°C
(Note 5)
(Note 5)
(Note 4)
(Note 3)
200
ID
TC = 100°C
140
A
-Pulsed
1090
843
EAS
Single Pulse Avalanche Energy
Power Dissipation
mJ
W
TC = 25°C
TA = 25°C
250
PD
Power Dissipation
(Note 1a)
3.8
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +175
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
(Note 1)
0.6
40
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
330 mm
Tape Width
24 mm
Quantity
FDB0300N1007L
FDB0300N1007L
D2-PAK-7L
800 units
1
www.fairchildsemi.com
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
100
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
57
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 80 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics (Note 2)
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
2
2.7
-12
4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
mV/°C
V
GS = 10 V, ID = 26 A
2.4
3.4
4.9
85
3
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 6 V, ID = 20 A
4.5
11
mΩ
VGS = 10 V, ID = 26 A, TJ = 150°C
VDS = 10 V, ID = 26 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
5925
1220
42
8295
1710
60
pF
pF
pF
Ω
VDS = 50 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
2.7
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
28
29
52
18
81
44
24
16
45
46
ns
ns
ns
ns
nC
VDD = 50 V, ID = 26 A,
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
83
32
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 5 V
113
62
Qg
VDD = 50 V,
D = 26 A
I
Qgs
Qgd
nC
nC
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
200
1090
1.2
A
A
ISM
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = 26 A
(Note 2)
0.8
84
V
134
205
ns
nC
IF = 26 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
128
Notes:
1. R
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θJA
θJC
is guaranteed by design while R
is determined by the user's board design.
θCA
2
a) 40 °C/W when mounted on a 1 in pad of 2 oz copper.
b) 62.5 °C/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. E of 843 mJ is based on starting T = 25 °C, L = 0.3 mH, I = 75 A, V = 90 V, V = 10 V. 100% test at L = 0.1 mH, I = 108 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Figure “Forward Bias Safe Operating Area” for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
www.fairchildsemi.com
2
Typical Characteristics TJ = 25 °C unless otherwise noted.
300
3
2
1
0
VGS = 10 V
VGS = 8 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
200
VGS = 7 V
VGS = 6.5 V
VGS = 6 V
VGS = 6.5 V
VGS = 6 V
100
VGS = 10 V
VGS = 8 V
VGS = 7 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
0
100
200
300
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs. Drain Current and Gate Voltage
2.4
20
ID = 26 A
GS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
V
15
10
5
ID = 26 A
TJ = 150 o
C
TJ = 25 o
C
0
-75 -50 -25
0
25 50 75 100 125 150 175
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure4. On-Resistance vs. Gate to
Source Voltage
300
300
VGS = 0 V
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
VDS = 5 V
200
100
0
TJ = 175 o
C
1
TJ = 175 o
C
0.1
TJ = 25 o
C
TJ = 25 o
C
0.01
TJ = -55 o
C
TJ = -55 o
C
0.001
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs. Source Current
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
www.fairchildsemi.com
3
Typical Characteristics TJ = 25 °C unless otherwise noted.
10
10000
1000
100
ID = 26 A
Ciss
8
VDD = 25 V
VDD = 50 V
Coss
6
VDD = 75 V
4
f = 1 MHz
GS = 0 V
2
0
V
Crss
10
0.1
0
20
40
60
80
100
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s . D r a i n
to Source Voltage
2000
1000
1000
10 μs
100
10
1
100
10
1
TJ = 25 o
C
100 μs
THIS AREA IS
LIMITED BY rDS(on)
TJ = 150 o
C
1 ms
SINGLE PULSE
TJ = MAX RATED
RθJC = 0.6 oC/W
10 ms
100 ms/DC
CURVE BENT TO
MEASURED DATA
T
C = 25 oC
0.1
0.1
0.001
0.01
0.1
1
10
100
1000
1
10
100
1000
tAV, TIME IN AVALANCHE (ms)
VDS, DRAIN to SOURCE VOLTAGE (V)
F i g u r e 9 . U n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10. Forward Bias Safe
Operating Area
105
SINGLE PULSE
RθJC = 0.6 oC/W
TC = 25 o
C
104
103
102
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
Figure 11. Single Pulse Maximum Power Dissipation
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
www.fairchildsemi.com
4
Typical Characteristics TJ = 25 °C unless otherwise noted.
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
0.001
Z
θJC
θJC
SINGLE PULSE
o
R
= 0.6 C/W
θJC
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
10-5
10-4
10-3
t, RECTANGULAR PULSE DURATION (sec)
10-2
10-1
1
Figure 12. Junction-to-Case Transient Thermal Response Curve
©2016 Fairchild Semiconductor Corporation
FDB0300N1007L Rev.C1
www.fairchildsemi.com
5
10.20
9.70
1.40
1.00
A
10.50
8.40
9.40
9.00
10.20
C
1.40 MAX
3.45
0.73
1
7
0.95
0.90
0.70
(1.27) 6X
1.27 6X
7.62
LAND PATTERN RECOMMENDATION
0.70
0.50
C
M
0.25
A
7.62
4.70
4.30
B
8.78
8.38
1.40
1.20
7.70 MIN
8
15.70
15.10
C
1
7
A
0.60
0.40
0.254
0.20 MAX
NOTES:
A. PACKAGE CONFORMS TO JEDEC TO-263
VARIATION CB EXCEPT W HERE NOTED.
B. ALL DIMENSIONS ARE IN MILLIMETERS.
GAGE PLANE
C
OUT OF JEDEC STANDARD VALUE.
SEATING PLANE
D. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
E. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
F. LAND PATTERN RECOMMENDATION PER IPC.
TO127P1524X465-8N.
5.20
4.80
G. DRAW ING FILE NAME: TO263A07REV5.
R0.50
2.84
2.44
0.20
0 - 8°
B
C
DETAIL A
SCALE 2:1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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