FDB9506L-F085 [ONSEMI]
Power MOSFET, P-Channel, Logic Level, Trench, -40 V, -110 A, 3.6 mΩ;型号: | FDB9506L-F085 |
厂家: | ONSEMI |
描述: | Power MOSFET, P-Channel, Logic Level, Trench, -40 V, -110 A, 3.6 mΩ |
文件: | 总7页 (文件大小:228K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FDB9506L-F085
Power MOSFET
−40 V, 3.6 mW, −110 A, Single P−Channel
Features
• Low R
to Minimize Conduction Losses
• Low Q and Capacitance to Minimize Driver Losses
DS(on)
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G
• Wettable Flank Option for Enhanced Optical Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
3.6 mW @ −10 V
5.0 mW @ −4.5 V
−40 V
−80 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
−40
Unit
V
D
V
DSS
Gate−to−Source Voltage
V
GS
16
V
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
−110
−110
176
A
C
D
q
JC
G
T
C
(Notes 1, 3)
Steady
State
Power Dissipation
T
C
P
W
A
D
R
(Note 1)
q
JC
T
C
= 100°C
88
S
Continuous Drain
Current R
T = 25°C
A
I
D
−24.5
−17.3
3.5
P−CHANNEL MOSFET
q
JA
T = 100°C
A
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T = 25°C
A
P
W
D
D
R
(Notes 1, 2)
q
JA
T = 100°C
A
1.7
G
S
Pulsed Drain Current
T
= 25°C, t = 10 ms
I
DM
−1260
A
C
p
2
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
D PAK−3
J
stg
TO−263
CASE 418AJ
Source Current (Body Diode) (Note 1)
I
S
−110
A
Single Pulse Drain−to−Source Avalanche
E
AS
370
mJ
Energy (I
= −86 A)
L(pk)
MARKING DIAGRAM
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
&Z&3&K
FDB
9506L
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
0.85
43
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
&Z
&3
&K
= Assembly Plant Code
= Numeric Date Code
= Lot Code
R
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
Maximum current is limited by package configuration.
FDB9506L
= Specific Device Code
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
December, 2018 − Rev. 0
FDB9506L−F085/D
FDB9506L−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
−40
−
−
−
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/T
−
−22
mV/°C
(BR)DSS
J
Zero Gate Voltage Drain Current
I
V
= 0 V, V = −40 V, T = 25°C
−
−
−
−
−
−
−1
mA
mA
nA
DSS
GS
DS
J
V
GS
= 0 V, V = −40 V, T = 175°C
−1
DS
J
Zero Gate Voltage Drain Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
DS
= 0 V, V =
GS
16 V
100
GSS
V
GS(th)
V
V
= V , I = −250 mA
−1
−
−1.8
−6.4
2.8
−3
−
V
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
mV/°C
mW
GS(th)
J
R
V
GS
= −10 V, I = −80 A
−
3.6
5.0
DS(on)
D
= −4.5 V, I = −40 A
−
3.9
GS
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
V
= 0 V, f = 100 KHz, V = −20 V
−
−
−
−
−
−
−
−
−
−
9100
3300
140
19
−
−
−
−
−
−
−
−
−
−
pF
pF
pF
W
iss
GS
DS
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
C
oss
C
rss
R
V
GS
= 0.5 V, f = 100 KHz
g
Total Gate Charge
Q
V
GS
= −10 V, V = −32 V, I = −80 A
126
58
nC
G(TOT)
DS
D
V
GS
= −4.5 V, V = −32 V, I = −80 A
DS D
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
Plateau Voltage
Q
V
GS
= 0 to −1 V
8
g(th)
Q
V
DD
= −32 V, I = −80 A
27
gs
D
Q
16
gd
V
GP
−3.2
V
SWITCHING CHARACTERISTICS
Turn-On Delay Time
t
V
GS
= −20 V, I = −80 A,
−
−
−
−
12
9
−
−
−
−
ns
ns
ns
ns
d(on)
DD
D
V
= −10 V, R
= 6 W
GEN
Turn-On Rise Time
t
r
Turn-Off Delay Time
t
474
140
d(off)
Turn-Off Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Source−to−Drain Diode Voltage
V
I
= −80 A, V = 0 V
−
−
−
−
−
−
−0.91
−0.84
87
−1.25
V
V
SD
RR
SD
GS
I
= −40 A, V = 0 V
−1.2
−
SD
GS
Reverse Recovery Time
Charge Time
T
V
= 0 V, dI /dt = 100 A/ms
ns
GS
SD
= −80 A
I
S
t
42
−
a
Discharge Time
t
45
−
b
Reverse Recovery Charge
Q
101
−
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
2
FDB9506L−F085
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
200
180
160
140
120
100
80
Current Limited by Package
V
GS
= −10 V
60
40
0.2
0
20
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
1
50% Duty Cycle
20%
P
DM
10%
5%
0.1
t
1
2%
t
2
1%
Z
q
(t) = r(t) x R
q
JC
JC
Peak T = P
Duty Cycle, D = t /t
x Z (t) + T
q
JC C
J
DM
Single Pulse
1
2
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
5000
1000
1000
T
= 25°C
C
V
GS
= −10 V
For temperatures above
25°C derate peak current
as follows:
100
10
100 ms
175 * T
C
Ǹ
Operation in this
area may be lim-
ited by package
I + I
ƪ ƫ
25
150
1 ms
100
10
10 ms
Operation in this
area may be lim-
ited by R
100 ms
Single Pulse
T = Max Rated
1
Single Pulse
DS(on)
J
T
C
= 25°C
0.1
0.000001
0.0001 0.001 0.01
0.1
1
10
0.1
1
10
100
t, RECTANGULAR PULSE DURATION (s)
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 4. Peak Current Capability
Figure 5. Forward Bias Safe Operating Area
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3
FDB9506L−F085
TYPICAL CHARACTERISTICS
200
100
300
If R = 0
= (L)(I )/(1.3*Rated BV
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
t
AV
− V
)
AS
DSS
DD
If R ≠ 0
= (L/R)In[(I *R)/(1.3*Rated BV
t
AV
− V ) +1]
240
180
120
V
DS
= −5 V
AS
DSS
DD
T
= 25°C
J(initial)
T = 25°C
J
10
1
T
= 150°C
J(initial)
60
0
T = 175°C
J
NOTE: Refer to ON Semiconductor Application
Notes AN7514 and AN7515
T = −55°C
J
0.01
0.1
1
10
100
1000 10,000
1
0
2
2
3
4
5
t
, TIME IN AVALANCHE (mS)
−V , GATE−TO−SOURCE VOLTAGE (V)
AV
GS
Figure 6. Unclamped Inductive Switching
Capability
Figure 7. Transfer Characteristics
300
100
300
225
150
10 V
7 V 5 V
V
= 0 V
GS
4.5 V
4.0 V
10
1
0.1
T = 175°C
V
= 3.5 V
J
GS
75
0
0.01
Pulse Width = 250 ms
T = 25°C
T = −55°C
J
J
T = 25°C
J
0.001
0
0.2
0.4
0.6
0.8
1.0
1.2
1
2
3
4
5
−V , BODY DIODE FORWARD VOLTAGE (V)
−V , DRAIN−SOURCE VOLTAGE (V)
SD
DS
Figure 8. Forward Diode Characteristics
Figure 9. Saturation Characteristics
6
5
4
3
2
50
40
30
20
V
= 10 V
7 V
5 V
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
GS
I
D
= −80 A
4.5 V
4.0 V
3.5 V
10
0
T = 175°C
1
0
J
Pulse Width = 250 ms
T = 25°C
J
T = 25°C
J
0
60
120
180
240
300
3
4
5
6
7
8
9
10
−I , DRAIN CURRENT (A)
D
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 10. Normalized RDS(on) vs. Drain
Current
Figure 11. RDS(on) vs. Gate Voltage
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4
FDB9506L−F085
TYPICAL CHARACTERISTICS
1.8
1.6
1.4
1.2
1.0
1.3
V
I
= V
DS
= −250 mA
GS
V
I
= −10 V
= −80 A
GS
D
1.1
0.9
0.7
D
0.5
0.3
0.8
0.6
−80
−40
0
40
80
120
160
200
−80
−40
0
40
80
120
160 200
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 12. Normalized RDS(on) vs. Junction
Temperature
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
1.10
1.05
1.00
100,000
10,000
I
D
= −5 mA
C
ISS
C
OSS
1000
100
C
RSS
0.95
0.90
10
1
V
= 0 V
GS
f = 100 KHz
−80 −40
0
40
80
120
160
200
0.1
1
10
40
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 14. Normalized Drain−to−Source
Figure 15. Capacitance vs. Drain−to−Source
Breakdown Voltage vs. Junction Temperature
Voltage
10
8
V
DD
= −20 V
6
V
DD
= −16 V
V
DD
= −24 V
4
2
0
0
26
52
78
104
130
Q , GATE CHARGE (nC)
g
Figure 16. Gate Charge vs. Gate−to−Source
Voltage
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK−3 (TO−263, 3−LEAD)
CASE 418AJ
ISSUE F
DATE 11 MAR 2021
SCALE 1:1
XXXXXX = Specific Device Code
A
= Assembly Location
WL
Y
= Wafer Lot
= Year
GENERIC MARKING DIAGRAMS*
WW
W
M
G
AKA
= Work Week
= Week Code (SSG)
= Month Code (SSG)
= Pb−Free Package
= Polarity Indicator
XX
AYWW
XXXXXXXXG
AKA
XXXXXXXXG
AYWW
XXXXXX
XXYMW
XXXXXXXXX
AWLYWWG
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
IC
Standard
Rectifier
SSG
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON56370E
D2PAK−3 (TO−263, 3−LEAD)
PAGE 1 OF 1
DESCRIPTION:
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
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Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
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