FDBL0330N80 [ONSEMI]
N 沟道,PowerTrench® MOSFET,80V,220A,3.0mΩ;型号: | FDBL0330N80 |
厂家: | ONSEMI |
描述: | N 沟道,PowerTrench® MOSFET,80V,220A,3.0mΩ |
文件: | 总8页 (文件大小:387K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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April 2015
FDBL0330N80
®
N-Channel PowerTrench MOSFET
80 V, 220 A, 3.0 mΩ
Features
Typical R
= 2.4 mΩ at V = 10V, I = 80 A
GS D
DS(on)
Typical Q
= 86 nC at V = 10V, I = 80 A
g(tot)
GS
D
D
UIS Capability
RoHS Compliant
Applications
Industrial Motor Drive
Industrial Power Supply
Industrial Automations
Battery Operated tools
Battery Protection
Solar Inverters
G
S
For current package drawing, please refer to the Fairchild web‐
site at http://www.fairchildsemi.com/dwg/PS/PSOF08A.pdf.
UPS and Energy Inverters
Energy Storage
Load Switch
MOSFET Maximum Ratings TJ = 25°C unless otherwise noted.
Symbol
VDSS
Parameter
Ratings
Units
Drain-to-Source Voltage
Gate-to-Source Voltage
80
V
V
VGS
±20
220
Drain Current - Continuous (VGS=10) (Note 1)
Pulsed Drain Current
TC = 25°C
TC = 25°C
ID
A
See Figure 4
205
EAS
PD
Single Pulse Avalanche Energy
Power Dissipation
Derate Above 25oC
(Note 2)
(Note 3)
mJ
W
W/oC
oC
oC/W
oC/W
300
2.0
TJ, TSTG Operating and Storage Temperature
-55 to + 175
0.5
RθJC
RθJA
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
43
Notes:
1: Current is limited by silicon.
2: Starting T = 25°C, L = 0.1mH, I = 64A, V = 80V during inductor charging and V = 0V during time in avalanche.
J
AS
DD
DD
3: R
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
θJA
mounting surface of the drain pins.
presented here is based on mounting on a 1 in pad of 2oz copper.
R
is guaranteed by design, while R is determined by the board design. The maximum rating
θJC θJA
2
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDBL0330N80
FDBL0330N80
MO-299A
-
-
-
©2015 Fairchild Semiconductor Corporation
FDBL0330N80 Rev. 1.0
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25°C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
IDSS
Drain-to-Source Breakdown Voltage
Drain-to-Source Leakage Current
Gate-to-Source Leakage Current
ID = 250μA, VGS = 0V
80
-
-
-
-
-
-
1
V
VDS= 8 0 V , T J = 25oC
μA
mA
nA
VGS = 0V
TJ = 175oC (Note 4)
-
1
IGSS
VGS = ±20V
-
±100
On Characteristics
VGS(th)
RDS(on)
Gate to Source Threshold Voltage
Drain to Source On Resistance
VGS = VDS, ID = 250μA
2.0
3.0
2.4
4.9
4.0
3.0
6.1
V
TJ = 25oC
-
-
mΩ
mΩ
ID = 80A,
TJ = 175oC (Note 4)
VGS= 10V
Dynamic Characteristics
Ciss
Input Capacitance
-
-
-
-
-
-
-
-
6320
1030
32
-
pF
pF
pF
Ω
VDS = 40V, VGS = 0V,
f = 1MHz
Coss
Crss
Rg
Output Capacitance
-
Reverse Transfer Capacitance
Gate Resistance
-
-
f = 1MHz
2.1
86
Qg(ToT)
Qg(th)
Qgs
Total Gate Charge at 10V
Threshold Gate Charge
Gate-to-Source Gate Charge
Gate-to-Drain “Miller“ Charge
VGS = 0 to 10V
V
112
18
-
nC
nC
nC
nC
DD = 64V
ID = 80A
VGS = 0 to 2V
12
30
Qgd
18
-
Switching Characteristics
ton
td(on)
tr
Turn-On Time
Turn-On Delay
Rise Time
-
-
-
-
-
-
-
98
-
ns
ns
ns
ns
ns
ns
30
34
40
17
-
-
V
DD = 40V, ID = 80A,
VGS = 10V, RGEN = 6Ω
td(off)
tf
Turn-Off Delay
Fall Time
-
-
toff
Turn-Off Time
86
Drain-Source Diode Characteristics
I
SD =80A, VGS = 0V
-
-
-
-
-
1.25
1.2
V
VSD
Source-to-Drain Diode Voltage
ISD = 40A, VGS = 0V
-
V
trr
Reverse-Recovery Time
80
95
120
140
ns
nC
IF = 80A, dISD/dt = 100A/μs,
VDD=64V
Qrr
Reverse-Recovery Charge
Note:
4: The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
©2015 Fairchild Semiconductor Corporation
FDBL0330N80 Rev. 1.0
2
www.fairchildsemi.com
Typical Characteristics
1.2
1.0
0.8
0.6
0.4
0.2
0.0
250
200
150
100
50
CURRENT LIMITED
BY SILICON
VGS = 10V
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
200
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE(oC)
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 1. Normalized Power Dissipation vs. Case
Temperature
2
DUTY CYCLE - DESCENDING ORDER
1
D = 0.50
0.20
P
DM
0.10
0.05
0.02
t
1
0.01
0.1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
x Z
x R
+ T
SI NGLE PUL SE
J
DM
θJA
θJA C
0.01
10-5
10-4
10-3
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
TC = 25oC
FOR TEMPERATURES
VGS = 10V
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
1000
100
10
175 - TC
I = I2
150
SI NGLE PULSE
10-5
10-4
10-3
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
©2015 Fairchild Semiconductor Corporation
FDBL0330N80 Rev. 1.0
3
www.fairchildsemi.com
Typical Characteristics
1000
100
10
1000
100
If R = 0
= (L)(I )/(1.3*RATED BV
t
AV
- V
)
AS
DSS
DD
If R
AV
≠ 0
t
= (L/R)ln[(I *R)/(1.3*RATED BV
- V ) +1]
AS
DSS DD
100us
1ms
10
STAR TING TJ = 25oC
OPERATIONIN THIS
AREAMAY BE
LIMITED BY r
DS(on)
1
SINGLE PULSE
STARTING TJ = 150oC
T
= MAX RATED
o
J
10ms
100ms
T
= 25
C
C
1
0.1
0.001
0.01
0.1
1
10
100
1000
0.1
1
10
100
500
tAV, TIME IN AVALANCHE (ms)
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Figure 5. Forward Bias Safe Operating Area
300
300
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
VGS = 0 V
100
250
VDD = 5V
200
TJ= 175 o
C
10
1
150
TJ = 25 o
C
TJ = 25oC
100
TJ = 175oC
50
TJ = -55oC
0
0.1
2
3
4
5
6
7
8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
300
250
200
150
100
50
300
VGS
15V Top
10V
8V
7V
6V
VGS
15V Top
10V
8V
7V
6V
5.5V
5V Bottom
250
200
150
100
50
5.5V
5V Bottom
80μs PULSE WIDTH
Tj=25oC
80μs PULSE WIDTH
Tj=175oC
0
0
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
©2015 Fairchild Semiconductor Corporation
FDBL0330N80 Rev. 1.0
4
www.fairchildsemi.com
Typical Characteristics
50
2.4
2.0
1.6
1.2
0.8
0.4
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
ID = 80A
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
40
30
20
10
0
TJ = 25oC
TJ = 175oC
ID = 80A
VGS = 10V
-80
-40
0
40
80
120
160
200
4
6
8
10
TJ, JUNCTION TEMPERATURE(oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
1.10
VGS = VDS
ID = 5mA
I
D
= 250μA
1.2
0.9
0.6
0.3
0.0
1.05
1.00
0.95
0.90
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160 200
TJ, JUNCTION TEMPERATURE(oC)
TJ, JUNCTION TEMPERATURE (oC)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10000
10
ID = 80A
Ciss
VDD = 40V
8
1000
VDD =32V
VDD = 48V
6
4
2
0
Coss
100
Crss
f = 1MHz
VGS = 0V
10
0.1
1
10
100
0
20
40
60
80
100
VDS , DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE(nC)
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
©2015 Fairchild Semiconductor Corporation
FDBL0330N80 Rev. 1.0
5
www.fairchildsemi.com
9.70
9.90
DETAIL "A"
B
0.60
0.80
0.40
0.60
(0.40)
10°
0.60
0.80
(2X)
11.58
11.78
(3.30)
10.28
10.48
0.50
0.70
0.20
C A B
DETAIL "A"
1
8
0.60
0.70
0.90 (8X)
0.25
1.20
7X
C
C
A B
(0.35)
0.20
8.40
10.20
TOP VIEW
5.10
4.45
DETAIL "B"
6.64
6.64
2.95
2.90
0.20
0.10
C
0.40
0.60
8.10
4.99
2.20
2.40
C
2.04
13.28
1.46
C
0.86
0.60
SIDE VIEW
2.80
1
8
1.20
0.80
9.80
10.00
A
0.20
C
A B
(8.00)
LAND PATTERN
RECOMMENDATION
1.90
2.10
5.19
5.89
4.73
(2X)
0.10
2.60
(2X)
(2X)
6.55
6.75
(7.15)
3.30
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE STANDARD REFERENCE:
1.20
0.65
JEDEC MO-299, ISSUE A, DATED NOVEMBER
2009.
3X
2X
3.75
7.40
7.60
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
(8.30)
BOTTOM VIEW
10°
E) DRAWING FILE NAME: MKT-PSOF08AREV3
(0.35)
DETAIL "B"
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