FDC8886 [ONSEMI]
30V N沟道PowerTrench® MOSFET;
| 型号： | FDC8886 |
| 厂家： | 
ONSEMI |
| 描述： | 30V N沟道PowerTrench® MOSFET 开关 光电二极管 晶体管 |
| 文件： | 总8页 (文件大小：414K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
April 2015
FDC8886
N-Channel Power Trench® MOSFET
30 V, 6.5 A, 23 mΩ
Features
General Description
Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 6.5 A
Max rDS(on) = 36 mΩ at VGS = 4.5 V, ID = 6.0 A
High performance trench technology for extremely low rDS(on)
Fast switching speed
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced Power Trench® process that has
been optimized for rDS(on) switching performance.
Application
RoHS Compliant
Primary Switch
S
S
D
D
G
D
D
D
D
4
5
6
3
2
1
G
D
Pin 1
D
SuperSOTTM -6
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
30
±20
V
V
(Note 3)
Drain Current -Continuous (Package limited) TC = 25 °C
8.0
ID
-Continuous
-Pulsed
TA = 25 °C
(Note 1a)
6.5
A
25
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
(Note 1a)
(Note 1b)
1.6
PD
W
0.8
TJ, TSTG
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
30
78
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
8 mm
Quantity
3000 units
.886
FDC8886
SSOT-6
7 ’’
©2012 Fairchild Semiconductor Corporation
FDC8886 Rev.1.4
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
30
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
18
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
μA
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V
100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
1.2
1.9
-6
3.0
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
mV/°C
V
GS = 10 V, ID = 6.5 A
19
30
25
24
23
36
30
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 6.0 A
mΩ
VGS = 10 V, ID = 6.5 A, TJ = 125 °C
VDD = 5 V, ID = 6.5 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
348
135
16
465
180
25
pF
pF
pF
Ω
V
DS = 15 V, VGS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1 MHz
1.2
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
5
10
10
ns
ns
1
VDD = 15 V, ID = 6.5 A,
VGS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
11
1
19
ns
10
ns
Total Gate Charge
Total Gate Charge
Total Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
5.3
2.5
1.0
0.8
7.4
3.5
nC
nC
nC
nC
Qg(TOT)
VGS = 0 V to 4.5 V
VDD = 15 V
ID = 6.5 A
Qgs
Qgd
Drain-Source Diode Characteristics
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = 6.5 A
(Note 2)
0.86
14
3
1.2
22
10
V
ns
nC
IF = 6.5 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
NOTES:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θJA
R
is guaranteed by design while R
is determined by the user's board design.
θJC
θCA
a. 78 °C/W when mounted on
a 1 in pad of 2 oz copper
b.175 °C/W when mounted on
a minimum pad of 2 oz copper
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
©2012 Fairchild Semiconductor Corporation
FDC8886 Rev.1.4
2
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
25
3.5
3.0
2.5
2.0
1.5
1.0
0.5
VGS = 10 V
VGS = 6 V
VGS = 3.5 V
VGS = 4.5 V
20
VGS = 4 V
VGS = 4 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
15
VGS = 4.5 V
10
VGS = 3.5 V
VGS = 6 V
5
PULSE DURATION = 80 μs
VGS = 10 V
DUTY CYCLE = 0.5% MAX
0
0
5
10
15
20
25
0
0.4
0.8
1.2
1.6
2.0
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.5
80
60
40
20
0
ID = 6.5 A
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
PULSE DURATION = 80 μs
ID = 6.5 A
VGS = 10 V
DUTY CYCLE = 0.5% MAX
TJ = 125 o
C
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
30
10
25
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
20
15
10
5
VDS = 5 V
TJ = 150 o
C
1
0.1
TJ = 25 oC
TJ = 150 o
C
TJ = -55 o
C
TJ = 25 o
C
TJ = -55 o
C
0
0.01
1
2
3
4
5
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2012 Fairchild Semiconductor Corporation
FDC8886 Rev.1.4
3
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
500
100
10
ID = 6.5 A
VDD = 10 V
Ciss
8
VDD = 15 V
6
Coss
VDD = 20 V
4
2
0
f = 1 MHz
= 0 V
Crss
V
GS
10
0
1
2
3
4
5
6
0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
8
6
4
2
0
7
6
TJ = 25 o
C
VGS = 10 V
5
4
3
2
1
TJ = 100 o
C
VGS = 4.5 V
TJ = 125 o
C
RθJA = 78 oC/W
0.01
0.1
1
5
25
50
75
100
125
150
TA, AMBIENT TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Ambient Temperature
30
10
200
SINGLE PULSE
RθJA = 175 oC/W
TA = 25 oC
100
100 μs
1
0.1
THIS AREA IS
LIMITED BY rDS(on)
10
1 ms
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
1 s
10 s
DC
R
θJA = 175 oC/W
1
T
A = 25 oC
0.01
0.5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
103
100
10
0.01
0.1
1
10
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDC8886 Rev.1.4
4
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
RθJA = 175 oC/W
1
2
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.01
0.005
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDC8886 Rev.1.4
5
www.fairchildsemi.com
SYMM
C
L
0.95
0.95
C
3.00
2.80
A
1.00 MIN
6
4
B
3.00
2.60
2.60
1.70
1.50
C
1
3
0.50
0.30
0.95
0.70 MIN
M
0.20
A B
1.90
LAND PATTERN RECOMMENDATION
SEE DETAIL A
(0.30)
1.10 MAX
H
1.00
0.70
C
0.10
0.20
0.08
0.10
0.00
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC MO-193.
VAR. AA, ISSUE E.
C
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH, PROTRUSIONS OR GATE BURRS SHALL
NOT EXCEED 0.25mm PER END. PACKAGE WIDTH
DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR
GAGE PLANE
0.25
8°
0°
PROTRUSION SHALL NOT EXCEED 0.25mm PER
SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS
ARE DETERMINED AT DATUM H.
D) DRAWING FILE NAME: MKT-MA06AREVF
0.55
0.35
SEATING PLANE
0.60 REF
DETAIL A
SCALE: 50X
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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