FDD9510L-F085 [ONSEMI]
P 沟道，PowerTrench® MOSFET，-40 V，-50 A，13.5 mΩ;
| 型号： | FDD9510L-F085 |
| 厂家： | 
ONSEMI |
| 描述： | P 沟道，PowerTrench® MOSFET，-40 V，-50 A，13.5 mΩ |
| 文件： | 总7页 (文件大小：368K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - P-Channel Logic
Level PowerTrench)
-40 V, 13.5 mW, -50 A
FDD9510L-F085
Features
• Typ R
• Typ Q
= 11 mW at V = −10 V; I = −50 A
GS D
DS(on)
www.onsemi.com
= 28 nC at V = −10 V; I = −50 A
g(tot)
GS
D
• UIS Capability
D
• Qualified to AEC Q101
• These Devices are Pb−Free and are RoHS Compliant
G
S
Applications
DPAK
TO−252
CASE 369AS
• Automotive Engine Control
• Powertrain Management
• Solenoid and Motor Drivers
• Electrical Power Steering
• Integrated Starter/Alternator
• Distributed Power Architectures and VRM
• Primary Switch for 12 V Systems
D
G
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Drain to Source Voltage
Gate to Source Voltage
Symbol
Value
−40
16
Unit
V
S
V
DSS
V
GS
V
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Drain Current − Continuous
I
D
−50
A
(V = −10 V) (T = 25°C) (Note 1)
GS
C
Pulsed Drain Current (T = 25°C)
I
D
See
Figure 4
A
C
Single Pulse Avalanche Energy (Note 2)
Power Dissipation
E
35.3
75
mJ
W
AS
P
D
Derate above 25°C
P
0.5
W/°C
°C
D
Operating and Storage Temperature
Range
T , T
−55 to
+175
J
STG
Thermal Resistance (Junction to Case)
R
2
°C/W
°C/W
q
JC
JA
Maximum Thermal Resistance
(Junction to Ambient) (Note 3)
R
52
q
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by wirebond configuration
2. Starting Tj = 25°C, L = 40 mH, I = −42 A, V = −40 V during inductor
AS
DD
charging and V = 0 V during time in avalanche
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal
q
JA
resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design while R
q
JA
q
JC
is determined by the user’s board design. The maximum rating presented
2
here is based on mounting on a 1 in pad of 2 oz copper.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
February, 2020 − Rev. 1
FDD9510L−F085/D
FDD9510L−F085
PACKAGE MARKING AND ORDERING INFORMATION
Device
Device Marking
Package
Reel Size
Tape Width
Quantity
FDD9510L−F085
FDD9510L
D−PAK (TO−252)
13″
16 mm
2500 Units
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
I
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
V
= 0 V, I = −250 mA
−40
−
−
−
−
−
−
V
DSS
GS
D
V
DS
V
GS
= −40 V,
= 0 V
−1
−1
100
T = 25_C
J
mA
mA
nA
DSS
J
T = 175_C (Note 4)
−
I
Gate to Source Leakage Current
V
GS
=
16 V
−
GSS
ON CHARACTERISTICS
V
R
Gate to Source Threshold Voltage
V
V
V
= V , I = 250 mA
−1
−
−1.9
16
−3
22
V
GS(th)
GS
GS
GS
DS
D
Drain to Source On−Resistance
= −4.5 V, I = −50 A, T = 25_C
mW
mW
mW
DS(on)
D
J
= −10 V,
= −50 A
−
11
13.5
22.7
T = 25_C
J
J
I
D
T = 175_C (Note 4)
−
18
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= −20 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
−
2020
785
36
23
28
13
2
−
−
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
V
V
= −0.5 V, f = 1 MHz
−
g
GS
Q
Total Gate Charge
= −20 V,
= −50 A
V
GS
V
GS
V
GS
= 0 V to −10 V
= 0 V to −4.5 V
= 0 V to −1 V
37
−
nC
nC
nC
nC
nC
g(tot)
DD
I
D
Q
Total Gate Charge
g(−4.5)
Q
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
−
g(th)
Q
V
DD
= −20 V, I = −50 A
7
−
gs
D
Q
4
−
gd
SWITCHING CHARACTERISTICS
t
Turn-On Time
V
DD
V
GS
= −20 V, I = −50 A,
−
−
−
−
−
−
−
8
44
−
ns
ns
ns
ns
ns
ns
on
D
= −10 V, R
= 6 W
GEN
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Turn-Off Time
d(on)
t
r
21
113
35
−
−
t
−
d(off)
t
f
−
t
220
off
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Voltage
V
V
= 0 V, I = −50 A
−
−
−
−
−0.97
−0.9
42
−1.25
−1.2
63
V
V
SD
GS
SD
= 0 V, I = −25 A
GS
SD
T
Reverse Recovery Time
I = −50 A, dI /dt = 100 A/ms
F
ns
nC
rr
SD
Q
Reverse Recovery Charge
31
56
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production
J
www.onsemi.com
2
FDD9510L−F085
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
70
60
50
40
30
Current Limited
by Package
20
V
= −10 V
GS
0.2
0
10
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
T , CASE TEMPERATURE (°C)
C
T , CASE TEMPERATURE (°C)
C
Figure 1. Normalized Power Dissipation vs.
Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
1
Duty Cycle = 0.5
0.2
P
DM
0.1
0.1
0.05
t
1
0.02
t
2
0.01
DUTY CYCLE, D = t /t
1 2
Peak T = P X Z X R + T
C
q
q
JA
J
DM
JA
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
T
= 25°C
C
V
GS
= −10 V
For temperatures above 25°C
derate peak current as follows:
175 * TC
Ǹ
I + I25
ƪ ƫ
150
100
10
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
1
10
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
www.onsemi.com
3
FDD9510L−F085
TYPICAL CHARACTERISTICS
1000
100
10
100
If R = 0, t =(L)(I )/(1.3*Rated BV
− V
)
AV
AS
DSS
DD
If R ≠ 0, t =(L/R)In[(I *R)/(1.3*Rated BV
− V )+1]
DD
AV
AS
DSS
Starting T = 25°C
J
100 ms
Operation in this
Area may be Limited
by Package
10
Starting T = 150°C
J
1 ms
1
10 ms
Operation in this
Area may be Limited
by R
Single Pulse
100 ms
T = Max Rated
NOTE: Refer to ON Semiconductor
Application Notes AN7514 and AN7515
J
T
C
= 25°C
DS(on)
0.1
1
0.1
1
10
100
0.001
0.01
0.1
, TIME IN AVALANCHE (mS)
AV
1
10
100
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
t
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
120
90
300
100
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
V
GS
= 0 V
10
1
T = 25°C
J
V
DD
= −5 V
60
0.1
T = 175°C
J
30
0
0.01
T = 175°C
J
T = −55°C
T = −55°C
J
T = 25°C
J
J
0.001
1
2
3
4
5
6
7
0
0.2
0.4
0.6
0.8
1.0
1.2
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
−V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
150
100
150
100
7.0 V
7.0 V
V
= 10 V
V
GS
= 10 V
GS
5.0 V
5.0 V
4.5 V
4.0 V
3.5 V
4.5 V
4.0 V
3.5 V
50
0
50
0
Pulse Width = 250 ms
Pulse Width = 250 ms
T = 25°C
T = 175°C
J
J
0
1
2
3
4
5
0
1
2
3
4
5
−V , DRAIN−SOURCE VOLTAGE (V)
DS
−V , DRAIN−SOURCE VOLTAGE (V)
DS
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
www.onsemi.com
4
FDD9510L−F085
TYPICAL CHARACTERISTICS
80
70
60
50
40
30
20
1.8
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
1.6
1.4
1.2
1.0
I
D
= −50 A
T = 175°C
J
V
= −10 V
= −50 A
GS
T = 25°C
J
0.8
0.6
I
D
10
0
3
4
5
6
7
8
9
10
−80
−40
0
40
80
120
160
200
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. RDS(on) vs. Gate Voltage
Figure 12. Normalized RDS(on) vs. Junction
Temperature
1.2
1.0
0.8
1.10
1.05
1.00
V
= V
DS
= −250 mA
GS
I
D
= −1 mA
I
D
0.6
0.4
0.95
0.90
−80 −40
0
40
80
120
160
200
−80
−40
0
40
80
120
160 200
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10,000
1000
100
10
8
I
D
= −50 A
C
iss
V
= −20 V
DD
C
oss
6
4
V
DD
= −16 V
V
DD
= −24 V
C
rss
10
1
2
0
V
= 0 V
GS
f = 1 MHz
0.1
1
10
40
0
6
12
18
24
30
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Q , GATE CHARGE (nC)
g
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK3 (TO−252 3 LD)
CASE 369AS
ISSUE A
DATE 28 SEP 2022
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
AYWWZZ
XXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON13810G
DPAK3 (TO−252 3 LD)
PAGE 1 OF 1
DESCRIPTION:
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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ADDITIONAL INFORMATION
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