FDG328P [ONSEMI]

P 沟道,2.5V,指定 PowerTrench® MOSFET,-20 V,-1.5 A,145 mΩ;
FDG328P
型号: FDG328P
厂家: ONSEMI    ONSEMI
描述:

P 沟道,2.5V,指定 PowerTrench® MOSFET,-20 V,-1.5 A,145 mΩ

开关 光电二极管 晶体管
文件: 总7页 (文件大小:300K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MOSFET– Specified,  
P-Channel, POWERTRENCH)  
2.5 V  
FDG328P  
General Description  
www.onsemi.com  
This PChannel 2.5 V specified MOSFET is produced in a rugged  
gate version of ON Semiconductors advanced POWERTRENCH  
process. It has been optimized for power management applications for  
a wide range of gate drive voltages (2.5 V – 12 V).  
S
D
D
G
D
Features  
D
Pin 1  
1.5 A, 20 V  
SC88/SC706/SOT363  
CASE 419B02  
R  
R  
= 0.145 W @ V = 4.5 V  
GS  
DS(ON)  
= 0.210 W @ V = 2.5 V  
DS(ON)  
GS  
Low Gate Charge  
MARKING DIAGRAM  
High Performance Trench Technology for Extremely Low R  
Compact Industry Standard SC706 Surface Mount Package  
These Devices are PbFree and are RoHS Compliant  
DS(ON)  
28M  
Applications  
Load Switch  
Power Management  
DC/DC Converter  
28  
M
= Specific Device Code  
= Assembly Operation Month  
PIN CONNECTIONS  
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Symbol  
Parameter  
DrainSource Voltage  
Ratings  
20  
Units  
1
6
5
4
V
DSS  
V
GSS  
V
V
A
GateSource Voltage  
12  
2
3
I
D
Drain Current  
Continuous  
(Note 1a)  
1.5  
Pulsed  
6  
0.75  
P
D
Power Dissipation for  
Single Operation  
(Note 1a)  
(Note 1b)  
W
0.48  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 2 of  
this data sheet.  
T , T  
Operating and Storage Junction  
Temperature Range  
55 to +150  
°C  
J
STG  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
THERMAL CHARACTERISTICS  
Symbol  
Parameter  
Ratings  
Unit  
R
Thermal Resistance, JunctiontoAmbient (Note 1b)  
260  
_C/W  
q
JA  
1. R  
is the sum of the junctiontocase and casetoambient thermal resistance where the case thermal reference is defined as the solder  
q
JA  
mounting surface of the drain pins. R  
is guaranteed by design while R  
is determined by the user’s board design.  
q
q
JC  
CA  
2
a) 170°C/W when mounted on a 1 in pad of 2 oz copper.  
b) 260°C/W when mounted on a minimum pad.  
© Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
FDG328P/D  
June, 2020 Rev. 3  
 
FDG328P  
PACKAGE MARKING AND ORDERING INFORMATION  
Device Marking  
Device  
Reel Size  
Tape Width  
Shipping  
28  
FDG328P  
7”  
8 mm  
3000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
BV  
DrainSource Breakdown Voltage  
V
I
= 0 V, I = 250 mA  
20  
V
DSS  
GS  
D
DBV  
/ DT  
Breakdown Voltage Temperature  
Coefficient  
= 250 mA, Referenced to 25_C  
9  
mV/_C  
DSS  
J
D
I
Zero Gate Voltage Drain Current  
GateBody Leakage, Forward  
GateBody Leakage, Reverse  
V
DS  
V
GS  
V
GS  
= 16 V, V = 0 V  
1  
100  
mA  
nA  
nA  
DSS  
GS  
I
= 12 V, V = 0 V  
DS  
GSSF  
I
= 12 V, V = 0 V  
100  
GSSR  
DS  
ON CHARACTERISTICS (Note 2)  
V
Gate Threshold Voltage  
V
I
= V , I = 250 mA  
0.6  
1.5  
V
GS(th)  
DS  
GS  
D
DV  
/ DT  
Gate Threshold Voltage  
Temperature Coefficient  
= 250 mA, Referenced to 25_C  
3
mV/_C  
GS(th)  
J
D
R
Static DrainSource  
OnResistance  
V
V
V
= 4.5 V, I = 1.5 A  
120  
169  
156  
145  
210  
203  
mW  
DS(on)  
GS  
GS  
GS  
D
= 2.5 V, I = 1.2 A  
D
= 4.5 V, I = 1.5 A, T = 125_C  
D
J
I
OnState Drain Current  
V
GS  
V
DS  
= 4.5 V, V = 5 V  
3  
A
S
D(on)  
DS  
g
FS  
Forward Transconductance  
= 5 V, I = 1.5 A  
3
D
DYNAMIC CHARACTERISTICS  
C
Input Capacitance  
V
DS  
= 10 V, V = 0 V, f = 1.0 MHz  
337  
88  
pF  
pF  
pF  
iss  
GS  
C
Output Capacitance  
oss  
C
Reverse Transfer Capacitance  
51  
rss  
SWITCHING CHARACTERISTICS (Note 2)  
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
GateSource Charge  
GateDrain Charge  
V
V
= 10 V, I = 1 A,  
9
18  
22  
20  
10  
6
ns  
ns  
d(on)  
DD  
GS  
D
= 4.5 V, R  
= 6 W  
GEN  
t
r
12  
10  
5
t
ns  
d(off)  
t
f
ns  
Q
V
DS  
V
GS  
= 10 V, I = 1.5 A,  
3.7  
0.7  
1.3  
nC  
nC  
nC  
g
D
= 4.5 V  
Q
gs  
gd  
Q
DRAINSOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS  
Maximum Continuous DrainSource Diode Forward Current  
I
S
0.62  
1.2  
A
V
V
SD  
DrainSource Diode Forward  
Voltage  
V
GS  
= 0 V, I = 0.62 A (Note 2)  
0.7  
S
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
2. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%  
www.onsemi.com  
2
 
FDG328P  
TYPICAL PERFORMANCE CHARACTERISTICS  
2.5  
6
5
4
3
2
1
0
VGS = 4.5 V  
3.5 V  
2.25  
2.5 V  
VGS = 2.0 V  
3.0 V  
2
1.75  
1.5  
2.5 V  
2.0 V  
1.8 V  
3.0 V  
1.25  
1
3.5 V  
4.5 V  
0.75  
0
0.5  
1
1.5  
2
2.5  
0
1
2
3
4
5
6
VDS, DRAINSOURCE VOLTAGE (V)  
ID, DRAIN CURRENT (A)  
Figure 1. OnRegion Characteristics  
Figure 2. OnResistance Variation with  
Drain Current and Gate Voltage  
0.4  
1.5  
1.4  
1.3  
1.2  
1.1  
1
ID = 0.8 A  
ID = 1.5 A  
VGS = 4.5 V  
0.35  
0.3  
0.25  
0.2  
°
TA = 125 C  
0.15  
0.1  
0.9  
0.8  
0.7  
°
TA = 25 C  
0.05  
1.5  
2
2.5  
3
3.5  
4
4.5  
5
50  
25  
0
25  
50  
75  
100  
125  
150  
°
VGS, GATE TO SOURCE VOLTAGE (V)  
TJ, JUNCTION TEMPERATURE ( C)  
Figure 3. OnResistance Variation with  
Figure 4. OnResistance Variation with  
GatetoSource Voltage  
Temperature  
6
10  
1
°
VGS = 0 V  
TA = 55 C  
VDS = 5 V  
°
25 C  
5
4
3
2
1
0
°
125 C  
°
TA = 125 C  
°
25 C  
0.1  
°
55 C  
0.01  
0.001  
0.0001  
0.5  
1
1.5  
2
2.5  
3
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature  
www.onsemi.com  
3
FDG328P  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
5
4
3
2
1
0
600  
f = 1 MHz  
= 0 V  
VDS = 5 V  
10 V  
ID = 1.5 A  
V
GS  
500  
15 V  
400  
CISS  
300  
200  
COSS  
CRSS  
100  
0
0
1
2
3
4
5
0
5
10  
15  
20  
Qg, GATE CHARGE (nC)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics  
Figure 8. Capacitance Characteristics  
100  
30  
24  
18  
12  
6
SINGLE PULSE  
R
= 260°C/W  
q
JA  
T
A
= 25°C  
100 ms  
10  
1
RDS(ON) LIMIT  
1 ms  
10 ms  
100 ms  
1 s  
DC  
V
= 4.5 V  
GS  
0.1  
0.01  
SINGLE PULSE  
R
= 260°C/W  
q
JA  
T
A
= 25°C  
0
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
VDS, DRAINSOURCE VOLTAGE (V)  
SINGLE PULSE TIME (sec)  
Figure 10. Single Pulse Maximum Power  
Dissipation  
Figure 9. Maximum Safe Operating Area  
1
D = 0.5  
R
R
(t) = r(t) * R  
= 260°C/W  
0.2  
q
q
q
JA  
JA  
JA  
0.1  
0.1  
0.01  
0.05  
0.02  
P(pk)  
0.01  
t1  
t 2  
SINGLE PULSE  
T
T = P * R  
(t)  
q
JA  
J
A
Duty Cycle, D = t / t  
1
2
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t1, TIME (sec)  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
Figure 11. Transient Thermal Response Curve  
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United  
States and/or other countries.  
www.onsemi.com  
4
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
SC88/SC706/SOT363  
CASE 419B02  
ISSUE Y  
1
DATE 11 DEC 2012  
SCALE 2:1  
2X  
aaa H  
D
NOTES:  
D
H
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
A
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,  
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-  
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.  
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF  
THE PLASTIC BODY AND DATUM H.  
5. DATUMS A AND B ARE DETERMINED AT DATUM H.  
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE  
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.  
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.  
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN  
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-  
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OF THE FOOT.  
D
GAGE  
PLANE  
6
1
5
2
4
3
L
L2  
E1  
E
DETAIL A  
aaa  
C
2X  
2X 3 TIPS  
bbb H  
D
e
MILLIMETERS  
DIM MIN NOM MAX  
−−−  
INCHES  
MIN  
−−−  
NOM MAX  
−−− 0.043  
−−− 0.004  
6X b  
B
TOP VIEW  
A
−−−  
−−−  
1.10  
A1 0.00  
A2 0.70  
0.10 0.000  
M
ddd  
C A-B D  
0.90  
0.20  
0.15  
2.00  
2.10  
1.25  
0.65 BSC  
0.36  
1.00 0.027 0.035 0.039  
0.25 0.006 0.008 0.010  
0.22 0.003 0.006 0.009  
2.20 0.070 0.078 0.086  
2.20 0.078 0.082 0.086  
1.35 0.045 0.049 0.053  
0.026 BSC  
b
C
D
E
0.15  
0.08  
1.80  
2.00  
A2  
DETAIL A  
A
E1 1.15  
e
L
0.26  
0.46 0.010 0.014 0.018  
0.006 BSC  
L2  
0.15 BSC  
0.15  
aaa  
bbb  
ccc  
ddd  
0.006  
0.012  
0.004  
0.004  
0.30  
0.10  
0.10  
6X  
ccc C  
A1  
SEATING  
PLANE  
c
C
SIDE VIEW  
END VIEW  
GENERIC  
MARKING DIAGRAM*  
RECOMMENDED  
SOLDERING FOOTPRINT*  
6
6X  
0.30  
XXXMG  
6X  
0.66  
G
1
2.50  
XXX = Specific Device Code  
M
= Date Code*  
G
= PbFree Package  
0.65  
(Note: Microdot may be in either location)  
PITCH  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
STYLES ON PAGE 2  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42985B  
SC88/SC706/SOT363  
PAGE 1 OF 2  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
SC88/SC706/SOT363  
CASE 419B02  
ISSUE Y  
DATE 11 DEC 2012  
STYLE 1:  
PIN 1. EMITTER 2  
2. BASE 2  
STYLE 2:  
CANCELLED  
STYLE 3:  
CANCELLED  
STYLE 4:  
STYLE 5:  
STYLE 6:  
PIN 1. ANODE 2  
2. N/C  
PIN 1. CATHODE  
2. CATHODE  
3. COLLECTOR  
4. EMITTER  
5. BASE  
PIN 1. ANODE  
2. ANODE  
3. COLLECTOR 1  
4. EMITTER 1  
5. BASE 1  
3. COLLECTOR  
3. CATHODE 1  
4. ANODE 1  
5. N/C  
4. EMITTER  
5. BASE  
6. COLLECTOR 2  
6. ANODE  
6. CATHODE  
6. CATHODE 2  
STYLE 7:  
STYLE 8:  
CANCELLED  
STYLE 9:  
STYLE 10:  
STYLE 11:  
STYLE 12:  
PIN 1. SOURCE 2  
2. DRAIN 2  
3. GATE 1  
PIN 1. EMITTER 2  
2. EMITTER 1  
3. COLLECTOR 1  
4. BASE 1  
PIN 1. SOURCE 2  
2. SOURCE 1  
3. GATE 1  
PIN 1. CATHODE 2  
2. CATHODE 2  
3. ANODE 1  
PIN 1. ANODE 2  
2. ANODE 2  
3. CATHODE 1  
4. ANODE 1  
5. ANODE 1  
6. CATHODE 2  
4. SOURCE 1  
5. DRAIN 1  
6. GATE 2  
4. DRAIN 1  
5. DRAIN 2  
6. GATE 2  
4. CATHODE 1  
5. CATHODE 1  
6. ANODE 2  
5. BASE 2  
6. COLLECTOR 2  
STYLE 13:  
PIN 1. ANODE  
2. N/C  
STYLE 14:  
PIN 1. VREF  
2. GND  
STYLE 15:  
STYLE 16:  
STYLE 17:  
STYLE 18:  
PIN 1. VIN1  
2. VCC  
PIN 1. ANODE 1  
2. ANODE 2  
PIN 1. BASE 1  
2. EMITTER 2  
3. COLLECTOR 2  
4. BASE 2  
PIN 1. BASE 1  
2. EMITTER 1  
3. COLLECTOR 2  
4. BASE 2  
3. COLLECTOR  
4. EMITTER  
5. BASE  
3. GND  
3. ANODE 3  
3. VOUT2  
4. VIN2  
5. GND  
6. VOUT1  
4. IOUT  
5. VEN  
6. VCC  
4. CATHODE 3  
5. CATHODE 2  
6. CATHODE 1  
5. EMITTER 1  
6. COLLECTOR 1  
5. EMITTER 2  
6. COLLECTOR 1  
6. CATHODE  
STYLE 19:  
PIN 1. I OUT  
2. GND  
STYLE 20:  
STYLE 21:  
PIN 1. ANODE 1  
2. N/C  
STYLE 22:  
PIN 1. D1 (i)  
2. GND  
STYLE 23:  
PIN 1. Vn  
2. CH1  
3. Vp  
STYLE 24:  
PIN 1. CATHODE  
2. ANODE  
PIN 1. COLLECTOR  
2. COLLECTOR  
3. BASE  
3. GND  
3. ANODE 2  
4. CATHODE 2  
5. N/C  
3. D2 (i)  
3. CATHODE  
4. CATHODE  
5. CATHODE  
6. CATHODE  
4. V CC  
4. EMITTER  
5. COLLECTOR  
6. COLLECTOR  
4. D2 (c)  
5. VBUS  
6. D1 (c)  
4. N/C  
5. V EN  
5. CH2  
6. N/C  
6. V REF  
6. CATHODE 1  
STYLE 30:  
STYLE 25:  
STYLE 26:  
PIN 1. SOURCE 1  
2. GATE 1  
STYLE 27:  
PIN 1. BASE 2  
2. BASE 1  
STYLE 28:  
PIN 1. DRAIN  
2. DRAIN  
3. GATE  
STYLE 29:  
PIN 1. ANODE  
2. ANODE  
PIN 1. SOURCE 1  
2. DRAIN 2  
3. DRAIN 2  
4. SOURCE 2  
5. GATE 1  
PIN 1. BASE 1  
2. CATHODE  
3. COLLECTOR 2  
4. BASE 2  
3. DRAIN 2  
4. SOURCE 2  
5. GATE 2  
3. COLLECTOR 1  
4. EMITTER 1  
5. EMITTER 2  
6. COLLECTOR 2  
3. COLLECTOR  
4. EMITTER  
5. BASE/ANODE  
6. CATHODE  
4. SOURCE  
5. DRAIN  
6. DRAIN  
5. EMITTER  
6. COLLECTOR 1  
6. DRAIN 1  
6. DRAIN 1  
Note: Please refer to datasheet for  
style callout. If style type is not called  
out in the datasheet refer to the device  
datasheet pinout or pin assignment.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42985B  
SC88/SC706/SOT363  
PAGE 2 OF 2  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
onsemi,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates  
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.  
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. onsemi reserves the right to make changes at any time to any  
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