FDMA410NZT [ONSEMI]
超薄 N 沟道，1.5 V，PowerTrench® MOSFET，20V，9.5A，23mΩ;
| 型号： | FDMA410NZT |
| 厂家： | 
ONSEMI |
| 描述： | 超薄 N 沟道，1.5 V，PowerTrench® MOSFET，20V，9.5A，23mΩ |
| 文件： | 总8页 (文件大小：419K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
POWERTRENCH),
Ultra Thin, 1.5 V
V
R
MAX
I
D MAX
DS
DS(on)
20 V
9.5 A
23 mW @ 4.5 V
Ultra Thin N−Channel
20 V, 9.5 A, 23 mW
Bottom Drain Contact
FDMA410NZT
D
D
1
2
3
6
5
4
D
D
S
Description
This Single N−Channel MOSFET has been designed using
onsemi’s advanced Power Trench process to optimize the R
@
DS(on)
G
V
= 1.5 V on special MicroFETt leadframe.
GS
This design is similar to the FDMA410NZ, however it features our
new advanced 0.55 mm max 2 x 2 MLP package technology.
Features
• 0.55 mm max package height MicroFET 2 x 2 mm Package
• Max R
• Max R
• Max R
• Max R
= 23 mW at V = 4.5 V, I = 9.5 A
GS D
DS(on)
DS(on)
DS(on)
DS(on)
= 29 mW at V = 2.5 V, I = 8.0 A
GS
D
= 36 mW at V = 1.8 V, I = 4.0 A
GS
D
= 60 mW at V = 1.5 V, I = 2.0 A
GS
D
• HBM ESD protection level > 1.5 kV (Note 3)
UDFN6 2.05x2,05 0.65P
(MicroFET)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
CASE 517DT
Compliant
Typical Applications
• Li−lon Battery Pack
• Baseband Switch
• Load Switch
• DC−DC Conversion
• Mobile Device Switching
MARKING DIAGRAM
&Z&2&K
410T
&Z
&2
&K
= Assembly Plant Code
= Numeric Date Code
= Lot Code
410T
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
April, 2023 − Rev. 3
FDMA410NZT/D
FDMA410NZT
MAXIMUM RATINGS (T = 25°C, Unless otherwise specified)
A
Symbol
Parameter
Ratings
Unit
V
V
20
Drain to Source Voltage
Gate to Source Voltage
DS
V
A
V
GS
8
I
9.5
63
–Continuous, TA = 25°C (Note 1a)
–Pulsed (Note 4)
D
W
P
2.4
Power Dissipation, TA = 25°C (Note 1a)
Power Dissipation, TA = 25°C (Note 1b)
Operating and Storage Junction Temperature Range
D
0.9
°C
T , T
−55 to +150
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Thermal Resistance, Junction to Ambient (Note 1a)
Thermal Resistance, Junction to Ambient (Note 1b)
Ratings
52
Unit
°C/W
R
q
JA
R
145
q
JA
PACKAGE MARKING AND ORDERING INFORMATION
Pin 1
Orientation
†
Device Marking
410T
Device
Package
Shipping (Qty / Packing)
FDMA410NZT
MicroFET 2x2
MicroFET 2x2
3000 / Tape & Reel
3000 / Tape & Reel
Top left
410T
FDMA410NZT−F130
Top right
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
20
−
−
−
V
DSS
D
GS
Breakdown Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
15
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 16 V, V = 0 V
−
−
−
−
1
mA
mA
DSS
GSS
DS
GS
I
=
8 V, V = 0 V
10
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
0.4
0.8
1.0
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
−3
−
mV/°C
DVGS(th)
DTJ
D
R
Static Drain to Source On Resistance
V
GS
V
GS
V
GS
V
GS
V
GS
V
DD
= 4.5 V, I = 9.5 A
−
−
−
−
−
−
14
18
25
35
21
36
23
29
36
60
32
−
mW
DS(on)
D
= 2.5 V, I = 8.0 A
D
= 1.8 V, I = 4.0 A
D
= 1.5 V, I = 2.0 A
D
= 4.5 V, I = 9.5 A, T = 125°C
D
J
g
FS
Forward Transconductance
= 5 V, I = 9.5 A
S
D
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2
FDMA410NZT
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 10 V, V = 0 V, f = 1 MHz
−
−
935
122
84
1310
170
118
3.0
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
f = 1 MHz
0.1
1.4
g
SWITCHING CHARACTERISTICS
t
Turn−on Delay Time
Rise Time
V
= 10 V, I = 9.5 A, VGS = 4.5 V,
GEN
−
−
−
−
−
−
−
8.5
3.0
27
17
10
44
10
14
−
ns
d(on)
DD
D
R
= 6 W
t
r
t
Turn−off Delay Time
Fall Time
d(off)
t
f
3.3
10
Q
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 4.5 V, V = 10 V, I = 9.5 A
nC
g
DD
D
Q
1.2
2.0
gs
gd
Q
−
DRAIN−SOURCE DIODE CHARACTERISTICS
Maximum Continuous Drain−Source Diode Forward Current
I
S
−
−
−
−
−
2.0
1.2
30
A
V
V
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
= 0 V, I = 2 A (Note 2)
0.7
16
SD
GS
S
t
I = 9.5 A, di/dt = 100 A/ms
F
ns
nC
rr
Q
Reverse Recovery Charge
4.5
10
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RθJA is determined by
q
JA
the user’s board design.
a) 52°C/W when mounted on
b) 145°C/W when mounted on
2
a 1 in pad of 2 oz copper.
a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
4. Pulsed Id please refer to Figure 11 SOA curve for more details.
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3
FDMA410NZT
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
3
80
60
40
20
0
VGS = 4.5 V
VGS = 1.5 V
VGS = 1.8 V
VGS = 2.5 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 3.5 V
VGS = 2.5 V
2
1
0
VGS = 3.5 V
VGS = 4.5 V
VGS = 1.8 V
VGS = 1.5 V
PULSE DURATION = 80
ms
DUTY CYCLE = 0.5% MAX
0.0
0.5
1.0
1.5
2.0
0
20
I
40
60
80
V
DS,
DRAIN TO SOURCE VOLTAGE (V)
DRAIN CURRENT (A)
D,
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
100
80
60
40
20
0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
ID = 9.5 A
VGS = 4.5 V
ID = 9.5 A
T
= 1255C
J
T
J
= 255C
1
2
3
4
5
−75 −50 −25
0
25 50 75 100 125 150
T
J,
JUNCTION TEMPERATURE (5C)
V
GS,
GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On-Resistance
vs. Gate to Source Voltage
80
10
80
60
40
20
0
V
= 0 V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 5 V
DS
T
J
= 1505C
T
J
= 1505C
1
0.1
T
J
= 255C
T
= 255C
J
T
J
= −555C
T
J
= −555C
0.01
0.001
1
2
3
4
0.0
0.3
0.6
0.9
1.2
1.5
V
GS,
GATE TO SOURCE VOLTAGE (V)
V
SD,
BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
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4
FDMA410NZT
TYPICAL CHARACTERISTICS (continued)
2000
4.5
3.0
1.5
0.0
ID = 9.5 A
1000
100
10
VDD = 10 V
Ciss
VDD = 8 V
Coss
VDD = 12 V
Crss
f = 1 MHz
GS = 0 V
V
0
1
2
3
4
5
6
7
0.1
1
10
20
Q
g,
GATE CHARGE (nC)
V
DS,
DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance
vs. Drain to Source Voltage
10
1
20
10
V
DS
= 0 V
T = 1255C
J
10−1
10−2
10−3
10−4
10−5
T = 255C
J
T = 1005C
T = 255C
J
J
T = 1255C
J
1
0.01
0.1
1
10
100
0
2
4
6
8
V
GS,
GATE TO SOURCE VOLTAGE (V)
t
AV,
TIME IN AVALANCHE (ms)
Figure 10. Gate Leakage Current
vs. Gate to Source Voltage
Figure 9. Unclamped Inductive
Switching Capability
100
1000
100
10
SINGLE PULSE
10 ms
R
q
= 1455C/W
JA
10
1
T
A
= 255C
100 ms
1 ms
THIS AREA IS
10 ms
LIMITED BY RDS(on)
100 ms
1 s
SINGLE PULSE
0.1
0.01
1
T
J
= MAX RATED
10 s
DC
R
= 1455C/W
q
JA
CURVE BENT TO
MEASURED DATA
T
A
= 255C
0.1
10−5 10−4 10−3 10−2 10−1 100 101 100 1000
t, PULSE WIDTH (sec)
0.1
1
10
50
V
DS,
DRAIN TO SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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5
FDMA410NZT
TYPICAL CHARACTERISTICS (continued)
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
10−1
10−2
10−3
10−4
0.05
0.02
0.01
P
DM
t
1
t
2
NOTES:
SINGLE PULSE
Z
(t) = R(t) x R
q
JA
q
JA
R
= 1455C/W
q
JA
Peak T = P
x Z (t) + T
q
JA A
J
DM
Duty Cycle, D = t / t
1
2
10−6
10−5
10−4
10−3
10−2
10−1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is registered trademark and MicroFET is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 2.05x2.05, 0.65P
CASE 517DT
ISSUE O
DATE 31 OCT 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13698G
UDFN6 2.05x2.05, 0.65P
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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© Semiconductor Components Industries, LLC, 2016
www.onsemi.com
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