FDMA530PZ [ONSEMI]
P 沟道，PowerTrench® MOSFET，-30V，-6.8A，35mΩ;
| 型号： | FDMA530PZ |
| 厂家： | 
ONSEMI |
| 描述： | P 沟道，PowerTrench® MOSFET，-30V，-6.8A，35mΩ PC 脉冲 光电二极管 晶体管 |
| 文件： | 总6页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – Power, Single
P-Channel, POWERTRENCH)
Bottom Drain Contact
1
6
D
D
G
D
D
S
-30 V, -6.8 A, 35 mW
2
3
5
4
FDMA530PZ
General Description
This device is designed specifically for battery charge or load
switching in cellular handset and other ultraportable applications . It
features a MOSFET with low on−state resistance.
The WDFN6 (MicroFETt 2 × 2) package offers exceptional
thermal performance for its physical size and is well suited to linear
mode applications.
Pin 1
G
D
D
D
Drain
Source
Features
D
S
• Max r
• Max r
= 35 mW at V = − 10 V, I = − 6.8 A
GS D
DS(on)
WDFN6 (MicroFET 2 x 2)
CASE 511CZ
= 65 mW at V = − 4.5 V, I = − 5.0 A
DS(on)
GS
D
• Low Profile − 0.8 mm Maximum − in the New Package WDFN6
(MicroFET 2 × 2 mm)
MARKING DIAGRAM
• HBM ESD Protection Level > 3k V Typical (Note 3)
• Free from Halogenated Compounds and Antimony Oxides
• RoHS Compliant
&Z&2&K
530
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current Continuous (Note 1a)
Pulsed
Ratings
−30
25
Unit
V
V
DS
V
GS
&Z = Assembly Plant Code
&2 = Date Code
&K = Lot Code
V
I
D
−6.8
−24
2.4
A
530 = Specific Device Code
P
D
Power
(Note 1a)
(Note 1b)
W
ORDERING INFORMATION
Dissipation
0.9
Device
Marking
T , T
Operating Junction and Storage
Temperature Range
−55 to
+150
°C
{
J
STG
Device
Package
Shipping
530
FDMA530PZ
WDFN6
3000 Units/
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
(MicroFET 2x2) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
THERMAL CHARACTERITICS
Symbol
Parameter
Ratings
52
Unit
R
Thermal Resistance,
Junction to Ambient
(Note 1a)
(Note 1b)
°C/W
q
JA
145
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
April, 2023 − Rev. 5
FDMA530PZ/D
FDMA530PZ
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= −250 mA, V = 0 V
−30
V
DSS
D
GS
DBV
Breakdown Voltage Temperature
Coefficient
= −250 mA,
referenced to 25°C
−23
mV/°C
DSS
D
DT
J
DSS
GSS
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= −24 V, V = 0 V
−1
mA
mA
DS
GS
I
=
25 V, V = 0 V
10
GS
DS
ON CHARACTERISTICS
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V , I = −250 mA
−1
−2.1
−3
V
DS
D
DV
Gate to Source Threshold Voltage
Temperature Coefficient
I
= −250 mA,
5.4
mV/°C
GS(th)
D
referenced to 25°C
DT
J
r
Static Drain to Source on Resistance
V
V
V
= −10 V, I = −6.8 A
30
52
43
35
65
63
mW
DS(on)
GS
GS
GS
D
= −4.5 V, I = −5.0 A
D
= −10 V, I = −6.8 A,
D
T = 125°C
J
g
FS
Forward Transconductance
V
DS
= −10 V, I = −6.8 A
17
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= −15 V, V = 0 V,
805
155
130
18
1070
210
195
38
pF
iss
DS
GS
f = 1 MHz
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
rss
R
f = 1 MHz
1
W
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
V
= −15 V, I = −6.8 A,
6
12
34
69
50
24
11
ns
d(on)
DD
GS
D
= −10 V, R
= 6 W
GEN
t
r
21
43
31
16
9
t
Turn−Off Delay Time
Fall Time
d(off)
t
f
Q
Q
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
V
= −10 V
= −5 V
nC
g
g
GS
GS
Q
V
D
= −15 V
3.1
4.5
gs
gd
DD
I
= −6.8 A
Q
DRAIN−SOURCE DIODE CHARACTERISTICS
I
S
Maximum Continuous Drain−Source
Diode Forward Current
−2
A
V
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
= 0 V, I = −2 A
−0.8
24
−1.2
36
V
SD
GS
S
t
I = −6.8 A,
ns
nC
rr
F
di/dt = 100 A/mS
Q
Reverse Recovery Charge
19
29
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins.
a. 52 °C/W when mounted on
b. 145 °C/W when mounted on
a minimum pad of 2 oz copper
2
a 1 in pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied.
www.onsemi.com
2
FDMA530PZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
24
20
16
12
8
3.5
V = −4.0 V
GS
V
= −4.5 V
GS
V
GS
= −3.5 V
3.0
2.5
2.0
V
= −10 V
GS
V
= −4.0 V
= −3.5 V
GS
V
GS
= −4.5 V
V
GS
= −5.0 V
V
= −5.0 V
= −10 V
GS
V
GS
1.5
1.0
0.5
V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
4
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
5
0
4
8
12
16
20
24
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
−I , DRAIN CURRENT (A)
D
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
1.8
1.6
200
150
I
D
= −3.4 A
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
I
V
= −6.8 A
D
= −10 V
GS
1.4
1.2
1.0
0.8
100
50
T
= 125°C
= 25°C
J
T
J
0
2
4
6
8
10
−50
−25
0
25
50
75
100
125
150
T , JUNCTION TEMPERATURE (5C)
J
−V , GATE TO SOURCE VOLTAGE (V)
GS
Figure 3. Normalized On−Resistance
Figure 4. On−Resistance vs. Gate to Source
vs. Junction Temperature
Voltage
24
30
10
V
GS
= 0 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
DD
= −5 V
T
J
= 125°C
18
12
1
0.1
T
J
= 25°C
0.01
T
J
= 125°C
T = −55°C
J
6
0
T = −55°C
J
0.001
T
J
= 25°C
0.0001
1
2
3
4
5
6
0.0
0.4
0.8
1.2
1.6
−V , GATE TO SOURCE VOLTAGE (V)
GS
−V , BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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3
FDMA530PZ
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
10
8
2000
I
D
= −6.8 A
C
C
iss
1000
V
DD
= −10 V
V
= −15 V
DD
6
V
DD
= −20 V
oss
4
C
rss
2
0
100
50
f = 1 Mhz
V
GS
= 0 V
0
3
6
9
12
15
18
0.1
1
10
20
Q , GATE CHARGE (nC)
g
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to
Source Voltage
1E−3
1E−4
1E−5
1E−6
1E−7
1E−8
1E−9
60
10
V
GS
= 0 V
r
LIMIT
DS(on)
100 us
1 ms
T
J
= 125°C
1
0.1
10 ms
V
= −4.5 V
GS
T
= 25°C
J
SINGLE PULSE
100 ms
1 s
10 s
R
= 145°C/W
q
JA
DC
T
= 25°C
A
0.01
0
5
10
15
20
25
30
35
0.1
1
10
100
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
−V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 9. Gate Leakage Current vs. Gate
to Source Voltage
Figure 10. Forward Bias Safe Operating Area
150
2
1
SINGLE PULSE
DUTY CYCLE − DESCENDING ORDER
R
= 145°C/W
q
JA
120
90
D = 0.5
0.2
T
A
= 25°C
0.1
0.05
0.02
0.01
P
DM
t
1
0.1
60
t
2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t /t
30
0
1
2
PEAK T = P
× Z
q
× R
+ T
JA A
q
J
DM
JA
0.01
−4
−3
−2
−1
0
1
2
3
−3
−2
−1
0
1
2
3
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
t, PULSE WIDTH (s)
t, RECTANGULAR PULSE DURATION (s)
Figure 11. Single Pulse Maximum
Power Dissipation
Figure 12. Transient Thermal Response Curve
POWERTRENCH is registered trademark and MicroFET is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or sub-
sidiaries in the United States and/or other countries.
www.onsemi.com
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511CZ
ISSUE O
DATE 31 JUL 2016
1.70
1.00
0.05
C
2.0
A
(0.20)
No Traces
2X
B
allowed in
this Area
4
6
2.0
1.05
2.30
0.47(6X)
0.05
C
PIN#1 IDENT
TOP VIEW
2X
1
3
0.40(6X)
0.65
0.75 0.05
RECOMMENDED
LAND PATTERN OPT 1
0.10
C
0.20 0.05
1.70
0.45
(0.20)
1.00
0.08
C
SIDE VIEW
C
0.025 0.025
4
6
SEATING
PLANE
2.00 0.05
(0.15)
0.90 0.05
PIN #1 IDENT
1.05
0.66
(0.50)
0.30 0.05
2.30
(0.20)4X
0.47(6X)
1
3
0.28 0.05
(6X)
1
3
0.56 0.05
1.00 0.05
0.40(7X)
0.65
RECOMMENDED
LAND PATTERN OPT 2
2.00 0.05
(6X)
(0.50)
NOTES:
6
4
A. PACKAGE DOES NOT FULLY CONFORM
0.30 0.05
0.10
TO JEDEC MO−229 REGISTRATION
0.65
C
C
A
B
B. DIMENSIONS ARE IN MILLIMETERS.
1.30
0.05
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
BOTTOM VIEW
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13614G
WDFN6 2X2, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
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