FDMC010N08LC [ONSEMI]
N 沟道，屏蔽门极，PowerTrench® MOSFET，80 V，51 A，10.9 mΩ;
| 型号： | FDMC010N08LC |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，屏蔽门极，PowerTrench® MOSFET，80 V，51 A，10.9 mΩ |
| 文件： | 总8页 (文件大小：380K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FDMC010N08LC
N‐Channel Shielded Gate
POWERTRENCH) MOSFET
80 V, 50 A, 10.9 mW
General Description
www.onsemi.com
This N-Channel MV MOSFET is produced using
ON Semiconductor’s advanced PowerTrench process that incorporates
Shielded Gate technology. This process has been optimized to
minimize on-state resistance and yet maintain superior switching
performance with best in class soft body diode.
V
R
MAX
I MAX
D
DS
DS(ON)
80 V
10.9 mW @ 10 V
18.4 mW @ 4.5 V
50 A
Features
• Shielded Gate MOSFET Technology
S (1, 2, 3)
• Max R
• Max R
= 10.9 mW at V = 10 V, I = 16 A
GS D
DS(on)
= 18.4 mW at V = 4.5 V, I = 13 A
DS(on)
GS
D
• 50% Lower Q than Other MOSFET Suppliers
G (4)
rr
• Lowers Switching Noise/EMI
• MSL1 Robust Package Design
• 100% UIL Tested
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
D (5, 6, 7, 8)
N-CHANNEL MOSFET
Applications
Pin 1
• Primary DC−DC MOSFET
• Synchronous Rectifier in DC−DC and AC−DC
• Motor Drive
Top
Bottom
• Solar
Power 33
(PQFN8)
CASE 483AX
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current:
Value
80
Unit
V
MARKING DIAGRAM
V
DS
V
GS
20
V
S
S
D
D
I
D
A
$Y&Z&3&K
FDMC010
N08LC
Continuous, T = 25°C (Note 5)
50
32
11
C
Continuous, T = 100°C (Note 5)
C
Continuous, T = 25°C (Note 1a)
S
D
D
A
Pulsed (Note 4)
200
G
E
Single Pulse Avalanche Energy
(Note 3)
96
mJ
W
AS
$Y
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
P
Power Dissipation:
D
&Z
&3
&K
T
= 25°C
52
2.3
C
T = 25°C (Note 1a)
A
FDMC010N08LC = Specific Device Code
T , T
Operating and Storage Junction
Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 3 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
December, 2017 − Rev. 2
FDMC010N08LC/D
FDMC010N08LC
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
2.4
Unit
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient (Note 1a)
°C/W
R
q
JC
JA
R
53
q
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
80
V
DSS
D
GS
DBV
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
76
mV/°C
DSS
D
/DT
J
DSS
GSS
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 64 V, V = 0 V
1
mA
DS
GS
I
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 90 mA
1.0
1.3
−5
3.0
V
GS(th)
GS
DS
D
DV
/DT
Gate to Source Threshold Voltage
Temperature Coefficient
= 90 mA, referenced to 25°C
mV/°C
GS(th)
D
J
R
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 16 A
8.9
12.5
15.0
55
10.9
18.4
17.6
mW
DS(on)
D
= 4.5 V, I = 13 A
D
= 10 V, I = 16 A, T = 125°C
D
J
g
FS
= 5 V, I = 16 A
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 40 V, V = 0 V, f = 1 MHz
1525
369
20
2135
515
30
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
rss
R
0.1
0.3
0.7
g
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Rise Time
V
R
= 40 V, I = 16 A, V = 10 V,
8
3
16
10
44
10
31
ns
ns
ns
ns
nC
d(on)
DD
D
GS
= 6 W
GEN
t
r
t
Turn-Off Delay Time
Fall Time
27
5
d(off)
t
f
Q
Total Gate Charge
V
GS
= 0 V to 10 V, V = 40 V,
22
g
DD
I
D
= 16 A
V
= 0 V to 4.5 V, V = 40 V,
= 16 A
11
15
nC
GS
DD
I
D
Q
Gate to Source Charge
Gate to Drain “Miller” Charge
Output Charge
V
DD
V
DD
V
DD
V
DS
= 40 V, I = 16 A
3
3
nC
nC
nC
nC
gs
D
Q
= 40 V, I = 16 A
D
gd
Q
= 40 V, V = 0 V
21
19.5
oss
GS
Q
Total Gate Charge Sync
= 0 V, I = 16 A
D
sync
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2
FDMC010N08LC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
DRAIN-SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 2 A (Note 2)
0.7
0.8
15
18
12
38
1.2
1.3
27
33
21
61
V
SD
GS
S
= 0 V, I = 16 A (Note 2)
GS
S
t
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
I = 16 A, di/dt = 300 A/ms
F
ns
nC
ns
rr
Q
rr
t
I = 16 A, di/dt = 1000 A/ms
F
rr
Q
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. R
is determined
CA
q
q
JA
by the user’s board design.
NOTES:
a) 53°C/W when mounted on
b) 125°C/W when mounted on
2
a 1 in pad of 2 oz copper.
a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. E of 96 mJ is based on starting T = 25°C; N-ch: L = 3 mH, I = 8 A, V = 80 V, V = 10 V. 100% test at L = 0.1 mH, I = 24 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Figure 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro-mechanical application board design.
ORDERING INFORMATION
Device
Marking
Package
Reel Size
Tape Width
Quantity
FDMC010N08LC
FDMC010N08LC
Power 33 (PQFN8)
(Pb-Free / Halogen Free)
13″
12 mm
3000 Units
www.onsemi.com
3
FDMC010N08LC
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
120
90
60
30
0
4
VGS = 10 V
VGS = 3 V
VGS = 6 V
VGS = 4.5 V
V
GS = 3.5 V
3
2
1
0
VGS = 4.5 V
VGS = 6 V
VGS = 3.5 V
VGS = 3 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 10 V
0
1
2
3
4
0
30
60
90
120
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance vs. Drain
Current and Gate Voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
150
ID = 16 A
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
VGS = 10 V
120
ID = 16 A
90
60
TJ = 125 o
C
30
0
TJ = 25 o
C
−75 −50 −25
0
25 50
75 100 125 150
0
2
4
6
8
10
, JUNCTION TEMPERATURE (5C)
TJ
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On-Resistance vs.
Junction Temperature
Figure 4. On-Resistance vs. Gate to Source
Voltage
120
90
60
30
0
200
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VDS = 5 V
100 VGS = 0 V
10
T
J = −55oC
TJ = 150 o
C
TJ = 150 o
C
1
0.1
TJ = 25 o
C
TJ = 25 o
C
TJ = −55oC
0.01
0.001
1
2
3
4
5
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
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4
FDMC010N08LC
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
10
8
5000
1000
Ciss
ID = 16 A
VDD = 40 V
Coss
6
100
10
VDD = 50 V
VDD = 30 V
4
Crss
2
f = 1 MHz
GS = 0 V
V
0
1
0
5
10
15
20
25
0.1
1
10
80
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
50
10
60
R
qJC = 2.4oC/W
50
40
30
20
10
0
V
GS = 10 V
TJ = 25 oC
TJ = 100 oC
VGS = 4.5 V
TJ = 125 o
C
1
0.001
0.01
0.1
1
10
50
25
50
75
100
125
150
, CASE TEMPERATURE (5C)
TC
tAV, TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain Current
vs. Case Temperature
10000
500
SINGLE PULSE
R
qJC = 2.4 oC/W
100
10
1
TC = 25 oC
10 ms
1000
100
10
100 ms
THIS AREA IS
LIMITED BY R
DS(on)
SINGLE PULSE
J = MAX RATED
qJC = 2.4oC/W
1 ms
T
R
10 ms
CURVE BENT TO
MEASURED DATA
T
C = 25 oC
100 ms/DC
0.1
10−5
10−4
10−3
t, PULSE WIDTH (sec)
10−2
10−1
0.1
1
10
100 500
1
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power
Dissipation
www.onsemi.com
5
FDMC010N08LC
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
P
DM
0.1
0.1
0.01
0.05
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
Z
SINGLE PULSE
qJC
qJC
o
R
= 2.4 C/W
qJC
Peak T = P
x Z (t) + T
J
DM
qJC C
Duty Cycle, D = t / t
1
2
0.001
10−5
10−4
10−3
t, RECTANGULAR PULSE DURATION (sec)
10−2
10−1
1
Figure 13. Junction-to-Case Transient Thermal Response Curve
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 3.3X3.3, 0.65P
CASE 483AX
ISSUE B
DATE 24 JUN 2022
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13673G
PQFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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