FDMS7570S [ONSEMI]
25V N沟道PowerTrench® SyncFET™;
| 型号： | FDMS7570S |
| 厂家： | 
ONSEMI |
| 描述： | 25V N沟道PowerTrench® SyncFET™ PC 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总9页 (文件大小：434K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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October 2014
FDMS7570S
N-Channel PowerTrench® SyncFETTM
25 V, 49 A, 1.95 mΩ
Features
General Description
The FDMS7570S has been designed to minimize losses in
power conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
rDS(on) while maintaining excellent switching performance. This
device has the added benefit of an efficient monolithic Schottky
body diode.
Max rDS(on) = 1.95 mΩ at VGS = 10 V, ID = 28 A
Max rDS(on) = 2.85 mΩ at VGS = 4.5 V, ID = 22 A
Advanced Package and Silicon combination for low rDS(on)
and high efficiency
SyncFET Schottky Body Diode
MSL1 robust package design
100% UIL tested
Applications
Synchronous Rectifier for Synchronous Buck Converters
Notebook
Server
RoHS Compliant
Telecom
High Efficiency DC-DC Switch Mode Power Supplies
Bottom
Top
Pin 1
D
D
D
G
5
6
7
8
4
3
2
1
S
S
S
G
S
S
S
D
D
D
D
D
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
25
±20
V
V
(Note 4)
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
TC = 25 °C
TC = 25 °C
TA = 25 °C
49
156
ID
A
(Note 1a)
(Note 3)
(Note 1a)
28
-Pulsed
180
EAS
Single Pulse Avalanche Energy
Power Dissipation
144
mJ
W
TC = 25 °C
TA = 25 °C
83
PD
Power Dissipation
2.5
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
1.5
50
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
FDMS7570S
FDMS7570S
Power 56
3000 units
©2011 Fairchild Semiconductor Corporation
FDMS7570S Rev.C2
www.fairchildsemi.com
1
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 1 mA, VGS = 0 V
D = 10 mA, referenced to 25 °C
VDS = 20 V, VGS = 0 V
25
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
22
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
500
100
μA
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V
nA
On Characteristics (Note 2)
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 1 mA
D = 10 mA, referenced to 25 °C
GS = 10 V, ID = 28 A
1.2
1.7
-5
3.0
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
mV/°C
V
1.6
2.3
2.4
170
1.95
2.85
3.0
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 22 A
mΩ
VGS = 10 V, ID = 28 A, TJ = 125 °C
VDS = 5 V, ID = 28 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
3392
912
172
1.2
4515
1215
260
pF
pF
pF
Ω
VDS = 13 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
2.1
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
14
5.9
34
4
25
12
55
10
69
32
ns
ns
VDD = 13 V, ID = 28 A,
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
ns
ns
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 4.5 V
49
22
9.9
5.3
nC
nC
nC
nC
Qg
VDD = 13 V,
D = 28 A
I
Qgs
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 2 A
(Note 2)
(Note 2)
0.43
0.78
28
0.8
1.2
45
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 28 A
trr
Reverse Recovery Time
ns
IF = 28 A, di/dt = 300 A/ μs
Qrr
Reverse Recovery Charge
27
43
nC
Notes:
2
1. R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined by
θCA
θJA
θJC
the user's board design.
a. 50 °C/W when mounted on a
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2
1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E of 144 mJ is based on starting T = 25 °C, L = 1 mH, I = 17 A, V = 23 V, V = 10 V. 100% test at L = 0.3 mH, I = 25 A.
AS
J
AS
DD
GS
AS
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
FDMS7570S Rev.C2
www.fairchildsemi.com
2
Typical Characteristics TJ = 25 °C unless otherwise noted
180
8
6
4
2
0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 2.7 V
VGS = 10 V
135
VGS = 4.5 V
VGS = 3 V
VGS = 3.5 V
VGS = 3 V
90
VGS = 3.5 V
VGS = 4.5 V
VGS = 10 V
45
VGS = 2.7 V
0
0
1
2
3
4
5
0
45
90
135
180
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
8
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 28 A
GS = 10 V
ID = 28 A
1.4
1.3
1.2
1.1
1.0
0.9
0.8
V
6
4
2
0
TJ = 125 oC
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
180
200
100
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
135
90
45
0
10
VDS = 5 V
TJ = 125 o
C
TJ = 125 o
C
1
TJ = 25 oC
TJ = -55 o
TJ = 25 o
C
C
0.1
0.01
TJ = -55 o
C
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
FDMS7570S Rev.C2
www.fairchildsemi.com
3
Typical Characteristics TJ = 25 °C unless otherwise noted
10
5000
1000
ID = 28A
8
Ciss
VDD = 13 V
6
VDD = 10 V
VDD = 16 V
Coss
4
2
0
f = 1 MHz
= 0 V
V
GS
Crss
100
0.1
1
10
30
0
10
20
30
40
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
160
120
80
40
0
50
VGS = 10 V
TJ = 25 oC
10
VGS = 4.5 V
TJ = 100 oC
TJ = 125 o
C
RθJC = 1.5 oC/W
Limited by Package
1
0.01
25
50
75
100
125
150
0.1
1
10
100
1000
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 9. Unclamped Inductive Switching Capability
Figure10. MaximumContinuousDrain
Current vs Case Temperature
500
5000
100
1000
100
10
100 us
SINGLE PULSE
θJA = 125 oC/W
TA = 25 oC
1 ms
10
1
R
10 ms
THIS AREA IS
LIMITED BY r
100 ms
DS(on)
SINGLE PULSE
TJ = MAX RATED
1s
0.1
0.01
R
θJA = 125 oC/W
10s
DC
TA = 25 oC
1
0.5
0.01
0.1
1
10
100
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
100 1000
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure11. F o r w a r d B i a s S a f e
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
FDMS7570S Rev.C2
www.fairchildsemi.com
4
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1
0.02
0.01
P
DM
0.01
t
1
t
2
SINGLE PULSE
0.001
NOTES:
DUTY FACTOR: D = t /t
R
θJA = 125 oC/W
1
2
PEAK T = P
x Z
x R
+ T
J
DM
θJA
θJA A
0.0001
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
FDMS7570S Rev.C2
www.fairchildsemi.com
5
Typical Characteristics (continued)
SyncFET Schottky body diode
Characteristics
Schottky barrier diodes exhibit significant leakage at high tem-
perature and high reverse voltage. This will increase the power
in the device.
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MoSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 14 shows the reverses recovery
characteristic of the FDMS7570S.
10-2
30
25
TJ = 125 o
C
10-3
10-4
10-5
10-6
20
TJ = 100 o
C
di/dt = 300 A/μs
15
10
5
TJ = 25 o
C
0
-5
0
50
100
150
200
0
5
10
15
20
25
TIME (ns)
VDS, REVERSE VOLTAGE (V)
Figure 14. FDMS7570S SyncFET body
diode reverse recovery characteristic
Figure 15. SyncFET body diode reverses
leakage versus drain-source voltage
FDMS7570S Rev.C2
www.fairchildsemi.com
6
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10
3.91
5.10
PKG
A
SEE
DETAIL B
1.27
6.61
C
L
B
8
7
6
5
8
5
0.77
4.52
3.75
5.85
5.65
C
PKG
6.15
L
KEEP OUT
AREA
1.27
1
4
1
2
3
4
TOP VIEW
0.61
1.27
3.81
LAND PATTERN
RECOMMENDATION
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FOUR SIDES
SEE
DETAIL C
5.00
4.80
OF THE PACKAGE
0.35
0.15
ꢀꢁꢂꢃ
0.10 C
0.30
0.05
0.05
0.00
SIDE VIEW
ꢀꢁꢂꢃ
8X
0.08 C
C
0.35
0.15
5.20
4.80
1.10
0.90
SEATING
PLANE
DETAIL C
DETAIL B
SCALE: 2:1
3.81
SCALE: 2:1
1.27
0.51
(8X)
0.31
NOTES: UNLESS OTHERWISE SPECIFIED
(0.34)
A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,
ISSUE A, VAR. AA,.
0.10
C A B
1
2
3
4
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
0.76
0.51
(0.52)
D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.
E. IT IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP OUT AREA.
6.25
5.90
+0.30
3.48
-0.10
(0.50)
(0.30)
(2X)
8
7
6
5
ꢀꢄꢅꢅꢀꢄꢂꢀ
+0.10
-0.15
0.20
(8X)
3.96
3.61
BOTTOM VIEW
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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