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October 2014

FDMS7578

N-Channel Power Trench^®MOSFET

25 V,60 A, 5.8 mΩ

Features

General Description

Max r_DS(on)= 5.8 mΩ at V_GS= 10 V, I_D= 17 A

Max r_DS(on)= 8 mΩ at V_GS= 4.5 V, I_D= 14 A

This N-Channel MOSFET has been designed specifically to

improve the overall efficiency and to minimize switch node

ringing of DC/DC converters using either synchronous or

conventional switching PWM controllers. It has been optimized

for low gate charge, low r_DS(on),fast switching speed and body

diode reverse recovery performance.

Advanced Package and Silicon combination for low r_DS(on)

and high efficiency

Next generation enhanced body diode technology, engineered

for soft recovery

Applications

MSL1 robust package design

100% UIL tested

Control MOSFET for Synchronous Buck Converters

Notebook

RoHS Compliant

Server

Telecomm

High Efficiency DC-DC Switch Mode Power Supplies

Bottom

Top

Pin 1

S

G

S

D

5

6

7

8

4

3

S

G

2

1

D

Power 56

MOSFET Maximum Ratings T_A= 25 °C unless otherwise noted

Symbol

V_DS

V_GS

Parameter

Ratings

Units

Drain to Source Voltage

Gate to Source Voltage

Drain Current -Continuous

-Continuous

25

V

(Note 4)

±20

T_C= 25 °C

T_A= 25 °C

60

I_D

(Note 1a)

(Note5)

17

A

-Pulsed

90

E_AS

Single Pulse Avalanche Energy

Power Dissipation

(Note 3)

40

33

mJ

W

T_C= 25 °C

T_A= 25 °C

P_D

Power Dissipation

(Note 1a)

2.5

T_J, T_STG

Operating and Storage Junction Temperature Range

-55 to +150

°C

Thermal Characteristics

R_θJC

R_θJA

Thermal Resistance, Junction to Case

Thermal Resistance, Junction to Ambient

3.7

50

°C/W

(Note 1a)

Package Marking and Ordering Information

Device Marking

Device

Package

Reel Size

13 ’’

Tape Width

12 mm

Quantity

FDMS7578

Power 56

3000 units

1

FDMS7578 Rev.C2

www.fairchildsemi.com

Electrical Characteristics T_J= 25 °C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

BV_DSS

Drain to Source Breakdown Voltage

I_D= 250 μA, V_GS= 0 V

25

V

ΔBV_DSS

ΔT_J

Breakdown Voltage Temperature

Coefficient

I_D= 250 μA, referenced to 25 °C

V_DS= 20 V, V_GS= 0 V

20

mV/°C

I_DSS

I_GSS

Zero Gate Voltage Drain Current

1

μA

Gate to Source Leakage Current,Forward V_GS= 20 V, V_DS= 0 V

100

nA

On Characteristics

V_GS(th)

Gate to Source Threshold Voltage

V_GS= V_DS, I_D= 250 μA

_D= 250 μA, referenced to 25 °C

_GS= 10 V, I_D= 17 A

1.0

1.6

-6

3.0

V

ΔV_GS(th)

ΔT_J

Gate to Source Threshold Voltage

Temperature Coefficient

I

mV/°C

V

4.6

6.3

6.7

77

5.8

8

r_DS(on)

g_FS

Static Drain to Source On Resistance

Forward Transconductance

V_GS= 4.5 V, I_D= 14 A

mΩ

V_GS= 10 V, I_D= 17 A, T_J= 125 °C

V_DD= 5 V, I_D= 17 A

8.5

S

Dynamic Characteristics

C_iss

C_oss

C_rss

R_g

Input Capacitance

1221

371

54

1625

495

85

pF

Ω

V_DS= 13 V, V_GS= 0 V,

f = 1 MHz

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance

1.2

2.4

Switching Characteristics

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

Rise Time

8

17

10

33

10

25

11

ns

2.6

20

2.2

18

8

V

_DD= 13 V, I_D= 17 A,

V_GS= 10 V, R_GEN= 6 Ω

Turn-Off Delay Time

Fall Time

ns

Total Gate Charge

Gate to Drain “Miller” Charge

V_GS= 0 V to 10 V

nC

Q_g(TOT)

V

_GS= 0 V to 4.5 V

V

_DD= 13 V

I_D= 17 A

Q_gs

Q_gd

3.7

1.7

Drain-Source Diode Characteristics

V

_GS= 0 V, I_S= 2 A

(Note 2)

0.72

0.83

20

1.1

1.2

32

12

34

24

V_SD

Source to Drain Diode Forward Voltage

V

V_GS= 0 V, I_S= 17 A

t_rr

Reverse Recovery Time

Reverse Recovery Charge

Reverse Recovery Time

Reverse Recovery Charge

ns

nC

ns

I_F= 17 A, di/dt = 100 A/μs

Q_rr

t_rr

6

19

I_F= 17 A, di/dt = 300 A/μs

Q_rr

13

nC

NOTES:

2

1. R

is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

is guaranteed by design while R

is determined by

θCA

θJA

θJC

the user's board design.

a. 50 °C/W when mounted on

a 1 in pad of 2 oz copper

b.125 °C/W when mounted on

a minimum pad of 2 oz copper

2

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.

3. E of 40 mJ is based on starting T = 25 °C, L = 1 mH, I = 9 A, V = 23 V, V = 10 V. 100% test at L = 0.3 mH, I = 14 A.

AS

J

AS

DD

GS

AS

4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.

5. Pulse Id refers to Figure.11 Forward Bias Safe Operation Area.

FDMS7578 Rev.C2

www.fairchildsemi.com

2

Typical Characteristics T_J= 25 °C unless otherwise noted

90

12

10

8

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

V_GS= 10 V

V_GS= 2.5 V

75

V_GS= 3.5 V

V_GS= 4.5 V

V_GS= 3 V

60

45

30

15

0

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

V_GS= 3 V

6

V_GS= 3.5 V

4

V_GS= 10 V

V_GS= 4.5 V

2

V_GS= 2.5 V

0

0.5

1.0

1.5

2.0

2.5

3.0

0

15

30

45

60

75

90

I_D, DRAIN CURRENT (A)

V_DS, DRAIN TO SOURCE VOLTAGE (V)

Figure 1. On-Region Characteristics

Figure2. N o r m a l i z e d O n - R e s i s ta n c e

vs Drain Current and Gate Voltage

20

1.6

I_D= 17 A

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

I_D= 17 A

V_GS= 10 V

15

10

5

T_J= 125 ^o

C

T_J= 25 ^o

C

0

2

4

6

8

10

-75 -50 -25

0

25 50 75 100 125 150

T_J, JUNCTION TEMPERATURE (^oC)

V_GS, GATE TO SOURCE VOLTAGE (V)

F i gu re 3 . N orma li zed On - Res is ta nc e

vs Junction Temperature

Figure4. On-Resistance vs Gate to

Source Voltage

90

10

90

V_GS= 0 V

V_DS= 5 V

75

60

45

30

15

0

T_J= 150 ^o

C

T_J= 25 ^oC

T_J= 25 ^o

C

1

0.1

T_J= 150 ^o

C

T_J= -55 ^o

C

T_J= -55 ^o

C

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

0.01

1

2

3

4

5

0.2

0.4

0.6

0.8

1.0

1.2

V_GS, GATE TO SOURCE VOLTAGE (V)

V_SD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics

Figure6. Source to Drain Diode

Forward Voltage vs Source Current

FDMS7578 Rev.C2

www.fairchildsemi.com

3

Typical Characteristics T_J= 25 °C unless otherwise noted

10

5000

1000

I_D= 17 A

8

C_iss

V_DD= 16 V

V_DD= 10 V

6

4

2

0

V_DD= 13 V

C_oss

100

10

C_rss

f = 1 MHz

= 0 V

V

GS

0

5

10

15

20

0.1

1

10

25

Q_g, GATE CHARGE (nC)

V_DS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics

Figure8. C a p a c i t a n c e v s D r a i n

to Source Voltage

80

60

40

20

0

50

T_J= 25 ^oC

T_J= 100 ^oC

V_GS= 10 V

10

T_J= 125 ^o

C

Limited by Package

R_θJC= 3.7 ^oC/W

V_GS= 4.5 V

1

0.01

25

50

75

100

125

150

0.1

1

10

100

T_C, CASE TEMPERATURE (^oC)

t_AV, TIME IN AVALANCHE (ms)

Figure9. U n c l a m p e d I n d u c t i v e

Switching Capability

Figure10. Maximum Continuous Drain

Current vs Case Temperature

10⁵

500

100

SINGLE PULSE

_θJC= 3.7 ^oC/W

T_C= 25 ^oC

R

10⁴

10³

10²

10¹

10

1

THIS AREA IS

LIMITED BY r_DS(on)

100 μs

SINGLE PULSE

T_J= MAX RATED

1 ms

10 ms

DC

R

_θJC= 3.7 ^oC/W

T_C= 25 ^oC

CURVE BENT TO

MEASURED DATA

0.1

10^-6

10^-5

10^-4

t, PULSE WIDTH (sec)

10^-3

10^-2

10^-1

0.1

1

10

100

1

V_DS, DRAIN to SOURCE VOLTAGE (V)

Figure 11. Forward Bias Safe

Operating Area

Figure12. Single Pulse Maximum

Power Dissipation

FDMS7578 Rev.C2

www.fairchildsemi.com

4

Typical Characteristics T_J= 25 °C unless otherwise noted

2

DUTY CYCLE-DESCENDING ORDER

1

D = 0.5

0.2

0.1

0.01

0.05

0.02

0.01

P

DM

t

1

t

2

SINGLE PULSE

R_θJC= 3.7 ^oC/W

NOTES:

DUTY FACTOR: D = t /t

1

2

PEAK T = P

x Z

x R

+ T

J

DM

θJC

θJC C

0.001

10^-6

10^-5

10^-4

10^-3

10^-2

10^-1

1

t, RECTANGULAR PULSE DURATION (sec)

Figure 13. Transient Thermal Response Curve

FDMS7578 Rev.C2

www.fairchildsemi.com

5

PQFN8 5X6, 1.27P

CASE 483AE

ISSUE A

5.10

3.91

5.10

PKG

A

SEE

DETAIL B

1.27

6.61

C

L

B

8

7

6

5

8

5

0.77

4.52

3.75

5.85

5.65

C

PKG

6.15

L

KEEP OUT

AREA

1.27

1

4

1

2

3

4

TOP VIEW

0.61

1.27

3.81

LAND PATTERN

RECOMMENDATION

OPTIONAL DRAFT

ANGLE MAY APPEAR

ON FOUR SIDES

SEE

DETAIL C

5.00

4.80

OF THE PACKAGE

0.35

0.15

ꢀꢁꢂꢃ

0.10 C

0.30

0.05

0.00

SIDE VIEW

ꢀꢁꢂꢃ

8X

0.08 C

C

0.35

0.15

5.20

4.80

1.10

0.90

SEATING

PLANE

DETAIL C

DETAIL B

SCALE: 2:1

3.81

SCALE: 2:1

1.27

0.51

(8X)

0.31

NOTES: UNLESS OTHERWISE SPECIFIED

(0.34)

A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,

ISSUE A, VAR. AA,.

0.10

C A B

1

2

3

4

B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.

MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.

C. ALL DIMENSIONS ARE IN MILLIMETERS.

0.76

0.51

(0.52)

D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.

E. IT IS RECOMMENDED TO HAVE NO TRACES OR

VIAS WITHIN THE KEEP OUT AREA.

6.25

5.90

+0.30

3.48

-0.10

(0.50)

(0.30)

(2X)

8

7

6

5

ꢀꢄꢅꢅꢀꢄꢂꢀ

+0.10

-0.15

0.20

(8X)

3.96

3.61

BOTTOM VIEW

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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1


型号：	FDMS7578
厂家：	ONSEMI
描述：	N 沟道，Power Trench® MOSFET，25V，60A，5.8mΩ 开关脉冲光电二极管晶体管
文件：	总8页 (文件大小：401K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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