FDMS7676 [ONSEMI]
30V N沟道PowerTrench® MOSFET;
| 型号： | FDMS7676 |
| 厂家： | 
ONSEMI |
| 描述： | 30V N沟道PowerTrench® MOSFET 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总8页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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October 2014
FDMS7676
N-Channel PowerTrench® MOSFETꢀ
30 V, 5.5 m:
Features
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
Max rDS(on) = 5.5 m: at VGS = 10 V, ID = 19 A
Max rDS(on) = 7.6 m: at VGS = 4.5 V, ID = 15 A
Advanced Package and Silicon design for low rDS(on) and high
efficiency
Next generation enhanced body diode technology, engineered
for soft recovery. Provides Schottky-like performance with
minimum EMI in sync buck converter applications
Applications
IMVP Vcore Switching for Notebook
VRM Vcore Switching for Desktop and Server
OringFET / Load Switch
MSL1 robust package design
100% UIL tested
RoHS Compliant
DC-DC Conversion
Bottom
Top
Pin 1
S
G
S
S
S
D
D
D
D
5
6
7
8
4
3
S
S
G
2
1
D
D
D
D
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
30
V
V
(Note 4)
20
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
TC = 25 °C
TC = 25 °C
TA = 25 °C
28
76
ID
A
(Note 1a)
(Note 3)
(Note 1a)
16
-Pulsed
90
EAS
Single Pulse Avalanche Energy
Power Dissipation
72
48
mJ
W
TC = 25 °C
TA = 25 °C
PD
Power Dissipation
2.5
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RTJC
RTJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.6
50
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
FDMS7676
FDMS7676
Power 56
3000 units
©2009 Fairchild Semiconductor Corporation
FDMS7676 RevꢀC1
www.fairchildsemi.com
1
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 PA, VGS = 0 V
30
V
'BVDSS
ꢀꢀꢀ'TJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 PA, referenced to 25 °C
15
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
PA
nA
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V
100
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 PA
D = 250 PA, referenced to 25 °C
GS = 10 V, ID = 19 A
1.25
2.0
-7
3.0
V
ꢀ'VGS(th)
ꢀꢀꢀ'TJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
mV/°C
V
3.8
5.4
5.2
64
5.5
7.6
7.5
rDS(on)
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5 V, ID = 15 A
m:
VGS = 10 V, ID = 19 A, TJ = 125 °C
VDS = 5 V, ID = 19 A
gFS
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
2225
685
90
2960
910
130
1.5
pF
pF
pF
:
VDS = 15 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.7
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
13
5
23
10
40
10
44
19
ns
ns
VDD = 15 V, ID = 19 A,
VGS = 10 V, RGEN = 6 :
Turn-Off Delay Time
Fall Time
25
4
ns
ns
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
31
14
7.6
3.7
nC
nC
nC
nC
Qg
VGS = 0 V to 4.5 V
VDD = 15 V,
ID = 19 A
Qgs
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 2.1 A
(Note 2)
(Note 2)
0.7
0.8
32
14
15
17
1.1
26
25
0.95
1.1
51
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 19 A
trr
Qrr
ta
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
Softness (tb/ta)
ns
nC
nC
nC
24
IF = 19 A, di/dt = 100 A/Ps
tb
S
trr
Reverse Recovery Time
Reverse Recovery Charge
42
40
ns
IF = 19 A, di/dt = 300 A/Ps
Qrr
Notes:
nC
2
1. R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
the user's board design.
is guaranteed by design while R is determined by
TCA
TJA
TJC
a. 50 °C/W when mounted on a
2
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 Ps, Duty cycle < 2.0%.
3. E of 72 mJ is based on starting T = 25 °C, L = 1 mH, I = 12 A, V = 27 V, V = 10 V. 100% test at L = 0.3 mH, I = 17 A.
AS
J
AS
DD
GS
AS
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
FDMS7676 Rev. C1ꢀ
www.fairchildsemi.com
2
Typical Characteristics TJ = 25 °C unless otherwise noted
90
6
5
4
3
2
1
0
VGS = 10 V
PULSE DURATION = 80 Ps
DUTY CYCLE = 0.5% MAX
VGS = 5 V
VGS = 4 V
VGS = 3.5 V
60
VGS = 4 V
PULSE DURATION = 80
Ps
VGS = 4.5 V DUTY CYCLE = 0.5% MAX
VGS = 4.5 V
30
VGS = 3.5 V
VGS = 10 V
90
VGS = 5 V
0
0.0
0.5
1.0
1.5
2.0
0
30
60
VDS DRAIN TO SOURCE VOLTAGE (V)
,
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
16
ID = 19 A
PULSE DURATION = 80 Ps
DUTY CYCLE = 0.5% MAX
VGS = 10 V
ID = 19 A
1.4
1.2
1.0
0.8
0.6
12
8
TJ = 125 o
C
4
TJ = 25 o
C
0
-75 -50 -25
0
25 50 75 100 125 150
2
4
6
8
10
TJ,
JUNCTION TEMPERATURE ( )
oC
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
90
60
30
0
100
PULSE DURATION = 80
DUTY CYCLE = 0.5% MAX
P
s
VGS = 0 V
10
1
VDS = 5 V
TJ = 150 o
C
TJ = 25 oC
TJ = 150 o
C
0.1
TJ = 25 o
C
TJ = -55 o
C
TJ = -55 o
C
0.01
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0
1
2
3
4
5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
FDMS7676 Rev. C1ꢀ
www.fairchildsemi.com
3
Typical Characteristics TJ = 25 °C unless otherwise noted
10
5000
1000
ID = 19 A
8
Ciss
VDD = 10 V
VDD = 15 V
6
VDD = 20 V
Coss
4
2
0
100
50
f = 1 MHz
= 0 V
V
GS
Crss
0
4
8
12
16
20
24
28
32
0.1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
90
60
30
0
50
VGS = 10 V
10
TJ = 25 o
C
VGS = 4.5 V
TJ = 100 oC
TJ = 125 o
C
RTJC = 2.6 oC/W
Limited by Package
1
0.01
0.1
1
10
100
25
50
75
100
125
150
oC
tAV, TIME IN AVALANCHE (ms)
TC,
CASE TEMPERATURE ( )
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
200
100
1000
VGS = 10 V
SINGLE PULSE
RTJA = 125 oC/W
TA = 25 oC
100
Ps
10
1
100
10
1 ms
10 ms
THIS AREA IS
100 ms
LIMITED BY r
DS(on)
1 s
10 s
DC
SINGLE PULSE
TJ = MAX RATED
RTJA = 125 oC/W
TA = 25 oC
0.1
1
0.01
0.5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
0.01
0.1
1
10
100 200
100 1000
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
FDMS7676 Rev. Cꢀ1
www.fairchildsemi.com
4
Typical Characteristics TJ = 25 °C unless otherwise noted
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
0.01
0.001
NOTES:
DUTY FACTOR: D = t /t
1
2
SINGLE PULSE
RTJA = 125 oC/W
PEAK T = P
J
x Z
x R
+ T
DM
TJA
TJA A
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
20
16
12
8
di/dt = 300 A/Ps
4
0
-4
0
25
50
75
TIMES (nS)
100
125
150
Figure 14. Body Diode Reverse Recovery
Characteristics
FDMS7676 Rev. Cꢀ1D
www.fairchildsemi.com
5
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10
3.91
5.10
PKG
A
SEE
DETAIL B
1.27
6.61
C
L
B
8
7
6
5
8
5
0.77
4.52
3.75
5.85
5.65
C
PKG
6.15
L
KEEP OUT
AREA
1.27
1
4
1
2
3
4
TOP VIEW
0.61
1.27
3.81
LAND PATTERN
RECOMMENDATION
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FOUR SIDES
SEE
DETAIL C
5.00
4.80
OF THE PACKAGE
0.35
0.15
ꢀꢁꢂꢃ
0.10 C
0.30
0.05
0.05
0.00
SIDE VIEW
ꢀꢁꢂꢃ
8X
0.08 C
C
0.35
0.15
5.20
4.80
1.10
0.90
SEATING
PLANE
DETAIL C
DETAIL B
SCALE: 2:1
3.81
SCALE: 2:1
1.27
0.51
(8X)
0.31
NOTES: UNLESS OTHERWISE SPECIFIED
(0.34)
A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,
ISSUE A, VAR. AA,.
0.10
C A B
1
2
3
4
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
0.76
0.51
(0.52)
D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.
E. IT IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP OUT AREA.
6.25
5.90
+0.30
3.48
-0.10
(0.50)
(0.30)
(2X)
8
7
6
5
ꢀꢄꢅꢅꢀꢄꢂꢀ
+0.10
-0.15
0.20
(8X)
3.96
3.61
BOTTOM VIEW
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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