FDMS7692 [ONSEMI]

N 沟道,PowerTrench® MOSFET,30V,7.5mΩ;
FDMS7692
型号: FDMS7692
厂家: ONSEMI    ONSEMI
描述:

N 沟道,PowerTrench® MOSFET,30V,7.5mΩ

开关 脉冲 光电二极管 晶体管
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January 2015  
FDMS7692  
N-Channel PowerTrench® MOSFET  
30 V, 7.5 mΩ  
Features  
General Description  
This N-Channel MOSFET has been designed specifically to  
improve the overall efficiency and to minimize switch node  
ringing of DC/DC converters using either synchronous or  
conventional switching PWM controllers. It has been optimized  
for low gate charge, low rDS(on), fast switching speed and body  
diode reverse recovery performance.  
„ Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 13 A  
„ Max rDS(on) = 13 mΩ at VGS = 4.5 V, ID = 10 A  
„ Advanced Package and Silicon combination for low rDS(on)  
and high efficiency  
„ Next generation enhanced body diode technology, engineered  
for soft recovery.  
Applications  
„ MSL1 robust package design  
„ 100% UIL tested  
„ IMVP Vcore Switching for Notebook  
„ VRM Vcore Switching for Desktop and Server  
„ OringFET / Load Switch  
„ RoHS Compliant  
„ DC-DC Conversion  
Top  
Bottom  
Pin 1  
S
G
S
S
S
D
D
D
D
5
6
7
8
4
3
S
S
G
2
1
D
D
D
D
Power 56  
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted  
Symbol  
VDS  
Parameter  
Ratings  
Units  
Drain to Source Voltage  
30  
V
V
V
VDSt  
VGS  
Drain to Source Transient Voltage ( t  
Gate to Source Voltage  
< 100 ns)  
33  
Transient  
±20  
Drain Current -Continuous (Package limited)  
-Continuous (Silicon limited)  
-Continuous  
TC = 25 °C  
28  
TC = 25 °C  
TA = 25 °C  
47  
ID  
A
(Note 1a)  
(Note 3)  
(Note 1a)  
14  
-Pulsed  
50  
EAS  
Single Pulse Avalanche Energy  
Power Dissipation  
21  
27  
mJ  
W
TC = 25 °C  
TA = 25 °C  
PD  
Power Dissipation  
2.5  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJC  
RθJA  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
4.6  
50  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13 ’’  
Tape Width  
12 mm  
Quantity  
FDMS7692  
FDMS7692  
Power 56  
3000 units  
©2011 Fairchild Semiconductor Corporation  
FDMS7692 Rev.D4  
www.fairchildsemi.com  
1
Electrical Characteristics TJ = 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = 250 μA, VGS = 0 V  
30  
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
I
D = 250 μA, referenced to 25 °C  
13  
mV/°C  
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
VDS = 24 V, VGS = 0 V  
1
μA  
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V  
100  
nA  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = 250 μA  
D = 250 μA, referenced to 25 °C  
GS = 10 V, ID = 13 A  
1.2  
2.0  
-6  
3.0  
V
ΔVGS(th)  
ΔTJ  
Gate to Source Threshold Voltage  
Temperature Coefficient  
I
mV/°C  
V
6.5  
9.5  
9.0  
68  
7.5  
13  
11  
rDS(on)  
gFS  
Static Drain to Source On Resistance  
Forward Transconductance  
VGS = 4.5 V, ID = 10 A  
mΩ  
VGS = 10 V, ID = 13 A, TJ = 125 °C  
VDS = 5 V, ID = 13 A  
S
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1015  
325  
45  
1350  
435  
65  
pF  
pF  
pF  
Ω
VDS = 15 V, VGS = 0 V,  
f = 1 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
1.0  
2.0  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
8
16  
10  
31  
10  
22  
10  
ns  
ns  
2.7  
17  
2.3  
15  
7
VDD = 15 V, ID = 13 A,  
V
GS = 10 V, RGEN = 6 Ω  
Turn-Off Delay Time  
Fall Time  
ns  
ns  
Qg  
Total Gate Charge  
Total Gate Charge  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
VGS = 0 V to 10 V  
VGS = 0 V to 4.5 V  
nC  
nC  
nC  
nC  
Qg  
VDD = 15 V,  
D = 13 A  
I
Qgs  
Qgd  
3.4  
1.9  
Drain-Source Diode Characteristics  
V
GS = 0 V, IS = 2.1 A  
(Note 2)  
(Note 2)  
0.75  
0.84  
21  
1.1  
1.2  
34  
12  
31  
21  
VSD  
Source to Drain Diode Forward Voltage  
V
VGS = 0 V, IS = 13 A  
trr  
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Time  
Reverse Recovery Charge  
ns  
nC  
ns  
IF = 13 A, di/dt = 100 A/μs  
Qrr  
trr  
6
17  
IF = 13 A, di/dt = 300 A/μs  
Qrr  
12  
nC  
Notes:  
2
1. R  
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R is determined by  
θCA  
θJA  
θJC  
the user's board design.  
a. 50 °C/W when mounted on a  
b. 125 °C/W when mounted on a  
minimum pad of 2 oz copper.  
2
1 in pad of 2 oz copper.  
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.  
3. Starting T = 25 °C, L = 0.3 mH, I = 12 A, V = 27 V, V = 10 V.  
J
AS  
DD  
GS  
©2011 Fairchild Semiconductor Corporation  
FDMS7692 Rev.D4  
www.fairchildsemi.com  
2
Typical Characteristics TJ = 25 °C unless otherwise noted  
50  
10  
8
VGS = 3.0 V  
VGS = 10 V  
40  
VGS = 4.5 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
VGS = 4.0 V  
30  
20  
10  
0
6
VGS = 3.5 V  
VGS = 3.5 V  
4
VGS = 4.0 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
2
VGS = 3.0 V  
VGS = 4. 5 V  
30  
VGS = 10 V  
40  
0
0.0  
0.5  
1.0  
1.5  
2.0  
0
10  
20  
50  
ID, DRAIN CURRENT (A)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 1. On Region Characteristics  
Figure2. N o r m a l i z e d O n - R e s i s ta n c e  
vs Drain Current and Gate Voltage  
1.6  
30  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
ID = 13 A  
ID = 13 A  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
VGS = 10 V  
25  
20  
15  
10  
5
TJ = 125 o  
C
TJ = 25 o  
C
-75 -50 -25  
0
25 50 75 100 125 150  
2
4
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs Junction Temperature  
Figure4. On-Resistance vs Gate to  
Source Voltage  
50  
100  
PULSE DURATION = 80 μs  
VGS = 0 V  
DUTY CYCLE = 0.5% MAX  
40  
30  
20  
10  
0
10  
1
VDS = 5 V  
TJ = 150 o  
C
TJ = 150 o  
C
TJ = 25 o  
C
TJ = 25 o  
C
0.1  
TJ = -55 o  
C
TJ = -55 o  
C
0.01  
1
2
3
4
5
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure6. Source to Drain Diode  
Forward Voltage vs Source Current  
©2011 Fairchild Semiconductor Corporation  
FDMS7692 Rev.D4  
www.fairchildsemi.com  
3
Typical Characteristics TJ = 25 °C unless otherwise noted  
10  
2000  
1000  
ID = 13 A  
Ciss  
8
VDD = 15 V  
6
Coss  
VDD = 10 V  
VDD = 20 V  
100  
4
2
0
Crss  
f = 1 MHz  
= 0 V  
V
GS  
10  
0.1  
0
4
8
12  
16  
1
10  
30  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Qg, GATE CHARGE (nC)  
Figure 7. Gate Charge Characteristics  
Figure8. C a p a c i t a n c e v s D r a i n  
to Source Voltage  
50  
40  
30  
20  
10  
0
50  
TJ = 25 oC  
10  
VGS = 10 V  
TJ = 100 oC  
Limited by Package  
VGS = 4.5 V  
TJ = 125 o  
C
R
θJC = 4.6 oC/W  
1
0.001  
25  
50  
75  
100  
125  
150  
0.01  
0.1  
1
10  
100  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE (ms)  
Figure9. U n c l a m p e d I n d u c t i v e  
Switching Capability  
Figure10. Maximum Continuous Drain  
Current vs Case Temperature  
100  
10  
300  
VGS = 10 V  
SINGLE PULSE  
RθJA = 125 oC/W  
TA = 25 oC  
100  
10  
100 us  
1 ms  
10 ms  
1
THIS AREA IS  
LIMITED BY rDS(on)  
100 ms  
1 s  
SINGLE PULSE  
0.1  
T
J = MAX RATED  
θJA = 125 oC/W  
TA = 25 oC  
10 s  
DC  
R
1
0.01  
0.5  
10-4  
10-3  
10-2  
t, PULSE WIDTH (sec)  
10-1  
1
10  
200  
0.01  
0.1  
1
10  
100  
100 1000  
VDS, DRAIN to SOURCE VOLTAGE (V)  
Figure 11. Forward Bias Safe  
Operating Area  
Figure12. Single Pulse Maximum  
Power Dissipation  
©2011 Fairchild Semiconductor Corporation  
FDMS7692 Rev.D4  
www.fairchildsemi.com  
4
Typical Characteristics TJ = 25 °C unless otherwise noted  
2
1
DUTY CYCLE-DESCENDING ORDER  
D = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
0.1  
P
DM  
t
1
t
2
0.01  
0.001  
NOTES:  
DUTY FACTOR: D = t /t  
1
2
SINGLE PULSE  
PEAK T = P  
J
x Z  
x R  
+ T  
R
θJA = 125 oC/W  
DM  
θJA  
θJA A  
10-4  
10-3  
10-2  
10-1  
t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 13. Junction-to-Ambient Transient Thermal Response Curve  
14  
12  
10  
8
di/dt = 300 A/μs  
6
4
2
0
-2  
0
20  
40  
60  
80  
100  
TIME (ns)  
Figure14. Body Diode Reverse  
Recovery Characteristics  
©2011 Fairchild Semiconductor Corporation  
FDMS7692 Rev.D4  
www.fairchildsemi.com  
5
PQFN8 5X6, 1.27P  
CASE 483AE  
ISSUE A  
5.10  
3.91  
5.10  
PKG  
A
SEE  
DETAIL B  
1.27  
6.61  
C
L
B
8
7
6
5
8
5
0.77  
4.52  
3.75  
5.85  
5.65  
C
PKG  
6.15  
L
KEEP OUT  
AREA  
1.27  
1
4
1
2
3
4
TOP VIEW  
0.61  
1.27  
3.81  
LAND PATTERN  
RECOMMENDATION  
OPTIONAL DRAFT  
ANGLE MAY APPEAR  
ON FOUR SIDES  
SEE  
DETAIL C  
5.00  
4.80  
OF THE PACKAGE  
0.35  
0.15  
ꢀƒꢁꢂꢃƒ  
0.10 C  
0.30  
0.05  
0.05  
0.00  
SIDE VIEW  
ꢀƒꢁꢂꢃƒ  
8X  
0.08 C  
C
0.35  
0.15  
5.20  
4.80  
1.10  
0.90  
SEATING  
PLANE  
DETAIL C  
DETAIL B  
SCALE: 2:1  
3.81  
SCALE: 2:1  
1.27  
0.51  
(8X)  
0.31  
NOTES: UNLESS OTHERWISE SPECIFIED  
(0.34)  
A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,  
ISSUE A, VAR. AA,.  
0.10  
C A B  
1
2
3
4
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.  
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.  
C. ALL DIMENSIONS ARE IN MILLIMETERS.  
0.76  
0.51  
(0.52)  
D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.  
E. IT IS RECOMMENDED TO HAVE NO TRACES OR  
VIAS WITHIN THE KEEP OUT AREA.  
6.25  
5.90  
+0.30  
3.48  
-0.10  
(0.50)  
(0.30)  
(2X)  
8
7
6
5
ꢀꢄꢅꢅ“ꢀꢄꢂꢀ  
+0.10  
-0.15  
0.20  
(8X)  
3.96  
3.61  
BOTTOM VIEW  
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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
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application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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