FDMS8558S [ONSEMI]

N 沟道,PowerTrench® SyncFET™ MOSFET,25V,90A,1.5mΩ;
FDMS8558S
型号: FDMS8558S
厂家: ONSEMI    ONSEMI
描述:

N 沟道,PowerTrench® SyncFET™ MOSFET,25V,90A,1.5mΩ

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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
October 2014  
FDMS8558S(PCN)  
N-Channel PowerTrench® SyncFETTM  
25 V, 90 A, 1.5 mΩ  
Features  
General Description  
„ Dual CoolTM PQFN package  
This N-Channel SyncFETTM is produced using Fairchild  
Semiconductor’s  
advanced  
PowerTrench® process.  
„ Max rDS(on) = 1.5 mΩ at VGS = 10 V, ID = 33 A  
„ Max rDS(on) = 1.7 mΩ at VGS = 4.5 V, ID = 31 A  
„ High performance technology for extremely low rDS(on)  
„ SyncFETTM Schottky Body Diode  
„ RoHS Compliant  
Advancements in both silicon and package technologies have  
been combined to offer the lowest rDS(on) while maintaining  
excellent switching performance by extremely low Junction-to-  
Ambient thermal resistance. This device has the added benefit  
of an efficient monolithic Schottky body diode.  
Applications  
„ Synchronous Rectifier for DC/DC Converters  
„ Telecom Secondary Side Rectification  
„ High End Server/Workstation Vcore Low Side  
Bottom  
Top  
Pin 1  
D
D
D
G
5
6
7
8
4
3
2
1
S
S
S
G
S
S
S
D
D
D
D
D
Power 56  
MOSFET Maximum Ratings TA = 25°C unless otherwise noted  
Symbol  
VDS  
VGS  
Parameter  
Ratings  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
25  
V
V
12  
90  
Drain Current -Continuous (Package limited)  
-Continuous  
TC = 25 °C  
TA = 25 °C  
ID  
(Note 1a)  
(Note 3)  
33  
A
-Pulsed  
140  
EAS  
Single Pulse Avalanche Energy  
Power Dissipation  
145  
mJ  
W
TC = 25 °C  
TA = 25 °C  
78  
PD  
Power Dissipation  
(Note 1a)  
2.5  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJC  
RθJA  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
TC = 25 °C  
TA = 25 °C  
1.6  
50  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13’’  
Tape Width  
12 mm  
Quantity  
09OD  
FDMS8558S  
Power 56  
3000 units  
©2012 Fairchild Semiconductor Corporation  
FDMS8558S Rev.PCN2  
1
www.fairchildsemi.com  
Electrical Characteristics TJ = 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = 1 mA, VGS = 0 V  
25  
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
ID = 10 mA, referenced to 25 °C  
24  
mV/°C  
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
VDS = 20 V, VGS = 0 V  
500  
μA  
VGS = +12 V/-8 V, VDS = 0 V  
±100  
nA  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = 1 mA  
1.1  
1.4  
-3  
2.2  
V
ΔVGS(th)  
ΔTJ  
Gate to Source Threshold Voltage  
Temperature Coefficient  
I
D = 10 mA, referenced to 25 °C  
GS = 10 V, ID = 33 A  
mV/°C  
V
1.1  
1.3  
1.6  
317  
1.5  
1.7  
2.1  
rDS(on)  
gFS  
Static Drain to Source On Resistance  
Forward Transconductance  
VGS = 4.5 V, ID = 31 A  
mΩ  
VGS = 10 V, ID = 33 A, TJ = 125 °C  
VDS = 5 V, ID = 33 A  
S
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
5118  
1508  
195  
pF  
pF  
pF  
Ω
VDS = 13 V, VGS = 0 V,  
f = 1 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
0.9  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
14  
8
ns  
ns  
VDD = 13 V, ID = 33 A,  
V
GS = 10 V, RGEN = 6 Ω  
Turn-Off Delay Time  
Fall Time  
51  
7
ns  
ns  
Qg  
Total Gate Charge  
Total Gate Charge  
Gate to Source Gate Charge  
Gate to Drain “Miller” Charge  
VGS = 0 V to 10 V  
VGS = 0 V to 4.5 V  
81  
38  
10  
9.7  
nC  
nC  
nC  
nC  
Qg  
VDD = 13 V,  
D = 33 A  
I
Qgs  
Qgd  
Drain-Source Diode Characteristics  
V
GS = 0 V, IS = 2 A  
(Note 2)  
(Note 2)  
0.6  
0.8  
35  
0.8  
1.2  
VSD  
Source to Drain Diode Forward Voltage  
V
VGS = 0 V, IS = 33 A  
trr  
Reverse Recovery Time  
ns  
IF = 33 A, di/dt = 300 A/μs  
Qrr  
Reverse Recovery Charge  
49  
nC  
NOTES:  
1. R  
is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. R  
is guaranteed by design while R is determined  
θCA  
θJA  
θJC  
by the user's board design.  
50 °C/W when mounted on a  
1 in pad of 2 oz copper  
a)  
125 °C/W when mounted on a  
minimum pad of 2 oz copper.  
b)  
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.  
3. E of 145 mJ is based on starting T = 25 °C, L = 0.9 mH, I = 18 A, V = 23 V, V = 10 V. 100% test at L = 0.1 mH, I = 39 A.  
AS  
J
AS  
DD  
GS  
AS  
©2012 Fairchild Semiconductor Corporation  
FDMS8558S Rev.PCN2  
www.fairchildsemi.com  
2
Typical Characteristics TJ = 25 °C unless otherwise noted  
140  
6
5
4
3
2
1
0
VGS = 10V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
VGS = 4.5 V  
VGS = 3.5 V  
VGS = 3 V  
120  
100  
80  
60  
40  
20  
0
VGS = 2.5 V  
VGS = 2.5 V  
VGS = 3 V  
VGS = 3.5 V  
VGS = 4.5 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
VGS = 10 V  
120  
0
20  
40  
60  
80  
100  
140  
0
0.2  
0.4  
0.6  
0.8  
ID, DRAIN CURRENT (A)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 1. On Region Characteristics  
F i g u r e 2 . No rma li zed O n-Re si stan ce  
vs Drain Current and Gate Voltage  
1.6  
6
ID = 38 A  
GS = 10 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
V
5
ID = 38 A  
4
3
TJ = 125 o  
C
2
1
0
TJ = 25 o  
C
-75 -50 -25  
0
25 50 75 100 125 150  
2
3
4
5
6
7
8
9
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs Junction Temperature  
Figure4. On-Resistance vs Gate to  
Source Voltage  
140  
200  
100  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
VGS = 0 V  
120  
100  
80  
60  
40  
20  
0
VDS = 5 V  
TJ = 125 o  
C
10  
TJ = 25 oC  
1
TJ = 25 o  
C
TJ = 125 o  
C
TJ = -55 o  
C
0.1  
0.01  
TJ = -55 o  
C
1.2  
1.5  
1.8  
2.1  
2.4  
2.7  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure6. Source to Drain Diode  
Forward Voltage vs Source Current  
©2012 Fairchild Semiconductor Corporation  
FDMS8558S Rev.PCN2  
www.fairchildsemi.com  
3
Typical Characteristics TJ = 25 °C unless otherwise noted  
10  
10000  
1000  
100  
ID = 38 A  
8
6
Ciss  
VDD = 10 V  
VDD = 13 V  
Coss  
4
VDD = 15 V  
2
0
f = 1 MHz  
GS = 0 V  
V
Crss  
10  
0
15  
30  
45  
60  
75  
90  
0.1  
1
30  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Qg, GATE CHARGE (nC)  
Figure 7. Gate Charge Characteristics  
Figure8. C a p a c i t a n c e v s D r a i n  
to Source Voltage  
200  
150  
100  
50  
100  
VGS = 10 V  
TJ = 25 oC  
VGS = 4.5 V  
10  
TJ = 100 oC  
Limited by Package  
RθJC = 1.6 oC/W  
TJ = 125 o  
C
0
25  
1
0.001  
0.01  
0.1  
1
10  
100  
1000  
50  
75  
100  
125  
150  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE (ms)  
Figure9. U n c l a m p e d I n d u c t i v e  
Switching Capability  
Figure 10. Maximum Continuous Drain  
Current vs Ambient Temperature  
500  
100  
10000  
SINGLE PULSE  
RθJA = 125 oC/W  
TA = 25 oC  
1000  
100  
10  
100 us  
10  
1
1 ms  
10 ms  
THIS AREA IS  
LIMITED BY rDS(on)  
100 ms  
1 s  
SINGLE PULSE  
TJ = MAX RATED  
RθJA = 125 oC/W  
TA = 25 oC  
0.1  
0.01  
1
10 s  
DC  
0.1  
10-4  
10-3  
10-2  
t, PULSE WIDTH (s)  
10-1  
100  
101  
0.01  
0.1  
1
10  
100  
100 1000  
VDS, DRAIN to SOURCE VOLTAGE (V)  
Figure 11. Forward Bias Safe  
Operating Area  
Figure12. Single Pulse Maximum  
Power Dissipation  
©2012 Fairchild Semiconductor Corporation  
FDMS8558S Rev.PCN2  
www.fairchildsemi.com  
4
Typical Characteristics TJ = 25 °C unless otherwise noted  
2
1
DUTY CYCLE-DESCENDING ORDER  
D = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
0.01  
P
DM  
0.01  
1E-3  
1E-4  
t
1
t
2
SINGLE PULSE  
θJA = 125 oC/W  
NOTES:  
DUTY FACTOR: D = t /t  
R
1
2
PEAK T = P  
J
x Z  
x R  
+ T  
DM  
θJA  
θJA A  
10-4  
10-3  
10-2  
10-1  
t, RECTANGULAR PULSE DURATION (s)  
100  
101  
100  
1000  
Figure 13. Junction-to-Ambient Transient Thermal Response Curve  
©2012 Fairchild Semiconductor Corporation  
FDMS8558S Rev.PCN2  
www.fairchildsemi.com  
5
Typical Characteristics (continued)  
TM  
SyncFET Schottky body diode  
Characteristics  
Fairchild’s SyncFETTM process embeds a Schottky diode in  
parallel with PowerTrench MOSFET. This diode exhibits similar  
characteristics to a discrete external Schottky diode in parallel  
Schottky barrier diodes exhibit significant leakage at high tem-  
perature and high reverse voltage. This will increase the power  
in the device.  
with  
a MOSFET. Figure 14 shows the reverse recovery  
characteristic of the FDMS8558S.  
10-2  
40  
35  
30  
25  
20  
15  
10  
5
TJ = 125 o  
C
10-3  
10-4  
10-5  
10-6  
TJ = 100 o  
C
di/dt = 300 A/μs  
TJ = 25 o  
C
0
-5  
700  
800  
900  
1000  
1100  
0
5
10  
15  
20  
25  
TIME (ns)  
VDS, REVERSE VOLTAGE (V)  
Figure 15. SyncFETTM body diode reverse  
leakage versus drain-source voltage  
Figure 14. FDMS8558S SyncFETTM body  
diode reverse recovery characteristic  
©2012 Fairchild Semiconductor Corporation  
FDMS8558S Rev.PCN2  
www.fairchildsemi.com  
6
PQFN8 5X6, 1.27P  
CASE 483AE  
ISSUE A  
5.10  
3.91  
5.10  
PKG  
A
SEE  
DETAIL B  
1.27  
6.61  
C
L
B
8
7
6
5
8
5
0.77  
4.52  
3.75  
5.85  
5.65  
C
PKG  
6.15  
L
KEEP OUT  
AREA  
1.27  
1
4
1
2
3
4
TOP VIEW  
0.61  
1.27  
3.81  
LAND PATTERN  
RECOMMENDATION  
OPTIONAL DRAFT  
ANGLE MAY APPEAR  
ON FOUR SIDES  
SEE  
DETAIL C  
5.00  
4.80  
OF THE PACKAGE  
0.35  
0.15  
ꢀƒꢁꢂꢃƒ  
0.10 C  
0.30  
0.05  
0.05  
0.00  
SIDE VIEW  
ꢀƒꢁꢂꢃƒ  
8X  
0.08 C  
C
0.35  
0.15  
5.20  
4.80  
1.10  
0.90  
SEATING  
PLANE  
DETAIL C  
DETAIL B  
SCALE: 2:1  
3.81  
SCALE: 2:1  
1.27  
0.51  
(8X)  
0.31  
NOTES: UNLESS OTHERWISE SPECIFIED  
(0.34)  
A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,  
ISSUE A, VAR. AA,.  
0.10  
C A B  
1
2
3
4
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.  
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.  
C. ALL DIMENSIONS ARE IN MILLIMETERS.  
0.76  
0.51  
(0.52)  
D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.  
E. IT IS RECOMMENDED TO HAVE NO TRACES OR  
VIAS WITHIN THE KEEP OUT AREA.  
6.25  
5.90  
+0.30  
3.48  
-0.10  
(0.50)  
(0.30)  
(2X)  
8
7
6
5
ꢀꢄꢅꢅ“ꢀꢄꢂꢀ  
+0.10  
-0.15  
0.20  
(8X)  
3.96  
3.61  
BOTTOM VIEW  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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