FDN5618P [ONSEMI]
60V,P 沟道,PowerTrench® MOSFET,-1.25A,170mΩ;型号: | FDN5618P |
厂家: | ONSEMI |
描述: | 60V,P 沟道,PowerTrench® MOSFET,-1.25A,170mΩ PC 开关 脉冲 光电二极管 晶体管 |
文件: | 总6页 (文件大小:272K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – P-Channel, Logic
Level, POWERTRENCH)
SOT−23−3
CASE 527AG
60 V
FDN5618P
D
General Description
This 60 V P−Channel MOSFET uses onsemi’s high voltage
POWERTRENCH process. It has been optimized for power
management applications.
S
G
Features
−1.25 A, −60 V
R
R
= 0.170 ꢀ @ V = −10 V
DS(on)
GS
MARKING DIAGRAM
= 0.230 ꢀ @ V = −4.5 V
DS(on)
GS
Fast Switching Speed
High Performance Trench Technology for Extremely Low R
This Device is Pb−Free and Halogen Free
&E&Y
618&E&G
DS(on)
Applications
DC−DC Converters
Load Switch
Power Management
&E
&Y
618
&G
= Designates Space
= Binary Calendar Year Coding Scheme
= Specific Device Code
= Date Code
ABSOLUTE MAXIMUM RATINGS T = 25C unless otherwise noted.
A
ORDERING INFORMATION
Symbol
Parameter
Drain−Source Voltage
Ratings
−60
Unit
V
†
Device
FDN5618P
Package
Shipping
V
DSS
GSS
SOT−23−3
(Pb−Free)
3000 /
V
Gate−Source Voltage
20
V
Tape & Reel
I
Drain Current – Continuous (Note 1a)
Drain Current – Pulsed
−1.25
−10
A
D
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
P
Maximum Power Dissipation (Note 1a)
Maximum Power Dissipation (Note 1b)
0.5
W
D
0.46
T ,
STG
Operating and Storage Junction
Temperature Range
55 to +150
C
J
T
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
Unit
R
Thermal Resistance,
Junction−to−Ambient (Note 1a)
250
C/W
ꢁ
JA
R
Thermal Resistance,
Junction−to−Case (Note 1)
75
C/W
ꢁ
JC
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
December, 2022 − Rev. 4
FDN5618P/D
FDN5618P
ELECTRICAL CHARACTERISTICS T = 25C unless otherwise noted.
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain–Source Breakdown Voltage
V
I
= 0 V, I = −250 ꢂ A
−60
−
−
−
V
DSS
GS
D
Breakdown Voltage Temperature
Coefficient
= −250 ꢂ A,
Referenced to 25C
−
−58
mV/C
ꢃ BVDSS
ꢃ TJ
D
I
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V
DS
V
GS
V
GS
= −48 V, V = 0 V
−
−
−
−
−
−
−1
ꢂ A
nA
nA
DSS
GS
I
= 20 V, V = 0 V
100
GSSF
GSSR
DS
I
= −20 V, V = 0 V
−100
DS
ON CHARACTERISTICS (Note 2)
V
Gate Threshold Voltage
V
I
= V , I = −250 ꢂ A
−1
−1.6
−3
V
GS(th)
DS
GS D
Gate Threshold Voltage Temperature
Coefficient
= −250 ꢂ A,
Referenced to 25C
−
4
−
mV/C
ꢃ VGS(th)
ꢃ TJ
D
R
Static Drain–Source On–Resistance
V
V
V
= −10 V, I = −1.25 A
−
−
−
0.148
0.185
0.245
0.170
0.230
0.315
ꢀ
DS(on)
GS
GS
GS
D
= −4.5 V, I = −1.0 A
D
= −10 V, I = −3 A,
D
T = 125C
J
I
On–State Drain Current
V
GS
V
DS
= −10 V, V = −5 V
−5
−
−
−
A
S
D(on)
DS
g
FS
Forward Transconductance
= −5 V, I = −1.25 A
−
4.3
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= −30 V, V = 0 V,
−
−
−
430
52
−
−
−
pF
iss
DS
GS
f = 1.0 MHz
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
19
rss
SWITCHING CHARACTERISTICS (Note 2)
t
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
V
= −30 V, I = −1 A,
−
−
−
−
−
−
−
6.5
8
13
16
30
8
ns
d(on)
DD
GS
D
= −10 V, R
= 6 ꢀ
GEN
t
r
t
16.5
4
d(off)
t
f
Q
V
DS
V
GS
= −30 V, I = −1.25 A,
8.6
1.5
1.3
13.8
−
nC
g
D
= −10 V
Q
gs
gd
Q
−
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward Voltage = 0 V, I = −0.42 A
I
−
−
−
−0.42
−1.2
A
V
S
V
SD
V
−0.7
GS
S
(Note 2)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
ꢁ
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design.
ꢁ
ꢁ
JA
JA
2
a) 250C/W when mounted on a 0.02 in pad of 2 oz. copper.
b) 270C/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width 300 ꢂ s, Duty Cycle 2.0%
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2
FDN5618P
TYPICAL CHARACTERISTICS
5
4
2.2
2.0
V
= −10 V
GS
−6.0 V
−4.5 V
−4.0 V
V
GS
= −3.0 V
1.8
1.6
1.4
1.2
1.0
0.8
−3.5 V
−3.0 V
−2.5 V
3
2
1
0
−4.0 V
−4.5 V
−6.0 V
−10 V
0
1
2
3
4
0
1
2
3
4
5
−I , Drain Current (A)
D
−V , Drain To Source Voltage (V)
DS
Figure 1. On−Region Characteristics
Figure 2. On−Resistance Variation with Drain
Current and Gate Voltage
1.3
1.2
0.6
0.5
0.4
I
V
= −1.25 A
D
I
D
= −0.65 A
= −10 V
GS
1.1
1.0
0.9
0.8
T = 125C
A
0.3
0.2
0.1
T = 25C
A
−50
−25
0
25
50
75
100 125
150
2
4
6
8
100
T , Junction Temperature (5C)
J
V
GS
, Gate To Source Voltage (V)
Figure 3. On−Resistance Variation with Temperature
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
10
1
6
V
DS
= −5 V
V
GS
= 0 V
T = 125C
A
25C
5
4
3
T = 125C
A
0.1
0.01
0.001
2
1
0
25C
−55C
−55C
0.0001
1
1.5
2
2.5
3
3.5
4
0
0.2
0.4
0.6
0.8
1
1.2
1.4
V
GS
, Gate To Source Voltage (V)
V
SD
, Body Diode Forward Voltage (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
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3
FDN5618P
TYPICAL CHARACTERISTICS (CONTINUED)
10
700
I
D
= −1.25 A
V
DS
= −20 V
f = 1 MHz
= 0 V
−30 V
600
500
400
300
V
GS
8
6
−40 V
C
iss
4
2
200
100
0
C
oss
C
rss
0
0
2
4
6
8
10
0
2
4
6
8
10
12
Q , Gate Charge (nC)
g
V
DS
, Drain To Source Voltage (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
100
10
20
15
Single Pulse
R
= 350C/W
ꢁ
JA
1 ms
T = 25C
A
R
Limit
DS(on)
10 ms
1
10
5
0.1
0.01
100 ms
V
= −10 V
GS
1 s
Single Pulse
10 s
10
DC
R
= 270C/W
ꢁ
JA
T = 25C
A
0.001
0
0.1
1
100
0.001
0.01
0.1
1
10
100
1000
V
DS
, Drain−Source Voltage (V)
t , Time (s)
1
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation
1
D = 0.5
0.2
0.1
0.1
0.01
R
R
(t)= r(t) * R
ꢁ
JA
ꢁ
JA
0.05
350C/W
ꢁ
JA =
0.02
P(pk)
0.01
t
1
t
2
Single Pulse
T − T = P * R (t)
ꢁ
JA
J
A
Duty Cycle, D = t / t
1
2
0.001
0.0001
0.001
0.01
0.1
t , Time (s)
1
10
100
1000
1
Figure 11. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1a.
Transient thermal response will change depending on the circuit board design.
SUPERSOT is a trademark and POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi”
or its affiliates and/or subsidiaries in the United States and/or other countries.
www.onsemi.com
4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23/SUPERSOTt−23, 3 LEAD, 1.4x2.9
CASE 527AG
ISSUE A
DATE 09 DEC 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
XXX = Specific Device Code
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
M
= Month Code
XXXMG
G
= Pb−Free Package
G
(Note: Microdot may be in either location)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON34319E
SOT−23/SUPERSOT−23, 3 LEAD, 1.4X2.9
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
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onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
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