FDPF39N20 [ONSEMI]
N 沟道 UniFETTM MOSFET 200V,39A,66mΩ;型号: | FDPF39N20 |
厂家: | ONSEMI |
描述: | N 沟道 UniFETTM MOSFET 200V,39A,66mΩ 局域网 开关 脉冲 晶体管 |
文件: | 总11页 (文件大小:626K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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August 2014
FDP39N20 / FDPF39N20
TM
N-Channel UniFET MOSFET
200 V, 39 A, 66 mΩ
Features
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. This device family is suitable for switching
power converter applications such as power factor correction
(PFC), flat panel display (FPD) TV power, ATX and electronic
lamp ballasts.
•
•
•
•
RDS(on) = 66 mΩ (Max.) @ VGS = 10 V, ID = 19.5 A
Low Gate Charge (Typ. 38 nC)
Low Crss (Typ. 57 pF)
100% Avalanche Tested
Applications
•
•
•
•
PDP TV
Lighting
Uninterruptible Power Supply
AC-DC Power Supply
D
G
G
G
D
S
S
D
G
D
TO-220
TO-220F
TO-220F
S
(L-formed)
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
FDPF39N20 /
Symbol
VDSS
Parameter
FDP39N20
FDPF39N20TLDTU
Unit
Drain-Source Voltage
Drain Current
200
V
ID
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
39
23.4
39 *
23.4 *
A
A
(Note 1)
IDM
Drain Current
- Pulsed
156
156 *
A
V
VGSS
EAS
IAR
Gate-Source voltage
30
860
39
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
EAR
dv/dt
PD
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
25.1
4.5
mJ
V/ns
Power Dissipation
(TC = 25°C)
- Derate Above 25°C
251
2.0
37
0.29
W
W/°C
T
J, TSTG
Operating and Storage Temperature Range
-55 to +150
300
°C
TL
Maximum Lead Temperature for Soldering,
1/8” from Case for 5 Seconds
°C
* Drain current limited by maximum junction temperature.
Thermal Characteristics
FDPF39N20 /
Symbol
RθJC
RθJA
Parameter
FDP39N20
0.5
FDPF39N20TLDTU
Unit
Thermal Resistance, Junction-to-Case, Max.
Thermal Resistance, Junction-to-Ambient, Max.
3.4
°C/W
62.5
62.5
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
1
Package Marking and Ordering Information
Part Number
FDP39N20
Top Mark
FDP39N20
FDPF39N20
Package
TO-220
Packing Method
Tube
Reel Size
N/A
Tape Width
N/A
Quantity
50 units
50 units
FDPF39N20
TO-220F
Tube
N/A
N/A
TO-220F
(L-formed)
FDPF39N20TLDTU
FDPF39N20T
Tube
N/A
N/A
50 units
Electrical Characteristics TC = 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 μA
D = 250 μA, Referenced to 25°C
200
--
--
--
--
V
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient
I
0.2
V/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 200 V, VGS = 0 V
DS = 160 V, TC = 125°C
--
--
--
--
1
10
μA
μA
V
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 30 V, VDS = 0 V
VGS = -30 V, VDS = 0 V
--
--
--
--
100
nA
nA
-100
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on)
VDS = VGS, ID = 250 μA
3.0
--
--
5.0
0.066
--
V
Ω
S
Static Drain-Source
On-Resistance
V
GS = 10 V, ID = 19.5 A
0.056
28.5
gFS
Forward Transconductance
VDS = 40 V, ID = 19.5 A
--
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
--
--
1640
400
57
2130
520
85
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
td(on) Turn-On Delay Time
tr
td(off)
tf
VDD = 100 V, ID = 39 A,
--
--
--
--
--
--
--
30
160
150
150
38
70
330
310
310
49
ns
ns
V
GS = 10 V, RG = 25 Ω
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ns
(Note 4)
(Note 4)
ns
Qg
VDS = 160 V, ID = 39 A,
GS = 10 V
nC
nC
nC
V
Qgs
Qgd
11
--
16.5
--
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
--
--
--
--
--
--
--
39
156
1.4
--
A
A
ISM
VSD
trr
Drain-Source Diode Forward Voltage
Reverse Recovery Time
VGS = 0 V, IS = 39 A
--
V
VGS = 0 V, IS = 39 A,
152
1.1
ns
μC
dIF/dt =100 A/μs
Qrr
Reverse Recovery Charge
--
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 0.85 mH, I = 39 A, V = 50 V, R = 25 Ω, starting T = 25°C.
AS
DD
G
J
3. I ≤ 39 A, di/dt ≤ 200 A/μs, V ≤ BV
, starting T = 25°C.
SD
DD
DSS
J
4. Essentially independent of operating temperature typical characteristics.
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
2
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
VGS
102
102
101
100
Top :
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
101
150oC
25oC
100
-55oC
* Notes :
1. VDS = 40V
* Notes :
1. 250μs Pulse Test
2. TC = 25o
2. 250μs Pulse Test
C
10-1
100
101
2
4
6
8
10
12
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
0.14
0.12
0.10
102
101
100
VGS = 10V
0.08
150oC
25oC
0.06
VGS = 20V
* Notes :
1. VGS = 0V
o
0.04
2. 250μs Pulse Test
* Note : TJ = 25 C
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
0
25
50
75
100
125
VSD, Source-Drain voltage [V]
ID, Drain Current [A]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
12
10
8
4000
C
iss = Cgs + Cgd (Cds = shorted)
VDS = 40V
VDS = 100V
VDS = 160V
Coss = Cds + Cgd
Crss = Cgd
Coss
C
iss
6
2000
4
* Note :
1. VGS = 0 V
C
rss
2. f = 1 MHz
2
* Note : ID = 39A
0
0
10-1
100
101
0
10
20
30
40
50
60
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
3
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3.0
2.5
2.0
1.5
1.2
1.1
1.0
1.0
* Notes :
1. VGS = 0 V
0.9
0.8
* Notes :
1. VGS = 10 V
2. ID = 250 μA
0.5
2. ID = 19.5 A
0.0
-100
-100
-50
0
50
100
150
200
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
TJ, Junction Temperature [oC]
Figure 9-1. Maximum Safe Operating Area
- FDP39N20
Figure 9-2. Maximum Safe Operating Area
- FDPF39N20
10 μs
102
102
10 μs
100 μs
100 μs
1 ms
1 ms
10 ms
101
101
10 ms
100 ms
DC
100 ms
DC
Operation in This Area
is Limited by R DS(on)
Operation in This Area
is Limited by R DS(on)
100
100
* Notes :
1. TC = 25 o
2. TJ = 150 o
* Notes :
-1
10
1. TC = 25 o
C
-1
10
C
2. TJ = 150 oC
C
3. Single Pulse
3. Single Pulse
-2
-2
10
10
100
101
102
100
101
102
VDS, Drain-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 10. Maximum Drain Current vs. Case Temperature
40
30
20
10
0
25
50
75
100
125
150
TC, Case Temperature [oC]
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
4
Typical Performance Characteristics (Continued)
Figure 11-1. Transient Thermal Response Curve - FDP39N20
D = 0 .5
1 0 -1
0 .2
0 .1
PDM
0 .0 5
t1
t2
0 .0 2
0 .0 1
*
N o te s
1 . Z θ JC (t)
2 . D u ty F a cto r, D = t1 /t2
3 . T J M T C P D M Z θ JC (t)
:
o
=
0 .5 C /W M a x.
1 0 -2
sin g le p u lse
1 0 -3
-
=
*
1 0 -5
1 0 -4
1 0 -2
1 0 -1
1 0 0
1 0 1
t1, S q u a re W a ve P u lse D u ra tio n [se c]
Figure 11-2. Transient Thermal Response Curve - FDPF39N20
D = 0 .5
1 0 0
0 .2
0 .1
0 .0 5
1 0 -1
PDM
0 .0 2
0.0 1
t1
t2
*
N o te s
1 . Z θ JC (t)
2 . D u ty F a cto r, D = t1/t2
3 . T JM T C P D M Z θ JC (t)
:
o
=
3 .4 C /W M a x.
sin g le p u lse
1 0 -2
1 0 -5
-
=
*
1 0 -4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1, S q u a re W a ve P u lse D u ra tio n [se c]
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
5
VGS
Same Type
as DUT
50KΩ
Qg
12V
200nF
300nF
VDS
VGS
Qgs
Qgd
DUT
I
= const.
G
Charge
Figure 12. Gate Charge Test Circuit & Waveform
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
V
GS
td(on)
tr
td(off)
tf
t on
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
L IAS
VDS
I D
BVDSS
IAS
RG
VDD
ID (t)
V
VDS (t)
VDD
DUT
GS
t p
t p
Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
6
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
www.fairchildsemi.com
©2007 Fairchild Semiconductor Corporation
FDP39N20 / FDPF39N20 Rev. C2
7
SUPPLIER "B" PACKAGE
SHAPE
ꢀꢁꢂꢂ
3.50
10.67
9.65
SUPPLIER "A" PACKAGE
SHAPE
E
3.40
2.50
16.30
13.90
IF PRESENT, SEE NOTE "D"
E
16.51
15.42
9.40
8.13
E
1
2
3
4.10
2.70
[2.46]
C
14.04
12.70
2.13
2.06
FRONT VIEWS
H
4.70
4.00
1.62
1.42
1.62
1.10
2.67
2.40
"A1"
8.65
7.59
1.00
0.55
SEE NOTE "F"
ꢃ
ꢄ
ꢃ
ꢄ
6.69
6.06
OPTIONAL
CHAMFER
E
14.30
11.50
NOTE "I"
BOTTOM VIEW
NOTES:
A) REFERENCE JEDEC, TO-220, VARIATION AB
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS COMMON TO ALL PACKAGE
SUPPLIERS EXCEPT WHERE NOTED [ ].
D) LOCATION OF MOLDED FEATURE MAY VARY
(LOWER LEFT CORNER, LOWER CENTER
AND CENTER OF THE PACKAGE)
3
2
1
E DOES NOT COMPLY JEDEC STANDARD VALUE.
F) "A1" DIMENSIONS AS BELOW:
SINGLE GAUGE = 0.51 - 0.61
DUAL GAUGE = 1.10 - 1.45
G) DRAWING FILE NAME: TO220B03REV9
H
PRESENCE IS SUPPLIER DEPENDENT
I) SUPPLIER DEPENDENT MOLD LOCKING HOLES
IN HEATSINK.
0.60
0.36
2.85
2.10
BACK VIEW
SIDE VIEW
10.36
9.96
2.66
2.42
B
A
B
3.28
3.08
7.00
3.40
3.20
0.70
SEE NOTE "F"
SEE NOTE "F"
6.88
6.48
1 X 45°
16.07
15.67
B
16.00
15.60
B
(3.23)
3
1
1.47
1.24
2.96
2.56
2.14
0.90
0.70
0.50
10.05
9.45
M
A
30°
0.45
0.25
0.60
0.45
B
2.54
2.54
4.90
4.50
B
NOTES:
A. EXCEPT WHERE NOTED CONFORMS TO
EIAJ SC91A.
B
DOES NOT COMPLY EIAJ STD. VALUE.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
F. OPTION 1 - WITH SUPPORT PIN HOLE.
OPTION 2 - NO SUPPORT PIN HOLE.
G. DRAWING FILE NAME: TO220M03REV5
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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