FDS4897AC [ONSEMI]
双 N 和 P 沟道,PowerTrench® MOSFET,40V;型号: | FDS4897AC |
厂家: | ONSEMI |
描述: | 双 N 和 P 沟道,PowerTrench® MOSFET,40V PC 光电二极管 |
文件: | 总12页 (文件大小:511K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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October 2008
FDS4897AC
Dual N & P-Channel PowerTrench® MOSFET
N-Channel: 40 V, 6.1 A, 26 mΩ P-Channel: -40 V, -5.2 A, 39 mΩ
Features
General Description
Q1: N-Channel
These dual N- and P-Channel MOSFETs are produced using
Fairchild Semiconductor's advanced PowerTrench® process
that has been especially tailored to minimize on-state resistance
and yet maintain superior switching performance.
Max rDS(on) = 26 mΩ at VGS = 10 V, ID = 6.1 A
Max rDS(on) = 31 mΩ at VGS = 4.5 V, ID = 5.6 A
Q2: P-Channel
Max rDS(on) = 39 mΩ at VGS = -10 V, ID = -5.2 A
Applications
Inverter
Max rDS(on) = 65 mΩ at VGS = -4.5 V, ID = -4.1 A
100% UIL Tested
Power Supplies
RoHS Compliant
D2
Q2
D2
G2
S2
D2
D2
5
6
4
3
2
1
D1
D1
Q1
G2
G1
S1
D1
D1
7
8
S2
G1
S1
Pin 1
SO-8
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Q1
40
Q2
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current - Continuous
- Pulsed
-40
±20
-5.2
-24
V
V
±20
6.1
24
ID
A
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
2.0
1.6
0.9
PD
TA = 25 °C (Note 1a)
TA = 25 °C (Note 1b)
(Note 3)
W
EAS
Single Pulse Avalanche Energy
37
73
mJ
°C
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
Thermal Characteristics
RθJC
RθJC
Thermal Resistance, Junction to Case,
Thermal Resistance, Junction to Ambient,
(Note 1)
40
78
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
12 mm
Quantity
FDS4897AC
FDS4897AC
SO-8
13 ”
2500 units
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Off Characteristics
I
I
D = 250 µA, VGS = 0 V
D = -250 µA, VGS = 0 V
Q1
Q2
40
-40
BVDSS
Drain to Source Breakdown Voltage
V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25 °C
D = -250 µA, referenced to 25 °C
Q1
Q2
37
-32
mV/°C
I
V
V
DS = 32 V, VGS = 0 V
DS = -32 V, VGS = 0 V
Q1
Q2
1
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
µA
-1
Q1
Q2
±100
±100
nA
nA
VGS = ±20 V, VDS = 0 V
On Characteristics
V
V
GS = VDS, ID = 250 µA
GS = VDS, ID = -250 µA
Q1
Q2
1.5
-1.5
2.0
-2.0
3.0
-3.0
VGS(th)
Gate to Source Threshold Voltage
V
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 µA, referenced to 25 °C
D = -250 µA, referenced to 25 °C
VGS = 10 V, ID = 6.1 A
Q1
Q2
-6
6
mV/°C
I
20
24
30
26
31
39
V
V
GS = 4.5 V, ID = 5.6 A
GS = 10 V, ID = 6.1 A, TJ = 125 °C
Q1
Q2
rDS(on)
Static Drain to Source On Resistance
mΩ
V
V
V
GS = -10 V, ID = -5.2 A
GS = -4.5 V, ID = -4.1 A
GS = -10 V, ID = -5.2 A, TJ = 125 °C
28
45
41
39
65
57
V
V
DD = 5 V, ID = 6.1 A
DD = -5 V, ID = -5.2 A
Q1
Q2
24
14
gFS
Forward Transconductance
S
Dynamic Characteristics
Q1
Q2
795
765
1055
1015
Q1
Ciss
Coss
Crss
Rg
Input Capacitance
pF
pF
pF
Ω
VDS = 20 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
95
135
130
180
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2
VDS = -20 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
65
80
100
120
Q1
Q2
1.7
3.6
Switching Characteristics
Q1
Q2
6
8
12
15
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
ns
ns
Q1
V
V
DD = 20 V, ID = 6.1 A,
GS = 10 V, RGEN = 6 Ω
Q1
Q2
2
3
10
10
Q1
Q2
17
17
30
30
Q2
Turn-Off Delay Time
Fall Time
ns
VDD = -20 V, ID = -5.2 A,
Q1
Q2
2
3
10
10
V
GS = -10 V, RGEN = 6 Ω
ns
Q1
Q2
15
15
21
20
Qg(TOT)
Qgs
Qgd
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
nC
nC
nC
Q1
V
GS = 10 V, VDD = 20 V, ID = 6.1 A
Q1
Q2
2.5
2.6
Q2
Q1
Q2
2.9
3.2
VGS = -10 V, VDD = -20 V, ID = -5.2 A
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
2
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Drain-Source Diode Characteristics
V
V
GS = 0 V, IS = 1.3 A
GS = 0 V, IS = -1.3 A
(Note 2) Q1
(Note 2) Q2
0.75
-0.76
1.2
V
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
-1.2
Q1
Q2
17
20
31
ns
36
Q1
IF = 6.1 A, di/dt = 100 A/s
Q2
IF = -5.2 A, di/dt = 100 A/s
Q1
Q2
7
10
15
nC
20
Qrr
Reverse Recovery Charge
Notes:
2
1:
R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θJA
θJC
θCA
the user's board design.
a) 78 °C/W when
mounted on a 1 in
pad of 2 oz copper
b) 135 °C/W when
mounted on a
minimun pad
2
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: Starting T = 25 °C, N-ch: L = 3 mH, I = 5 A, V = 40 V, V = 10 V; P-ch: L = 3 mH, I = -7 A, V = -40 V, V = -10 V.
J
AS
DD
GS
AS
DD
GS
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
3
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
24
20
16
12
8
5
4
3
2
VGS = 10 V
VGS = 4.5 V
VGS = 4 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 3 V
VGS = 3.5 V
VGS = 3.5 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 4.5 V
VGS = 4 V
4
VGS = 3 V
1
VGS = 10 V
20 24
0
0.0
0.5
0.5
1.0
1.5
2.0
0
4
8
12
16
VDS DRAIN TO SOURCE VOLTAGE (V)
,
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.8
1.6
1.4
1.2
1.0
0.8
0.6
80
ID = 6.1 A
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
70
60
50
40
30
20
10
ID = 6.1 A
TJ = 125 o
C
TJ = 25 oC
6
-75 -50 -25
0
25 50 75 100 125 150
oC
2
4
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
TJ JUNCTION TEMPERATURE
,
(
)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
24
20
16
12
8
40
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 0 V
10
VDS = 5 V
TJ = 150 o
C
1
TJ = 25 oC
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
TJ = -55 o
C
0.01
0.001
4
0
1
2
3
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
4
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
10
8
2000
1000
ID = 6.1 A
Ciss
VDD = 15 V
6
VDD = 25 V
Coss
VDD = 20 V
100
4
Crss
2
f = 1 MHz
= 0 V
V
GS
0
10
0.1
0
4
8
Q , GATE CHARGE (nC)
12
16
1
10
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
g
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
10
7
6
5
4
3
2
1
0
9
8
7
6
5
VGS = 10 V
4
3
VGS = 4.5 V
TJ = 25 o
C
TJ = 125 oC
2
RθJA = 78 oC/W
1
0.01
25
50
TC
75
100
125
oC
150
0.1
1
10 20
tAV, TIME IN AVALANCHE (ms)
,
AMBIENT TEMPERATURE
(
)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Ambient Temperature
30
10
1000
VGS = 10 V
100 us
SINGLE PULSE
RθJA = 135 oC/W
A = 25 oC
100
10
1 ms
1
T
10 ms
100 ms
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 135 oC/W
TA = 25 oC
0.1
1 s
10 s
DC
1
0.01
0.01
0.5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
200
0.1
1
10
100
100 1000
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
5
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
t
1
0.01
0.001
t
SINGLE PULSE
RθJA = 135 oC/W
2
NOTES:
DUTY FACTOR: D = t /t
1
2
(Note 1b)
PEAK T = P
J
x Z
x R
+ T
θJA A
DM
θJA
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
6
www.fairchildsemi.com
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
24
20
16
12
8
5
4
3
2
VGS = -10 V
VGS = -5 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = -3.5 V
VGS = -4 V
VGS = -4.5 V
VGS = -4 V
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = -4.5 V
VGS = -3.5 V
VGS = -5 V
4
1
VGS = -10 V
0
0.0
0.5
0.5
-VDS
1.0
1.5
2.0
2.5
3.0
0
4
8
12
16
20
24
,
DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 15. On- Region Characteristics
Figure 16. Normalized on-Resistance vs Drain
Current and Gate Voltage
120
1.8
PULSE DURATION = 80
DUTY CYCLE = 0.5% MAX
µs
ID = -5.2 A
GS = -10 V
ID = -5.2 A
V
1.6
1.4
1.2
1.0
0.8
0.6
100
80
60
40
20
TJ = 125 o
C
TJ = 25 o
C
2
4
6
8
10
-75 -50 -25
TJ
0
25 50 75 100 125 150
,
JUNCTION TEMPERATURE ( )
oC
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 18. On-Resistance vs Gate to
Source Voltage
Figure 17. Normalized On-Resistance
vs Junction Temperature
24
20
16
12
8
40
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 0 V
10
VDS = -5 V
TJ = 150 o
C
1
TJ = 25 o
C
TJ = 150 o
C
0.1
TJ = 25 o
C
TJ = -55 o
C
TJ = -55 o
C
0.01
0.001
4
0
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 19. Transfer Characteristics
Figure 20. Source to Drain Diode
Forward Voltage vs Source Current
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
7
www.fairchildsemi.com
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
10
8
2000
1000
ID = -5.2 A
Ciss
Coss
Crss
VDD = -15 V
6
VDD = -20 V
VDD = -25 V
100
4
2
f = 1 MHz
= 0 V
V
GS
0
10
0.1
0
4
8
12
16
1
10
40
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 22. Capacitance vs Drain
to Source Voltage
Figure 21. Gate Charge Characteristics
6
5
4
3
2
1
10
9
8
7
6
5
4
3
VGS = -10 V
TJ = 25 o
C
VGS = -4.5 V
2
TJ = 125 o
C
RθJA = 78 oC/W
1
0.1
0
25
1
10
40
50
TC
75
100
125
oC
150
tAV, TIME IN AVALANCHE (ms)
,
AMBIENT TEMPERATURE
(
)
Figure 23. Unclamped Inductive
Switching Capability
F ig ure 24 . Ma ximum C on tin uo us D rain
Current vs Ambient Temperature
1000
30
VGS = -10 V
100 us
10
100
10
1 ms
SINGLE PULSE
RθJA = 135 oC/W
THIS AREA IS
LIMITED BY rds(on)
1
10 ms
100 ms
SINGLE PULSE
0.1
0.01
1 s
TJ = MAX RATED
RθJA = 135 oC/W
25 o
TA = C
10 s
DC
1
0.5
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
1
10
100 1000
0.01
0.1
1
10
100 200
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 25. Forward Bias Safe
Operating Area
Figure 26. Single Pulse Maximum Power
Dissipation
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
8
www.fairchildsemi.com
Typical Characteristics (Q2 P-Channel) TJ = 25 °C unless otherwise noted
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
P
0.05
0.02
0.01
DM
t
1
t
2
0.01
0.001
SINGLE PULSE
RθJA = 135 oC/W
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
J
x Z
x R
+ T
θJA A
DM
θJA
(
Note 1b)
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 27. Junction-to-Ambient Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
9
www.fairchildsemi.com
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Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Farichild strongly encourages customers to purchase Farichild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from fairchild directly or from Authorized Fairchild
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Farichild’s full range of
up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and
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committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications may
change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make changes at any time without notice to
improve design.
Preliminary
First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
No Identification Needed
Obsolete
Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I37
©2008 Fairchild Semiconductor Corporation
FDS4897AC Rev.C
10
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